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Among the greatest inventions of the 20th Century and perhaps even in all of human history is the integrated circuit. The emergence of interconnected systems enabled by the growth of the internet has furthered our reliance on microelectronic systems. Most of the global conversation regarding cyber security deals with software driven attacks and network breaches. However, an emerging concern, critical to cyber security, is the protection of the physical layer. An attack on the physical layer refers to a directed attack on the microelectronic devices themselves. Microwave energy is transmitted by many sources such as radar, cell phone towers, Wi-Fi transmitters, satellite communications, or even portable electronic devices. The work presented in this dissertation is part of a broad effort to develop more effective means for HPM threat assessment. Comprehensive experimental evaluation of CMOS digital electronics was performed to provide critical information of the elementary mechanisms that govern the dynamics of HPM effects. Results show that electrostatic discharge (ESD) protection devices play a significant role in the behavior of circuits irradiated by HPM pulses.

Block diagram
Arbitrary waveform generator Power supply

FET Probe Input

Device under test

FET Probe Output

Pico ammeter


A digital input signal was generated by a arbitrary waveform generator. The signal generator is capable of producing a digital waveform with frequencies up to 100 MHz Probe points were soldered as close as possible to the input and output pins, and oscilloscope probes were connected in order to measure the input and output signals. The input and output probes were fed to a mixed signal oscilloscope. The power supply voltage was set 3 V to provide the rail voltage. A pico ammeter was connected to the current return path to measure the average current xcbvxcbvXCnbVXCnbCXNBCnbvcbvcbvbvcbvnnbbvncbv nbvcnbvnbvnbvnbvbvbvcbvbv

Hardware requirements Microwave energy source Waveform generator Oscilloscope Power supply FET probe

Aims and Goals Development of effective experimental methods for evaluating HPM effects in integrated circuits. Evaluation of circuit input response characteristics based on semi-conductor device physics. Identification of fundamental dynamics involved in observed HPM induced output voltage characteristic in digital CMOS circuits. Identification and characterization of abnormal current behavior in CMOS circuits due to HPM effects. Successful HPM effects prediction of CMOS test circuits using compact circuit models based on scalable physical parameters.