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2MVL 4.

2 FPGA Based System Design

Presented By
Manish Singhal Manish Singhal Associate Professor, PCE, Jaipur Wednesday, April 18, 2012

FPGA Based System Design


Text / References Books Field Programmable Gate Arrays - Stephen D. Brown / Robert J. Francis
FPGA Based System Design - Wayne Wolf Digital System Design using Programmable Logic

Devices - Parag K Lala

Manish Singhal

Wednesday, April 18, 2012

FPGA Based System Design


Syllabus Unit -1 Evolution of Programmable Device Unit -2 FPGA Technology Unit -3 Technology mapping in FPGAs Unit -4 Routing for FPGAs Unit -5 Logic Block Architecture FPGA Syllabus.doc..\..\Scheme & Syllabus\VLSI\Syllabus.pdf
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Overview of Syllabus unit wise


Unit 1 Introduces FPGA technology. It defines an FPGA to be

a user programmable IC, consisting of a set of logic blocks that can be interconnected by general routing resources. At the same time it also focus on the evolution of different type of programmable devices. Also we define the applications of FPGA and the basic Implementation process.
Unit 2 Provides a survey of commercial FPGA devies.This

includes description of the chip architectures & the basic technologies needed to achieve the programmability.
Unit 3 Deals with Computer-Aides Design(CAD)tasks known

as Technology Mapping , which determines how a given logic circuit can be implemented using the logic blocks available in particular FPGA. Examples are included of Manish Singhal Wednesday, April 18, 2012 technology mapping algorithms for FPGA.

Overview of Syllabus unit wise


Unit 4 This chapter focuses on the CAD routing problem in FPGAs ,where the interconnections between the logic block are realized. Examples of two routing algorithms e.g. 1Segmented Routing & K-Segmented Routing for two different types of FPGA are presented.

Unit 5 Considers the design of the logic blocks and its effect on the speed and logic density of logic circuits. It also gives the results of several recent studies on this topic.

Manish Singhal

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Unit -1 Evolution of Programmable Devices

Manish Singhal

Wednesday, April 18, 2012

Evolution of Programmable Devices


Programmable devices play a key role in the design

of digital hardware. They are general-purpose chips that can be configured for vide variety of applications
Introduction to AND-OR structured Programmable

Logic Devices- PROM, PLA, PAL and MPGAs;


Combinational and sequential circuit realization using

PROM based Programmable Logic Element (PLE);


Architecture of FPAD, FPLA, FPLS and FPID devices.
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Manish Singhal

Wednesday, April 18, 2012

Manish Singhal

Wednesday, April 18, 2012

PROM(Cont...)
field programmable connections involves some sort of programmable switches like Fuse which is always slower then the hard wired connections. Advantages of Field programmable are: They are less expensive at low volumes then the mask programmable. They can be programmed immediately ,in minutes where as mask programmable devices must be manufactured in foundry over a period of week, months or year.

2)

Field

programmable:-

The application of PROM are best suited for implementing the Computer Memories.
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PLDs or Programmable Logic Device


Another type of programmable devices designed

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specifically for implementing logic circuits are Programmable Logic Device(PLD). Any type of PLD comprises an array of AND gates connected to an array of OR gates. So a logic circuit implemented using PLD is represented in sum-ofproduct form. Two most basic versions of PLD are:a) Programmable Array Logic (PAL). b) Programmable Logic Array (PLA). PAL consist of a programmable AND plane followed by a Fixed OR-plane. It also offers the advantages of field programmability. Wednesday, April 18, 2012 Manish Singhal

Evolution of Programmable Devices


Introduction to AND-OR structured Programmable Logic Devices - PROM, PLA, PAL
Fix AND OR Programmable OR AND AND, OR

INPUTS

PROM PAL PLA

OUTPUTS

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Evolution of Programmable Devices


AND Plane OR Plane

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Evolution of Programmable Devices


PLAs are available in both mask-programmable and

field-programmable versions. With these two level simple structures, it allows high speed performance implementation of logic circuits. But the main drawback with this simple structure is that they can only implement small logic circuits that can be represented with the modest number of product terms.

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Mask Programmable Logic circuitMPGA

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MPGA
In an MPGA ,all the mask layers that defines the

circuitry of the chip are pre-defined by the manufacturer ,except those that specify the final metal layers. These metal layers are customized to connect the transistors in the array ,thereby implementing the desired circuits. The main advantage of MPGA over PLDs is that they provide a general structure that allows the implementation of much larger circuits. On the other hand ,since MPGAs are mask programmable, they require significant manufacturing time and high initial cost. Thus comes the FPGA for rescue since it combines the programmability of a PLD and the scalable Manish Singhal Wednesday, April 18, 2012 20 interconnection structure of an MPGA.

Mask Programmable Logic circuitMPGA

Pre fabricated Transistor

Routing

I/O pads

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Combinational and sequential circuit realization using PROM based Programmable Logic Element (PLE

Programmable elements are Fuse Anti Fuse Switch (SRAM, EPROM, EEPROM) Volatile (SRAM) Non-volatile (EPROM, EEPROM)

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Summary of Programming Technologies


Fusible Link is generally a Connected switch.

Anti-Fuse is a programming element switch which is

fabricated as a normally open disconnection(open), and which makes a connection(closes) when a high voltage is applied across its terminals. The anti-fuse has advantage over a fuse that most connections in an FPGA should be open, so the anti-fuse leaves most programming points in the proper state.
In short, in SRAM technology for programming the FPGA

,programmable connections are made using pass-transistors, transmission gates, or multiplexers that all are controlled by Manish Singhal Wednesday, April 18, 2012 24 SRAM cells.

Summary of Programming Technologies


EPROM transistors are used in FPGAs in different manner

then in anti-fuse or SRAM .Here EPROM transistors are used as Pull down devices for logic block inputs.(word line , bit line concept).
The advantage of EPROM transistors is that they do not

need an external storage. But unlike SRAM,EPROM transistors can not be re-programmed in-circuit.
The EEPROM approach is similar to EPROM technology

except that EEEPROM transistors can be re-programmed in-circuit.


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Architecture of FPAD, FPLA, FPLS and FPID devices


FPAD or FPAA Field Programmable Analog Device/

Array

FPAA is analog IC which is equivalent of FPGA. It contain a small no. of CAB (Configuration Analog Block). CAB contain operational amplifier, programmable capacitor array and resistor array for configurable switches for switched capacitor circuits. be used
Manish Singhal

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can

to

support

Wednesday, 18, 2012 adaptive Aprilmobile

FPAD or FPAA Field Programmable Analog Device/ Array

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Switch Matrix built by floating gate transistor


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FPAA Architecture- A different approach

Wednesday, April 18, 2012

FPAA

Routing Architecture

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FPAA

CAB Implementation
Continuous Time Signals Discrete Time Signals Discrete Time Signals Switched Capacitor Design (Current) Pulse Based Design (Under Research)
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FPAA

Switched Capacitor Based Design

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FPLA Field Programmable Logic Array


And/Or/Invert architecture with three level fusing

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FPLS Field Programmable Logic Sequencer

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FPID(FPIC) Field Programmable Interconnect devices(chips)

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FPID(FPIC) Field Programmable Interconnect devices(chips)


An FPIC is not really a logic device but rather a

programmable "wiring" device. Through programming, an FPIC connects one pin on the device to another on the device providing programmable interconnect.
FPICs use either SRAM or anti-fuse programming

technology.

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FPID(FPIC) Field Programmable Interconnect devices(chips)

Multi FPGAs connected via FPICs

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Manish Singhal

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Unit -1 Evolution of Programmable Devices


We Covered ........... Introduction to AND-OR structured Programmable Logic Devices- PROM, PLA, PAL and MPGAs;

Combinational and sequential circuit realization using PROM based Programmable Logic Element (PLE); Architecture of FPAD, FPLA, FPLS and FPID devices.

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Wednesday, April 18, 2012

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