Thomson Lcd03b 15et20

TV
SERVICE MANUAL DOCUMENTATION TECHNIQUE TECHNISCHE DOKUMENTATION DOCUMENTAZIONE TECNICA DOCUMENTACION TECNICA
LCD03B
WARNING : ATTENTION : ACHTUNG : ATTENZIONE : IMPORTANTE :
Before servicing this chassis please read the safety recommendations. Avant toute intervention sur ce chssis, lire les recommandations de scurit. Vor jedem Eingriff auf diesem Chassis, die Sicherheitsvorschriften lesen. Prima di intervenire sullo chassis, leggere le norme di sicurezza. Antes de cualquier intervencin, leer las recomendaciones de seguridad.
Code :357 510 10 - 0304 / 6M -LCDB03B Print.

No copying, translation, modification on other use authorized. All rights reserved worldwide. Tous droits de reproduction, de traduction, d'adaptation et d'excution rservs pour tous les pays. Smtliche Urheberrechte an diesen Texten und Zeichnungen stehen uns zu. Nachdrucke, Vervielfltigungen - auch auszugsweise - nur mit unserer vorherigen Zustimmung zulssig. Alle Rechte vorbehalten. I diritti di riproduzione, di traduzione, e esecuzione sono riservati per tutti i paesi. Derechos de reproduccion, de traduccion, de adaptacion y de ejecucion reservados para todos los paises.
Do not disconnect modules when they are energized! Repairs on power supply section are to be carried out only with isolating transformer. Ne pas retirer les modules lorsqu' ils sont sous tension. N'effectuer les travaux de maintenance sur la partie relie au secteur (Switch Mode) qu'au travers d'un transformateur d'isolement. Module nicht bei eingeschaltetem Gert entfernen! Servicearbeiten am Netzteil nur unter Verwendung eines Regeltrenntrafos durchfhren. Non scollegare le piastre quando sono alimentate! Per le riparazioni sulla sezione alimentatore, utilizzare un trasformatore isolatore. No desconectar los mdulos cuando estn activados. Las reparaciones en la seccin de alimentacin de energa deben ser ejecutadas solamente con un transformador de separacin.
Indicates critical safety components, and identical components should be used for replacement. Only then can the operational safety be garanteed. Le remplacement des lments de scurit (reprs avec le symbole ) par des composants non homologus selon la Norme CEI 65 entraine la non-conformit de l'appareil. Dans ce cas, la responsabilit du fabricant n'est plus engage. Wenn Sicherheitsteile (mit dem Symbol Haftung des Herstellers. gekennzeichnet) nicht durch Original - Ersatzteile ersetzt werden, erlischt die
La sostituzione dei componenti di sicurezza (evidenziati con il segno ) con componenti non omologati secondo la norma CEI 65 comporta la non conformit dell'apparecchio. In tal caso "esclusa la responsabilit " del costruttore. La sustitucin de elementos de seguridad (marcados con el simbolo ) por componentes no homologados segun la norma CEI 65, provoca la no conformidad del aparato. En ese caso, el fabricante cesa de ser responsable.
MEASUREMENT CONDITIONS - CONDITIONS DE MESURES - MESSBEDINGUNGEN CONDIZIONI DI MISURA - CONDICIONES DE MEDIDAS

RECEIVER : On UHF,input level : 1 mV, bar test pattern : - PAL, I standard, 100% white. Via the scart socket, input level : 1 Vpp, bar test pattern : Colour, contrast and brightness at mid-position, sound at minimum. Programme selected : PR 01. DC voltages measured between the point and earth using a digital voltmeter. RICEVITORE : In UHF, livello d'entrata 1 mV, monoscopio barre : - PAL, norma G. bianco 100%. Via SCART, livello d'entrata 1 Vpp, monoscopio barre : Colore, Contrasto, Luminosit media, Suono minimo. Programma selezionato PR 01. Tensioni continue rilevate rispetto alla massa con un voltmetro digitale. RECEPTEUR : En UHF, niveau d'entre 1 mV mire de barres - SECAM, Norm L, Blanc 100%. Par la prise Pritlvision, niveau d'entre 1 Vcc, mire de barres . Couleur, contraste, lumire mi-course, son minimum. Programme affect PR 01. Tensions continues releves par rapport la masse avec un voltmtre numrique. EMPFNGER : Bei UHF Eingangspegel 1 mV, Farbbalken : - PAL, Norm G, Weiss 100%. ber die Scartbuchse : Eingangspegel 1 Vss, Farbbalken : Farbe, Kontrast, Helligkeit in der Mitte des Bereichs, Ton auf Minimum. Zugeordnetes Programm PR 01. Gleichspannungen mit einem digitalen Voltmeter zur Masse gemessen.
RECEPTOR : En UHF, nivel de entrada 1 mV, mira de barras : - PAL, norma G, blanco 100%. Por la toma Peritelevision, nivel de entrada 1 Vpp mira de barra. Color, Contraste, luz a mitad de carrera, Sonido minimo. Programa afectado PR 01. Tensiones continuas marcadas en relacion a la masa con un voltimetro digital.
21 20 19 18 17 16 15 14 13 11 10 9 8 7 6 5 3 2 1 4 12
ENGLISH
FRANAIS
AUDIO "D" AUDIO "D" AUDIO "G" AUDIO "BLEU" AUDIO "G" MONO "BLEU" COMMUT. LENTE "VERT" AV LINK "VERT"
DEUTSCH
AUDIO "R" AUDIO "R" AUDIO "L" AUDIO "BLAU" AUDIO "L" MONO "BLAU" AV UMSCHALTUNG "GRN" AV LINK "GRN"
ITALIANO
AUDIO "D" AUDIO "D" AUDIO "S" AUDIO "BLU" AUDIO "S" MONO BLU "COMMUTAZIONE LENTA" "VERDE" AV LINK "VERDE"
ESPAOL
AUDIO "D" AUDIO "D" AUDIO "I" AUDIO "AZUL" AUDIO "I" MONO AZUL "CONMUTACION LENTA" "VERDE" AV LINK "VERDE"
NOTE :
MAIN ... etc. identifies each
pcb module. NOTE :

MAIN ... etc. repres des
platines constituant l'appareil.

HINWEIS :
MAIN ... usw. Kennzeichnung
der Platinen, aus denen das Gert zusammengesetzt ist.

NOTA :
MAIN ... ecc. sigla delle
piastre dell' apparecchio.

NOTA :
MAIN ... etc. marcas de las
placas que constituyen el aparato.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
AUDIO "R" AUDIO "R" AUDIO "L" AUDIO "BLUE" AUDIO "L" MONO "BLUE" SLOW SWITCH "GREEN" AV LINK "GREEN"
NC
"RED" "ROUGE" "ROT" "ROSSO" "ROJA"
NC
"RED" FAST SWITCH VIDEO FAST SWITCH VIDEO VIDEO OR "SYNC" PLUG SCREEN BOX "ROUGE" COMMUT. RAPIDE VIDEO COMMUT. RAPIDE VIDEO VIDEO SYNCHRO BLINDAGE PRISE "ROT" AUSTASTUNG VIDEO AUSTASTUNG VIDEO VIDEO ODER SYNCHRO ABSCHIRMUNG DES STECKERS "ROSSO" "COMMUTAZIONE RAPIDA" VIDEO "COMMUTAZIONE RAPIDA" VIDEO VIDEO O SINCRO INVOLUCRO METALLICO DELLA PRESA "ROJA" "CONMUTACION RAPIDA" VIDEO "CONMUTACION RAPIDA" VIDEO VIDEO O SINCRO BLINDAJE DEL ENCHUFE
: INPUT - ENTRE - EINGANG - ENTRATA - ENTRADA
: OUTPUT - SORTIE - AUSGANG - USCITA - SALIDA
: EARTH - MASSE - MASSE - MASSA - MASA
INFORMATION - INFORMATIONS - INFORMATIONEN INFORMAZIONE - INFORMACIONES
EN
Chassis group table 1 - The electronic chassis configuration (modules) and schematic diagram page numbers. 2 - The chassis configuration.
FR
Le tableau ci-dessous regroupe : 1 - Lenvironnement lectronique de chaque chassis (modules) et le numro de page o il est dcrit. 2 - La dsignation des chassis
DE
Die nachstehendeTabelle umfat: 1 - Die elektronischen Baugruppen (Module) der Chassis varianten und die Seiten auf der sie beschrieben werden 2 - Die Chassisbezeichnung
IT
La tabella qui di seguito contiene: 1 - lambiente elettronico di ogni telaio (moduli) e il numero di pagina nella quale descritto. 2 - La descrizione dei telai
ES
El cuadro siguiente agrupa: 1 - El entorno electrnico de cada chasis (mdulos) y el nmero de pgina donde est descrito. 2 - La designacin de los chasis
Chassis LCD03B
Reference Information Desassembly. 6to7 6to7 8to9 Service Mode 10to15 10to15 10to15 FCB KDB 16to18 16to18 16to18 Inverter DC/DC -19to20 21to22 21to22 Audio Board 25 25 25 Earphone Board 26 26 26 Main Video
15LCDM03B 20LCDM03B 20LCDB03B
3 3 3
23to24 23to24 -
27to41 27to41 27to41
42to58 42to58 42to58
LCD03B First issue 04 / 04
BLOCK DIAGRAM - SCHEMA SYNOPTIQUE - BLOCKSCHALTBILD - SCHEMA A BLOCCHI - ESQUEMA DE BLOQUES
15" ,20" System Block Diagram (EU version)
Inverter LCD Panel

50 pin* 40 pin**
8 pin
8 pin
2 pin
12 pin
Control Board
PFC/DC+DC/Audio Board
30 pin** 20 pin
2 pin
Power Connector
12 pin Keypad/IR Interface
50 pin* 20" model only*
40 pin**
30 pin**
20 pin
15" model only** Tuner Flash AT49BV8192A EEPROM 14 pin
DDC
AD AD9883
Audio Processor TDA7440D
Scaller PW113
Tuner Module
Main Board
D-Sub Audio Input Audio Line Out De-Interlace Chipset PW1230 Video Decoder VPC3230D
60 pin golden finger
60 pin
14 pin Teltext SDA555XFL
Video Board
SCART S-Video Composite Video L/R Audio Input
BLOCK DIAGRAM - SCHEMA SYNOPTIQUE - BLOCKSCHALTBILD - SCHEMA A BLOCCHI - ESQUEMA DE BLOQUES

20" BI
20"BiSonic System Bolck Diagram(EU version) Inverter

10 pin 10 pin 5 pin 8 pin
5 pin 8 pin
2 pin
PFC/DC+DC/Audio Board LCD Panel

50 pin 20 pin
2 pin
IR Board
12 pin
Keypad Board EarPhone Jack
Pow er Connector
12 pin Keypad/IR Interface
50 pin
20 pin
Main Board
AD AD9883 Audio Processor MSP3412G Scaller PW113 Flash AT49BV8192A EEPROM
Tuner
DD C
Tuner Module
14 pin 80 pin golden finger
D-Sub Audio Input Audio Line Out
De-Interlace Chipset PW1230
Video Decoder VPC3230D
80 pin
14 pin Teltext SDA555XFL
Video Board
SCART
S-Video Composit e L/R Audio Video Input
Disassembly process 15LCDM03B

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Slider to extract The AV module
AV module : video and tuner boards
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Disassembly process
20LCDM03B
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20 " LCD TV Boards overview

Power board Inverter board PC board
Earphone board Power board Control board

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AV module
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AV module
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SERVICE MODE - MODE SERVICE - SERVICE-MODE - MODO SERVICIO

Overview
EN
Sound Picture Preferences Installation

Figure Overview OSD
Service Mode Operation Manual

Model support: 15 20 and 20 bi-sonic Service Mode 1. Press the menu button, and then the screen display will appear Overview OSD, below as Figure Overview OSD. Then press the info button and 1, 0and 3 buttons step by step to enter Service Mode. And Figure Service mode will appear on the screen display.
FR
Mode Service 1.Presser la touche Menu lecran de selection ci-dessus apparait Prenez la touche Info, la touche 1 puis les touches 0 et 3 pour acceder au Mode Service
IT
Manuale Procedura Service Mode

Modelli: 15 20 e 20 bi-colonna Service Mode 1. Premere il tasto menu per far visualizzare il menu Sommario, vedi pagina OSD. Poi premere sequenzialmente i tasti info , 1, 0 e 3 per entrare in Service mode. Il menu di Service mode verr visualizzata sullo schermo. Per cambiare pagina premere il tasto Menu. Menu Sommario
DE
ES
Anleitung Service Mode

Fr Modelle: 15, 20 und 20 bi-sonic Service Mode 1. Drcken sie die MENU Taste. Es erscheint das bersicht Men (siehe Abbildung 1). Drcken sie dann nacheinander die Tasten INFO, 1, 0, und 3. Die erste Seite des Service-Modes wird angezeigt (siehe Abbildung 2).
Manual de operacin del Modo Servicio

Para modelos de : 15, 20 y 20 bi-columna Modo Servicio 1. Pulsar la tecla men, en la pantalla se mostrar el men OVERVIEW (NDICE), como se muestra en la figura MENU OVERVIEW (NDICE). A continuacin, pulsar las teclas info, 1, 0 y 3 una tras otra para entrar en Modo Servicio y se mostrar la primera pgina del Modo Servicio en la pantalla.
NAVIGATION INSIDE THE SERVICE MODE - DEPLACEMENT DANS LE MODE SERVICE SUCHE IN SERVICE MODE - OPZIONI NEL SERVICE MODE - BUSQUEDA EN MODO SERVICIO
REMOTE CONTROL - TELECOMMANDE - FERNBEDIENUNG TELECOMANDO - MANDO A DISTANCIA
Changing page - Changement de page Seitenwechsel - Cambiare Pagina - Cambio de pgina
- Press "Menu" button - Appuyer sur la touche "Menu" - Taste "Menu" - Premere " Menu" - Pulse "Menu" Choosing a setting from the menu / setting e value Choix d'un rglage dans un menu / Rglage d'une valeur Wahl einer einstellung in einem men / Einstellung eines wertes Scegliere una Regolazione dal Menu / Selezione di un valore Eleccion de un Ajuste en un menu / Ajuste de un valor
Color temp Red Drive Green Drive Blue Drive Red Offset Green Offset Blue Offset Reset To Default Calibration... Auto Turn on
P-W -
P-N
P-C
V-N
V-C
P-W -
P-N
P-C
V-N
V-C
+ - 123 + - 123 + - 123 + - 123 + - 123 + - 123 190247 Eu 20L0BI Ver 09171I
+ - 123 + - 123 + - 123 + - 123 + - 123 + - 123 190247 Eu 20L0BI Ver 09171I
Tuner 1D on off
Tuner 1D on off
Naviagation up - Change value - Rglage de la valeur - Wert nden - Cambiare valore - Cambiar valor
Naviagation down
> <
VALUE VALUE
LCD03B
10 First issue 04 / 04
P-W -
P-N
P-C
V-N
V-C
+ - 123 + - 123 + - 123 + - 123 + - 123 + - 123 190247 Eu 20L0BI Ver 09171I
Tuner 1D on off
Page1 on service mode
EN
1. Color Temp: P-N means Normal on YpbPr, V-N means Normal on Video mode. Each item decide different gamma curve. 2. Red drive, Green drive and blue drive means gamma RGB gain. Control by scaler 3. Red offset, Green offset and blue offset means gamma RGB offset. Control by scaler 4. Reset To Default: press OK will load all default value on User OSD 5. Calibration: press this botton guide to calibrate A/D converter white and black level on PC input. Also guide to calibrate A/D converter PbPr offset on YpbPr input 6. Auto Turn On: toggle on/off control auto turn on . this function for factory burn-in sets . Only active on selection PC input then main power off. 7. Green lable: Tuner s/w version, time while compiling s/w, model name, main s/w version.
IT
1. Color Temp: P-N significa Normale in funzione YPbPr, V-N significa Normale in funzione Video. Ogni selezione determina una differente curva di risposta. 2. Red Drive, Green Drive e Blue Drive significa guadagno gamma RGB. Controllato da una scala. 3. Red Offset, Green Offset e Blue Offset significa Offset gamma RGB. Controllato da una scala. 4. Reset To Default: premendo OK verranno caricati tutti i valori di Default nel Menu Utente. 5. Calibration: premere questo tasto guida per calibrare il livello Bianco /Nero del convertitore A/D dellingresso PC. Calibra anche loffset del convertitore A/D PbPr dellingresso YpbPr. 6. Auto Turn On: Commutatore controllo automatico On/Off. Funzione utile per le prove di bruciatura in fabbrica. Attivando On si attiva lo spegnimento automatico in base al segnale di ingresso PC. 7. Caselle in Verde: Versione Software Tuner, Data compilazione Software, Nome modello, Versione software Main.
FR
1. Color Temp: Temperature des couleurs. P-N correspond un reglage Normal /YpPr V-N correspond un reglage normal / mode vido chaque item permet de rgler la courbe de gamma. 2. Red drive, Green drive and blue drive: green drive et Bleu drive correspond aux reglages de gain du gamma RVB ( control par le scaler). 3. Red offset, green offset et blue offset: correspond aux rglage doffset du gamma RVB ( control par le scaler ). 4. Reset To Default: Appuyer sur OK. Charger les valeurs par defaut sur le menu OSD. 5. Calibration: Appuyer sur OK pour valider. Etalonne les niveaux blanc et noir du convertisseur A/D de l entre PC Etalonne egalement les offset Pb/Pr du convertisseur A/D sur l entre Ypb Pr 6. Auto Turn On: Option On/OFF valide le reglage usine, le dmarrage automatique. Seulement active sur lentre PC. 7. Green lable Indication dans les fentres vertes: Version software tuner, temps de compilation software , nom du modele, version, version du software principal.
ES
1. Color Temp: P-N significa Normal en modo YpbPr, V-N significa Normal en modo Video. Cada elemento tiene una curva de gamma distinta. 2. Red drive, Green drive y Blue drive ajustan la ganancia de la gamma RGB. 3. Red offset, Green offset y Blue offset ajustan el offset de la gamma RGB. 4. Reset To Default: Al pulsar OK se cargarn todos los valores por defecto del men de usuario 5. Calibration: Pulsando este botn ayuda a calibrar el convertidor A/D de nivel de blanco y negro para la entrada de PC. Tambin sirve para calibrar el offset del convertidor A/D PbPr en la entrada YpbPr 6. Auto Turn On: Selecciona el control del autoencendido. Slo activo en la seleccin de entrada de PC y desconexin de red. 7. Casillas en verde: versin de software del sintonizador, datos de compilacin del s/w, modelo, versin del s/w principal
DE
Seite 1 des Service-Modes 1. Color Temp: P-W steht fr Warm im YPbPr-Mode, P-N steht fr Neutral bei YPbPr-Mode, P-C steht fr Kalt im YPbPr,-Mode, V-W steht fr Warm im Video-Mode, V-N steht fr Neutral im Video-Mode, V-C steht fr Kalt im Video-Mode. Alle Modi haben unterschiedliche Gamma-Kennlinien. 2. Red Drive, Green Drive und Blue Drive: Einstellung der RGBVerstrkung 3. Red Offset, Green Offset und Blue Offset: Einstellung des RGBOffsets 4. Reset to Default: Durch Drcken der OK-Taste werden die Benutzerdaten gelscht und die Defaultwerte geladen. 5. Calibration: Kalibrieren der Schwarz- und Weipegel des ADWandlers des PC-Eingangs 6. Auto Turn On: Aktivierung des automatischen Einschalten des Gertes ber den PC-Eingang. (nur fr den Burn-In in der Farbrik vorgesehen). 7. Grn markierte Felder: Software-Version Tuner, Compiler-Daten, interne Modellbezeichnung, Version der Hauptsoftware.
LCD03B
First issue 04 / 04
OSD Position Factory Save... Auto Adjustment Video Int Gain Colour Tuner Set V-Level Tuner Get V-Level Set First INstallation Exit
+ - 123 + - 123 -
NotEnabled...
Tuner Set Factory Programs
EN
8. OSD position: OSD position selection. 9. Factory Save: press OK save all parameters on service mode. 10. Auto Adjustment: auto adjustment new timing(position ,phaseetc). Only active on PC mode. 11. Video int Gain: this slider bar used to align brightness spec of Video mode. Larger value bring to brighter. Control by Video decoder VPC3230 12. Colour: adjust color saturation. Same funct ion on User OSD. Control by Video decoder VPC3230. 13. Tuner Set V-Level: not used 14. Tuner Get V-Level: not used. 15. Set First Installation: Enable means TV will pop-up installation OSD at next power-on. 16. Tuner Set Factory Programs: not used. 17. EXIT: exit service mode.
IT
8. OSD position: Selezione posizione OSD. 9. Factory Save: Premere OK per salvare tutti i parametri del service Mode. 10. Auto Adjustment: Auto regolazione nuove temporizzazioni ( posizione, fase ... etc). Attivo solo in funzione PC. 11. Video int Gain: Regola il livello di luminosit in funzione Video. Pi alto il valore pi limmagine luminosa. Controllo tramite il Decoder Video VPC3230. 12. Colour: Regola la saturazione del colore. Stessa funzione del Menu utente. Controllo tramite Video Decoder VPC3230. 13. Tuner Set V-Level: Non utilizzato. 14. Tuner Get V-level: Non utilizzato. 15. Set First Installation: Enable significa abilitazione, allaccensione, del menu di prima installazione. 16. Tuner Set factory Programs: Non utilizzato. 17. EXIT: Uscita dal Service Mode.
FR
8. OSD position: Selection de la position OSD. 9. Factory Save: pressez la touche OK pour sauvegarder tous les parametres du mode service 10.Auto Adjustment: Actif seulement en mode PC. Auto rglage des nouveaux parametres de temps ( Position, phase..). 11. Video int Gain: Rglage de la lumire en mode vido. Contrle par le dcodeur vido VPC 3230. La position leve du curseur augmente la lumire. 12. Colour: Rgle la saturation de la couleur. 13. Tuner Set V-Level:Pas utilis. 14. Tuner Get V-Level: Pas utilis. 15. Set First Installation: Signifie que la TV la prochaine mise sous tension affichera le menu d installation. 16. Tuner Set Factory Programs: Pas utilis. 17. EXIT: Sortie du mode Service.
ES
8. OSD position: Selecciona la posicin del OSD. 9. Factory Save: Al pulsar OK, se guardan todos los parmetros del modo servicio. 10. Auto Adjustment: Autoajuste de nuevo timing (posicin, faseetc). Slo activo en modo PC. 11. Video int Gain: Esta barra deslizante se utiliza para ajustar las especificaciones del brillo en el modo Video. Cuanto mayor sea el valor, ms brillante. Control por el descodificador de Video VPC3230 12. Colour: ajusta la saturacin del color. Es la misma funcin que el men de usuario. Control por el descodificador de Video VPC3230. 13. Tuner Set V-Level: no utilizado. 14. Tuner Get V-Level: no utilizado. 15. Set First Installation: Enable significa que la prxima vez que se conecte el TV aparecer el men de primera instalacin. 16. Tuner Set Factory Programs: no utilizado. 17. EXIT: Salida del Modo Servicio.
DE
Seite 2 des Service-Modes 8. OSD Position: Wahl der Men-Position auf dem Bildschirm 9. Factory Save: Drcken der OK-Taste speichert alle Einstellungen des Service-Modes ab. 10. Auto Adjustment: Automatischer Abgleich von Timing, Lage, Phase usw. im PC-Mode 11. Video Int Gain: Helligkeitsvoreinsteller fr den Video-Mode. Steuerung ber den Videodecoder VPC3230. 12. Colour: Einstellung der Farbsttigung; gleiche Funktion wie die Benutzersteuerung. Steuerung ber den Videodecoder VPC3230. 13. Tuner Set V-Level: nicht benutzt 14. Tuner Get V-Level: nicht benutzt 15. Set First Installation: Enable lsst beim nchsten Einschalten des Gertes nach einer Netztrennung das Installationsmen erscheinen. 16. Tuner Set Factory Programs: nicht benutzt. 17. Exit: Verlassen des Service-Modes.
LCD03B
First issue 04 / 04
Pw Gamma Scale Mode VPC AGC ON VPC AGC OFF
Automatic
HV Lock Sensitivity Color Delay Audio Gain Pb Offset Pr Offset - NotEnabled... -
+ - 123 + - 123 + - 123 + - 123 + - 123 -
Enter PW1230 Adjustment Page...

EN
IT
18. PW Gamma: Selezione curva gamma. In Automatic viene selezionata automaticamente la curva gamma ideale, in base alla scelta utente Calda, Fredda o Neutra, nella funzione Tonalit . Si consiglia di non cambiare valore. 19. Scale Mode: Selezione Rapporto schermo. 20. VPC AGC ON: Attiva, nel Decoder Video, il Controllo automatico del Guadagno (Regolazione livello ingresso analogico). 21. VPC AGC OFF: Disabilita, nel Decoder Video, il Controllo Automatico del Guadagno. 22. HV Lock Sensitivity: Sensibilit Sync HV Tuner. Si consiglia di non cambiare valore. Livello soglia per saltare eventuali emittenti con segnale debole. 23. Color Delay: Regola il ritardo colore rispetto al segnale video. Utilizzato per la fabbrica. Si consiglia di non cambiare valore. 24. Audio Gain: Non utilizzato. 25. Pb offset: Regola loffset Pb sul segnale YpbPr in ingresso. 26. Pr offset: Regola loffset Pr sul segnale YpbPr in ingresso. Le regolazioni menzionate nei punti 25 e 26 possono essere eseguite automaticamente come indicato nella riga Calibration di pagina 1. 27. Enter PW Adjustment page: Controllo parametric Deinterlacer. Utilizzato in fabbrica. Si consiglia di non cambiare valore.
18. PW Gamma: gamma curve selection. Automatic means pick-up proper gamma curve automatically when user choose Normal, Warm and Cool. Value change is not recommended. 19. Scale Mode: screen ratio selection. 20. VPC AGC ON: turn on Video decoder Auto gain control (analog input level adjustment.). 21. VPC AGC OFF: turn off Video decoder Auto gain control. 22. HV Lock Sensitivity: Tuner HV sync sensitivity. Value change is not recommended. Fake programme be detected or Real programme be skipped. 23. Color Delay: Color timing delay which only impact on Video mode. For development only. Value change is not recommended 24. Audio gain: not used. 25. Pb offset: adjust Pb offset on YpbPr input. 26. Pr offset: adjust Pr offset on YpbPr input. These 2(25,26) Functions above could be automatically done by Calibration page1. 27. Enter PW1230 Adjustment page: Deinterlacer parameters control. For development only. Value change is not recommended.
FR
18. PW Gamma: Selection de la courbe de gamma Automatic correspont loptention de la courbe de gamma approprie quand lutilisateur choisit la position froide, neutre, chaude ou le rendu des couleurs est meilleur. il est deconseill de slectionner la position value Change. 19. Scale Mode: Selection format decran. 20. VPC AGC ON:Active le Vido dcodeur. Slectionnez Auto gain Control ( rglage du niveau dentre analogique ). 21. VPC AGC OFF:Dsactive le Vido dcodeur. Slectionnez Auto gain Control. 22. HV Lock Sensitivity: Sensibilit de la Synch. HV tuner. Il est imperatif de ne pas modifier sa valeur. Le tuner dtectera les mauvais progrmmes ou passera les programmes corrctes. 23. Color Delay: Rglage du dlai couleur en mode vido. Rglage usine, ne pas modifier. 24. Audio gain: Non utilis. 25. Pb offset: Rglage de loffset Pb sur l entre Ypb Pr. 26. Pr offset: Rglage de loffset Pr sur lente Ypb Pr. Ces 2 rglages ( 25, 26 ) sont automatiquement effectues par calibration de la page 1 du mode service. 27. Enter PW1230 Adjustment page: Ne pas modifier. Rglage usine Contrle les parametres Deinterlacer.
ES
18. PW Gamma: Seleccin de la curva de gamma. Automatic quiere decir que recuperar automticamente la curva ideal de gamma cuando el usuario seleccione Normal, Clido o Fro. No se recomienda cambiar este valor. 19. Scale Mode: selecciona la relacin de pantalla. 20. VPC AGC ON: activa el "control automtico de ganancia" del descodificador de video (ajuste del nivel de entrada analgica). 21. VPC AGC OFF: desactiva el "control automtico de ganancia" del descodificador de video. 22. HV Lock Sensitivity: Sensibilidad de los sincronismos HV del sintonizador para la bsqueda de emisoras. No se aconseja cambiar este valor. Los canales reales pueden ser ignorados o los falsos memorizados. 23. Color Delay: Retardo del color en modo Video. No se recomienda cambiar este valor 24. Audio gain: no utilizado. 25. Pb offset: ajuste del offset de Pb en la entrada YpbPr. 26. Pr offset: ajuste del offset de Pr en la entrada YpbPr. Estas 2 funciones anteriores (25,26) sern hechas automticamente en Calibration de la pgina 1. 27. Enter PW1230 Adjustment page: control de los parmetros de Deinterlacer. No se recomienda cambiar este valor. 36. V. Position: ajusta la posicin Vertical sobre la entrada PC.
DE
18. PW Gamma: Auswahl der Gamma-Kennlinie: Bei Einstellung Automatic wird automatisch die jeweilige Kennlinie gewhlt, wenn der Benutzer zwischen Warm, Neutral oder Kalt umschaltet. Eine nderung dieser Grundeinstellung ist nicht empfehlenswert. 19. Scale Mode: Wahl des Bildformates 20. VPC AGC ON: Aktiviert die automatische Verstrkungsregelung des Videodecoders (Anpassung der Pegel der Analogeingnge) 21. VPC AGC OFF: Deaktiviert die automatische Verstrkungsregelung des Videodecoders. 22. HV Lock Sensitivity: Empfindlichkeit des Synchrondetektors im Tuner. Eine nderung dieser Grundeinstellung ist nicht empfehlenswert, da sonst der Sendersuchlauf falsche Ergebnisse liefern knnte. 23. Color Delay: Einstellung Farbversatz. Eine nderung dieser Grundeinstellung ist nicht empfehlenswert. 24 Audio Gain: nicht benutzt 25. Pb Offset: Einstellung des Pb Offsets bei YPbPr. 26. Pr Offset: Einstellung des Pr Offsets bei YPbPr. Zu 26 und26: Der Abgleich dieser Funktionen kann automatisch mit der Funktion Calibration auf der Service-Mode Seite 1 durchgefhrt werden. 27. Enter PW1230 Adjustment Page: Abgleich der Parameter des Deinterlacers. Eine nderung dieser Grundeinstellungen ist nicht empfehlenswert.
LCDB03B
First issue 04 / 04
Video Format Scale Mode RGB Filter Video Filter Monitor Sync
NTSC-M
On
Off
Reset All Nvram Test Pattern H.position V.position

- NotEnabled... -
+ - 123 + - 123 -
EN
28. Video Format: select Video standard. Force to Auto. 29. Default Language: set default language. Same function on User OSD. 30. RGB filter: sharpness filter of PC port of scaler. Impact on PC and YpbPr input 31. Video filter: sharpness filter of Video of scaler. Impact on TV Video and YcbCr. 32. Monitor Sync: force to On. So that Video format can auto detection. 33. Reset All Nvram: press OK will reset all parameters on service mode, including color temp settings, brightness setting.etc. 34. Test Pattern: display test-pattern which generate by scaler. Only active on PC source. 35. H.Position: adjust horizontal position while PC source in 36. V.Position: adjust Vertical position while PC source in
IT
28. Video Format: Seleziona lo standard Video. Forzato su Auto. 29. Default language: Seleziona la lingua. Stessa funzione del Menu Utente. 30. RGB Filter: Definizione filtro del demoltiplicatore (scaler) della porta PC. Influisce sugli ingressi PC e YpbPr. 31. Video Filter: Definizione filtro del demoltiplicatore del segnale Video. Influisce sui segnali TV Video e YcbCr. 32. Monitor Sync: Forzato su On. In questo modo pu essere rilevato automaticamente il Formato Video. 33. Reset All Nvram: Premendo OK verranno resettati tutti I parametri del Service Mode, inclusi regolazione Temp. Colore, Regolazione Luminosit, ... ecc.). 34. Test Pattern: Attivazione serie di segnali test. Attivo solo con ingresso PC. 35. H. Position: Regola la posizione Orizzontale in ingresso PC. 36. V. Position: Regola la posizione Verticale in ingresso PC.
FR
28. Video Format: selectionne le standard Vido. Forcer Auto. 29. Default Language: Selectionne la langue par dfaut. Mme fonction que le rglage utilisateur. 30. RGB filter: Filtre Contour RGB du Port PC. Agit sur les entres PC et Ypb Pr. 31. Video filter: filtre contour Vido. Agit sur les entres TV Vido et Ye bCr. 32. Monitor Sync: Forc ON Auto dtection du format Vido. 33. Reset All Nvram: Appui sur OK. Reset De tous les parametres du MODE SERVICE incluant la temprature de couleur, Contour... etc. 34. Test Pattern: Affichage de la mire interne. Actif seulement en mode PC 35. H.Position: Rglage Horizontal en mode PC. 36. V.Position: Rglage Vertical en mode PC.
ES
28. Video Format: selecciona el estndar de Video. Auto fuerza a modo automtico. 29. Default Language: selecciona el idioma por defecto. Hace la misma funcin que el men "Usuario". 30. RGB filter: filtro de nitidez. Vlido para las entradas de PC e YpbPr. 31. Video filter: filtro de nitidez. Vlido para las entradas de TV, Video e YcbCr. 32. Monitor Sync: forzado a On. El formato de video puede ser autodetectado. 33. Reset All Nvram: pulsando OK se borrarn todos los parmetros del Modo Servicio, incluyendo los ajustes de temperatura de color, ajustes de brillo y contraste....., etc. 34. Test Pattern: muestra unas cartas de ajuste generadas internamente. Activo solamente en modo PC. 35. H. Position: ajusta la posicin horizontal sobre la entrada PC. 36. V. Position: ajusta la posicin Vertical sobre la entrada PC.
DE
28. Video Format: Auswahl des Videostandards. Sollte auf Auto stehen. 29. Default Language: Auswahl der Mensprache; gleiche Funktion wie die Benutzersteuerung. 30. RGB Filter: Abgleich des Schrfefilters des Scalers fr PC-Mode und YPbPr. 31. Video Filter: Abgleich des Schrfefilters des Scalers fr den VideoMode. 32. Monitor Sync: Sollte immer auf On stehen damit das Videoformat automatisch erkannt wird. 33. Reset All Nvram: Drcken der OK-Taste setzt alle Parameter im Service-Mode ( auch Farbtemparatur, Helligkeit usw.) zurck. 34. Test Pattern: Zeigt ein vom Scaler erzeugtes Testmuster auf dem Bildschirm. Nur im PC-Mode. 35. H.Position: Horizontallage fr PC-Eingang. 36. V.Position: Vertikallage fr PC-Eingang.
LCD03B
First issue 04 / 04
Life Time Project Code Panel Resolution NvRam Ver. HXV Res / HFreq HXV Total Mode Num DCLK Factory Save...
00034:10 EU20L03B 800 X 600 OC / 14 649 X 548 864 X 625 55 41.0 M
00033:35
15,52
Tuner: 1D
EN
37. Life Time: The left item means the time added by stand by + TV on The right item display the time of TV-on only. 38. Project Code: as title 39. Panel Resolution: as title 40. NvRam Ver. Display EEPROM data veriosn. 41. HXV Res / Hfreq: timing information. Resolution and H clock 42. HXV Total: timing information. 43. Mode Num: timing information. Sequence of Timing chart. 44. DCLK: timing information. Data clock These 4(41,42,43,and 44) items above are for development check only. 45. Factory save: save factory parameters. 46. Green label: display tuner s/w version.
IT
37. Life Time: Il contatore a sinistra indica il tempo totale di funzionamento in Stand By + apparecchio acceso. Il contatore a destra indica il tempo totale di funzionamento ad apparecchio acceso (ON). 38. Project code: Codice progetto. 39. Panel Resolution: Risoluzione pannello. 40. NvRam Ver: Versione EEPROM. 41. HXV res / Hfreq: Informazione timing. Risoluzione e Clock H. 42. HXV Total: Informazioni timing. 43. Mode Num: Informazioni Timing. Sequenza carta tempi. 44. DCLK: Informazioni Timing. Clock Data. I valori menzionati nei punti 41, 42 43 e 44 sono solo per la fabbrica 45. Factory save: Parametri memorizzati in fabbrica. 46. Casella verde: Versione software Tuner
FR
37. Life Time: -Indication de gauche: indique le temps fonctionnement total du TV: On+ Stand by. -Indication de droite: Indique le temps de fonctionnement du TV en On seulement. 38. Project Code: Info code. 39. Panel Resolution: Resolution du panneau dcran. 40. NvRam Ver. Version EEPROM. 41. HXV Res / Hfreq: Information de temps resolution et Horloge H. 42. HXV Total: Information de temps. 43. Mode Num: Information de temps 44. DCLK: Information de temps. Data clock. Ces 4 lignes dinformation sont utilises en dveloppement. 45. Factory save: Sauvegarde les paramtres usine. 46. Green label: Affiche la version de Software du tuner.
ES
37. Life Time: Los nmeros de la izquierda muestran la suma de las horas en stand-by + TV encendido. Los de la derecha indican slo las horas de TV encendido. 38. Project Code: informativo 39. Panel Resolution: informativo 40. NvRam Ver. Indica la versin de la EEPROM. 41. HXV Res / Hfreq: informacin de timing. Resolucin y frecuencia H. 42. HXV Total: informacin de timing. 43. Mode Num: informacin de timing. 44. DCLK: informacin de timing. Frecuencia del reloj. Estas 4 funciones anteriores (41,42,43,y 44) son informativas. Slo son para comprobacin. 45. Factory save: memoriza los valores de fbrica. 46. Casilla en verde: indica la versin de software del sintonizador.
DE
Seite 5 des Service-Modes 37. Life Time: Betriebsstundenzhler, links: Summe Standby-Zeit und TV-Ein, rechts: nur TV-Ein-Zeit. 38. Project Code: 39. Panel Resolution: Auflsung der LCD-Panels 40. NvRam Ver. : Version EEPROM-Daten 41. HXV Res / HFreq:Timing-Information (Auflsung und H-Clock) 42. HXV Total: Timing Information 43. Mode Num Timing Information 44. DCLK: Timing Information Data Clock 45. Factory Save: Daten des Service-Modes speichern. 46. Grn hinterlegtes Feld: Version Tuner-Software
CONTROL SCHEMATIC DIAGRAM - SCHEMA DES CIRCUITS COMMANDES - SCHALTBILD BEDIENTEIL - SCHEMA DEI CIRCUITI COMANDI - ESQUEMA DE LOS CIRCUITOS MANDOS
CONTROL 20 BI)
12V
R1
R9
10K
1K
Q1 2N3 906
+ C1 5 100U 16V
+ C1 6 100U 16V 7 8 +
12V 2
G2
J2 R1 0 5 4 3 2 1 TP 1 TP 2 TP 3 TP 4 TP 5 EAR_MUTE A udio_R Audio_L + 10U C9 16V 51.1KF 6 R1 1 5 16V 4 C4 R2 51.1KF TDA2 822D U1 + C1 0 1 + 3 100U C1 1 + 16V + 100U 16V
R5
C1 1000P
J1 7 6 1 2 4 5 3 7 6 1 2 4 5 3 2210165091
R1 2 39 4.7 R6
C2 1000P
G1
12V
10U
C6 0.1U 25V K
39 R1 3 4.7 C7 0.1U 25V K D1 TZMC 5V 1 D2 TZMC 11 D3 TZMC 5V 1
C3 100 0P
10K R8 1K R7 1K + C1 2 100U 16V + C1 3 100U 16V
D4 TZMC 5V 1
D5 TZMC1 1
D6 TZMC 5V 1
R1 4 47K
J3 20L1033010 V5S 1 R3 10K 1N4148 + C1 4 100U 16V 1
3 Q2 2N3 904 2 R1 5 10K 20L 0BI 2
D7
10 9 8 7 6 5 4 3 2 1
G1
10 9 8 7 6 5 4 3 2 1
TP 6 TP 7 TP 8 TP 9 TP 10 TP 11 TP 12 TP 13 TP 14 TP 15
KP D0 KP D1 KP D2 KP D3 KP D4 KP D5 1 1 SW6 3 SW5 3 1 SW4 3 1 SW3 3 1 SW2 3 1 SW1 3
Q3 2N3904 R4 10K V5S
G2
2 2 5 4
Optical
Points OP1 OP OP2 OP OP3 OP OP4 OP OP5 OP OP6 OP OP7 OP
KEY PA D BOAR 48.M2302.A00 W ednesday , Septem ber 24, 2003
H1 HOLE -V8 6 7 8 9 1 2 3 4 5
H2 HOLE -V 8 6 7 8 9 1 2 3 4 5
OP8 OP
OP9 OP
OP10 OP
OP11 OP
OP12 OP
OP13 OP
OP14 OP
IR PREAMPLIFIER - IR PREAMPLIFICATEUR - IR VORVERSTARKER - PREAMPLICATORE IR

( IR PREAMPLIFIER 20BI )
IR Sensor P/N :05.04856.010 for the USA IR Sensor P/N :05.04833.010 for the EU
U1
TSOP4856
R4 33 0 4 3 R1 33 0 VOUT GND VCC V5S
V5S J3 12 11 10 9 8 7 6 5 4 3 2 1 12 11 10 9 8 7 6 5 4 3 2 1 TP 1 TP 2 L2 TP 3 L3 TP 4 L4 TP 5 KP D0 TP 6 KP D1 TP 7 KP D2 KP D3 TP 8 KP D4 TP 9 TP 10 KP D5
1 2 3
LE D1 GREEN/RED
R2 330
20L1033012
V5S
G2
10 9 8 7 6 5 4 3 2 1
10 9 8 7 6 5 4 3 2 1
TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20
G2 J2 20L1033010
G1
G1
+ C1 4.7U 25V
R3 5.1K
IR BOARD
H1 HO LE-V 8 6 7 8 9 1 2 3 4 5
H2 HOL E-V8 6 7 8 9 1 2 3 4 5
Optical Points OP1 OP OP2 OP OP3 OP OP4 OP OP5 OP OP6 OP OP7 OP
AUDIO CHANNEL SCHEMATIC DIAGRAM - SCHEMA DES CIRCUITS AUDIO - SCHALTBILD MEHRKANAL AUDIO - SCHEMA DEI CIRCUITI AUDIO - ESQUEMA DE LOS CIRCUITOS AUDIO
(AUDIO 20 BI)
AUD_L
R505 47K C509 470 25V IEL) C505 470 25V (ELI C506 0,1 25V
+19V
R564 2K R565 2K R566 2K
VCC 2
ZD557 12V
P_GND 3VCC C510 0.1 16V R501 26,1K C504 0,22 16V 13
IC501 TDA7266 R567 2K
AUD_L
4 IN1
OUT1+
PWR_GND
R503 10K
C501 1000P 50V 7 R506 47K C503 10 16V (EL) S_GND 12 C508 0.22 16V 6 MUTE IN2 ST-BY OUT1Vref OUT2+ 15
BD501 (0805) (Bead) 1 2 BD503 (Bead) BD502 (Bead) BD504 (Bead) 2 3 4
CN601
S_GND C511 0.1 16V S_GND R502 26,1K
S_GND
AUD_R
R518 47K Q506 2N3904
Q505 2N3904 C502 10009 50V R516 20K
R504 10K OUT28 PW-GBD P_GND 14
R507 10K
MUTE
C507 100 16V (el) R517 20K
S_GND S_GND Q501 2N3904 R509 47K
+12V
R511 47K ZD 501 9.1V
VCC AUD_L S-GND AUD_R

EAR_MUTE R513 47K R513 20K Q503 2N3904 R508 20K Q502 2N3904
R510 20K
CN602=> CN602
R515 47K
Q504 2N3904 R514 20K
R512 20K S_GND NOTES: 1. Resistor values are in ohm, K = 1,000 ohm, M = 1,1000 000 ohm 2. All resistors are SMD 0603 5% exept where otherwise indicated S_GND 3. All capacitors are SMD 0603 5% exept where otherwise indicated 4. Represents PCB common ground
DC - DC CONVERTER SCHEMATIC DIAGRAM - SCHEMA CONVERTISSEUR DC -DC -SCHALTBILD GLEICHSTROMUMFORMER - SCHEMA CONVERTITORE CC - CC ESQUEMA CONVERTIDOR CC - CC
( DC/DC 15 )
POWER_ON
CN702 CN701 PWR-JACK
DC - DC CONVERTER SCHEMATIC DIAGRAM - SCHEMA CONVERTISSEUR DC -DC -SCHALTBILD GLEICHSTROMUMFORMER - SCHEMA CONVERTITORE CC - CC ESQUEMA CONVERTIDOR CC - CC
( DC/DC 20 BI )
+19V UREF
F702 T 2A 69.420D1.111 F701 T 3A 69.43001.101 C702 220 25V (el)
Q701 IRFR5305 Q703 2N3904 R715 1,8K L701 150
+5VS
Q707 FO59435
VCC
C705 220 25V (EL) C718 0.1 25V D701 RB060L-4D D703 RB060L-4D R725 330 R724 1K Q708 2N3904 R731 47K R723 3 01K C707 0,1 25V R729 47K
R717
R702 10K R703 10K C710 4700P 50V R704 20K
R738 3K
UREF
C715 1 16V R714
Q704 2N3905 ZD702 2MM 5,1V
C714 470P 50V (NPD) 1 CT 2 SCP
R706 10K
ZD702
POWER_ON
R730 20K C704 47 16V
+5VS
2MM 6,1V Q702 IRFR5305
3 1 CN+
4 1 CN-
5 1 FBK
6 1 DTC
7 1 OUT
8 GND R713 47K C709 1 25V Q705 2N3904 R719 1.8K C716 1 16V R739 3K R721 0 C719 0.1 25V
IC701
1 CN+ SCP REF 16 15 14
TL1451AC
2 OUT 2 DTC 2 FBK 2 CNVCC 13 12 11 10 9
+12V
C706 220 25V (el) D702 RB060L-4D D704 RB060L-4D R727 1K R733 3K R726 8,66K C708 0,1 25V R728 2K Q709 2N3906
UREF
UREF
R732 20K
C713 4700p 50V R705 10k R708 10k
R707 20k
R710 0
Q706 2N3904
12V ZD703
ZD704 12V
+12V
R709 47k
DTC
DTC
R734 47K Q710 2N3904
L702 47
Q710 2N3904 Q712 2N3906
R735 47K
CN702 ON/OFF LCD_ON +12V +5VS VCC +19V PWR_ON

(Bead) C564 0,1 25V 0,1 25V 1 3 5 2 4 6 8 10 12 14 17 19 21 S_GND L501 (Bead) C562 0,1 25V PWR_GND
CN703
BD701 (Bead) 8
+5VS PWR_GND LCD_BR ON/OFF

C717 220 25V R740 20K
LCD_BR
R737 20K
R736 20K
+15V
C701 220 25V PWR_GND
7 6 5 4 3
LCD_ON
R741 3K R742 47K
7 9 11 13 15 L502 L503 18 20
BD702 (Bead)
CN701=>CN502
2 BD501 (Bead)
2 1
+19V
Q713 2N3904 R743 20K
CN701<=CN502
+19V 1 2 3 C501 470 25V (ELI)
MUTE AUDIO_L
(Bead)
AUDIO_R
4 BD502 (Bead)
NOTES:
1. Resistor values are in ohm, K = 1,000 ohm, M = 1,1000 000 ohm 2. All resistors are SMD 0603 5% exept where otherwise indicated 3. All capacitors are SMD 0603 5% exept where otherwise indicated 4. Represents PCB common ground
GND
INVERTER SCHEMATIC DIAGRAM - SCHEMA DE LA PLATINE INVERSEUR - SCHALTBILD INVERTER - SCHEMA INVERTER - ESQUEMA DEL INVERSOR
( INVERTER 15 / 20 )
CN601
CN603
CN604 CN602
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 1/7)
+5VS
+9 V R22 150 DN1 BAV99 DN2 BAV99 DN3 BAV9 9 D9 TZMC5V1 + R2 3 150
OP5 V OP5 V C 124 0 .1U K
J2
(For
7 6 1 2 4 5 7 6 1 2 4 5 3
TP2 TP4 C1 C2
EMI)
[P.6]
R1 R3 1K 1K R6 10K R7 10K
input output
R85 600 OHM R86 600 OHM D11
LI3 RI 3
U24
VCC
R 110 75
[P.6]
D13 TZM C5V1
RED_ IN C90 47U 16V
*2
GND
1
MM1031XMR R 138 0
VR_ IN
[P.1]
3
221 0165031
10 00P J 10 00P J TZM C5V1
16
VR _GND
[P.1]
TZM C5V1
D12
1 1
1 1
D14 TZM C5V1
J3
TP5 GS DA TP7 TP1 0 TP1 1 GS CL
11 12 13 14 15
D-Sub15
6 1 7 2 8 3 9 4 10 5
OP5 V R1 G1 B1 TP9 TP3 TP6 TP8 R8 75 R9 75 R2 R4 R5 R10 75 47 47 47 C3 47P 50V J C4 47 P 50V J C 121 10 U C 122 10 U C 123 10 U C5 47 P 50V J OP5 V P C_5V C 126 0 .1U K BLUE_ IN 16 V 16 V 16 V RED_ IN GREEN_IN BLUE_ IN
[P.2]
2
[P.2] [P.2]
G REEN_I N
C 125 0 .1U K
+ + +
U25
VCC
*2
GND
R 115 75 VY_ IN
[P.1]
MM1031XMR R 139 0
(For
[P.1] V Y_GND [P.6] Aud io_L_Lin e [P.6] Audio_ R_Line
2
D15
EMI)
7 6 1 2 4 5 3 7 6 1 2 4 5 3
J1
R87 600 OHM R88 600 OHM C1 30 D17 10 00P TZMC5V1 TZMC5V1 10 J 00P J C1 31
17
U26
VCC
R 120 75
*2
GND
1
MM1031XMR
VB_IN
[P.1]
1 1
D6 TZM C5V1
D8 TZM C5V1
1 1
TZMC5V1
TZMC5V1
A udio Line out(22 10165031 )
D16 R 140 0 VB_GN D
D18 TZMC5V1
D19 27 V
D2 0 27V
[P.1]
TZMC5V1
D5
D7
R 136 R 137 +5VS
1K 1K R14 R13 +5VS D1 C7 C9 P C_5V 1N4148 U2 R1 5 4.7K GS CL R1 6 4.7K D2 0 .1U K C1 0 0 .1U K C8 0.1U K 0.1U K U1 47 47
RGB_VS RGB _HS
[P.2] [P.2]
J5
+5VS 0.1U K C6
100P J C1 36
C1 37 100P C1 38 100P C1 39 100P
DN 8 BAV99 3
DN 9 BAV9 9 3
1N4148
OPE N
OPE N
OPE N
1 2 3 4 5 6 7 8
C1 + V+ C1C2 + C2VT2OUT R2I N

SP 232ECN
VCC GND T1OUT R 1IN R1OUT T1IN T2IN R2OUT
16 15 14 13 12 11 10 9
[P.4] [P.4] [P.4] [P.4] [P.4]

UART _RX UAR T_TX RX TXD
V CLK VVS VHS V PEN VF IELD
[P.4]
RX [P.4] TXD [P.4] VY[0..7 ]
VY0 VY1 VY2 VY3 VY4 VY5 VY6 VY7
8 7 6 5
VCC WP SCL SDA
A0 A1 A2 GND
1 2 3 4
C1 1 0 .1U K
[P.4]
V UV[0..7 ]
GS DA
V UV0 V UV1 V UV2 V UV3 V UV4 V UV5 V UV6 V UV7
AT2 4C02A
Screw Holes
[P.7] [P.7] [P.7] [P.7]
+12 V +5VS VC C +9 V
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
G F60
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
VY _I N VY_GND VB_ IN VB_ GND VR _IN V R_GND RI 1 LI1 RI 2 LI2 RI 4 LI4 INPUT_DET AV_ DET TV_DET SDA SCL DECOE PORTB3 VIDEO_RESE AV_SEL CVBS_ SEL +12V +5VS VC C +9 V
[P.1] [P.1] [P.1] [P.1] [P.1] [P.1] [P.6] [P.6] [P.6] [P.6] [P.6] [P.6] [P.3] [P.3] [P.3] [P.4] [P.4] [P.3] [P.4] [P.4] [P.4] [P.4] [P.7] [P.7] [P.7] [P.7]
GF-60Pin
1 1 1 1 5 4 3 2
H1 HOLE-V8
9 8 7 6
5 4 3 2
H2
9 8 7 6
5 4 3 2
H3
9 8 7 6
5 4 3 2
H4 HOLE-V8
9 8 7 6
5 4 3 2
H5
9 8 7 6
Optical Points OP1 OP OP2 OP OP3 OP OP4 OP OP5 OP OP6 OP OP7 OP
Proj ct Code 99.M127 5.001
Model N am e 20L03B
Tuesday, Sept ember 23, 200
HOLE- V8
HOLE- V8
HOLE- V8
OP8 OP
OP9 OP
OP10 OP
OP1 1 OP
OP1 2 OP
OP1 3 OP
OP1 4 OP
OP15 OP
OP16 OP
( PC BOARD 2/7)
[P.4] [P.1]
P C_AV RGB_ HS
1 2 3
OE A
U2 0 74LVC1 G126 5 VCC
V D33 R1 7 3 .3K C12 .039 U 16V K
GND
R18 R19
47 47 C13 PV DD G VMI D A VDD 3900 P 50V K
Trace and Compon ents Close IC

PV DD VD3 3
U2 1 74LVC1 G126 5 OE VCC
[P.1]
R GB_VS
2 3
A GND Y 4
C14 0.1U K
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
[P.4] [P.1]
GCOAST BLUE_ IN C15 .047U 50V K BA IN
GND VD CLAMP MIDSCV GND PVD PVD FIL T GND VSYNC HSYNC COAST GND VD VD GND GND VDD VDD GND
CN 1 22P
CN2 22P GBE[0.. 7]
[P.1]
GREEN_I N
C16 C17
.047U GA IN 50V K 10 00P J SOGI N 50V .047U R A IN 50V K 0 0 GVREF
[P.1] [P.4] [P.4]
RED_ IN SCL_C PU SDA_CP U R20 R21
C18
GND VD GND VSOUT SOGOUT HSOUT DATACK GND VDD R7 R6 R5 R4 R3 R2 R1 R0 VDD VDD GND
C1 9 0 .1U K
22P CN 3
22P CN4
61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
GND VD BAI N GND VD VD GND GAI N SOGI N GND VD VD GND RAI N A0 SCL SDA REF BYPASS VD GND
U3 AD98 83 KST-11 0
I2C Add
r:
0x98
GND B0 B1 B2 B3 B4 B5 B6 B7 VDD GND G0 G1 G2 G3 G4 G5 G6 G7 GND
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
A DBE0 A DBE1 A DBE2 A DBE3 A DBE4 A DBE5 A DBE6 A DBE7 A DGE0 A DGE1 A DGE2 A DGE3 A DGE4 A DGE5 A DGE6 A DGE7
1 2 RN 1 3 47 4 1 2 RN 2 3 47 4 1 2 RN 3 3 47 4 1 2 RN 4 3 47 4
8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5
GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7
[P.4]
GGE[0. .7]
[P.4]
VCPU3 3 L1 42 OHM AV DD
V D33
C3 3 0 .1U K
C3 4 0 .1U K
C3 5 0 .1U K
C36 0.1U K
C37 0 .1U K
C38 0 .1U K
C39 0 .1U K
C40 0 .1U K
C41 0.1U K
C42 0 .1U K
ADRE0 ADRE1 ADRE2 ADRE3 ADRE4 ADRE5 ADRE6 ADRE7 AD CK AD HS
1 2 RN 5 3 4 1 2 RN 6 3 4
8 7 6 5 47 8 7 6 5 47
L4
GR GR GR GR GR GR GR GR
E0 E1 E2 E3 E4 E5 E6 E7
G RE[0..7 ]
[P.4]
1
+ C20 10 U 16 V U4 A VDD L3 42 OHM C21 0 .1U K
CN 5 22P
CN6 22P
VD3 3
P VDD
+5VS 30 OHM 47 47 C25 22 P OPE N C26 22 P OPE N R24 R25
[P.4] GCL K [P.4] GFB K

GVS
VI N GND
VOUT
2 1
C43 0 .1U K
C44 0.1U K
C45 0.1U K
C46 0.1U K
C47 0.1U K
C48 0.1U K
C49 0.1U K
C50 0.1U K C27 0.1U K A DSOG V D33
AD VS
[P.4]
2
LD1117-3.3 C24 22P J U7 +5VS L6
C23 22P J
16
R26 U5 C28 220 P 50V J R2 7 D3 1N4148 R2 8 47K 360 GHSSOG V D33 1K P VDD
U6
VD3 3
[P.4]
MV_EN
1 2 3
OE A GND
VCC
VCC
1 2 4 3 9 10 11
1A 1B 1R 2A 2B 2R GND
CX1 RCX1 1Q 1Q 2Q 2Q CX2 RCX2
14 15 13 4 5 12 6 7
3
42 OHM C2 9
GND
[P.4]
VI N
VOUT
2 1
2
0.1U K
C2 2 47 U 16V
74LVC1G 126
D4 1N4148 C32 220 P 50V J
R2 9
1K
LD1117-3.3
74LV123PW
R3 1 221K F
V D33
C3 1 1U 50V
R30 47K
C3 0 47 U 16V
( PC BOARD 3/7)
VCPU 33 VCPU 33 O PEN R32 U8 C51 0.1U K
D[0 ..15]
[P.4]
+5VS
+5VS
[P.4] [P.4] [P.4]
ROMOE n ROMW En RES ETn
R3 3
0 FWPn A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 0 A1 1 A1 2 A1 3 A1 4 A1 5 A1 6 A1 7 A1 8 A1 9
26 28 11 12 14 47 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16
CE OE WE RP WP BYTE A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 0 A1 1 A1 2 A1 3 A1 4 A15 A16 A1 7 A18
VPP VCC D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5 D1 6 GND GND
13 37 29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 46 27
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5 R3 4
Q1 2N3906
L8
42 OHM
2
10K
7 2
R3 6 1K
2N3904 2N3906
R37
R35 1K +5VS R38 Q3 2N39 04 10K
Q2 2N3906 2
CN 7 22P
1K
R40 10 K
[P.3]
LED1_SE L
R42 1K
R39
470 R41
IR RCVR_3V
[P.4]
R43
10 K Q4 2N3904
[P.3]
LED2_SE L 1K
1 2
R44 10K
AT49BV8192A(T) TP4 7 TP4 9 TP5 0 TP5 1 TP5 3 TP5 4 TP5 5 TP5 6 TP5 7 TP5 8 TP4 8
J6 FC En VCPU 33 C52 0 .1U K L ED1 L ED2 IR RCVR K PD0 K PD1 K PD2 K PD3 K PD4 K PD5
R4 5
R46
3.3K
3.3K D0 D1 D2 D3 D4 D5 D6 D7 A1 A3 A5 A7 A8 A10 A13 A15 A16 A18 C53 0 .1U K
U9
K PD[0..6 ]
VCPU 33 J8 A2 A4 A6 A9 A1 1 A1 2 A1 4 A1 7 A1 9
VCPU 33
18 16 14 12 9 7 5 3
ROMOE n
3.3K
3.3K
D15 D14 D5 D4 D3 D2 D9 D8
CONN ML 60P D1.
VCC
D7 D6 D1 3 D1 2 D1 1 D1 0 D1 D0
U10
3.3K
20
[P.4]
RES ETn
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
20L 1023060
1Y 1 1Y 2 1Y 3 1Y 4 2Y 1 2Y 2 2Y 3 2Y 4 GND
1A 1 1A 2 1A 3 1A 4 2A 1 2A 2 2A 3 2A 4 1G 2G
2 4 6 8 11 13 15 17 1 19
K PD0 K PD1 K PD2 K PD3 K PD4 K PD5 K PD6 FAN _DET CS 0n
12 11 10 9 8 7 6 5 4 3 2 1
20L2 021012
VCC
20
K PD6 TP60 R47 R48 R49 R50 R51 R52 R53 CS0 n 10K 10K 10K 10K 10K 10K 10K
TP59
60
59
6 3
AMP/104549
10
74 AHC244
CN 8 22 P
CN9 22 P
VCPU 33 R54 R55 R56
27 ST
ROMWEn
D8 D9 D10 D11 D12 D13 D14 D15
18 16 14 12 9 7 5 3
1Y 1 1Y 2 1Y 3 1Y 4 2Y 1 2Y 2 2Y 3 2Y 4 GND
1A 1 1A 2 1A 3 1A 4 2A 1 2A 2 2A 3 2A 4 1G 2G
2 4 6 8 11 13 15 17 1 19
R 141
OP EN
AV_DET INPUT_DET TV_DET
[P.1] [P.1] [P.1]
CS0 n
[P.4]
NMI
[P.4]
A [1..19]
[P.4]
VCPU 33 C 359 0.1U K
[P.4]
20
U22 D0 D1 D2 D3 D4 D5 D6 D7
10
74 AHC244
3 4 7 8 13 14 17 18 11
D1 D2 D3 D4 D5 D6 D7 D8 CL K CLR
Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8
2 5 6 9 12 15 16 19
DECOE PWR_ ON LED1_SE L LED2_SE L
[P.1] [P.7] [P.3] [P.3]
[P.4]
CS1 n VCPU 33 R1 26 10K +
1
C 360 10 U 16 V
GND
VCC
10
74LVC27 3
( PC BOARD 4/7)
V3 3 R57
V3 3 R58 V3 3 VCP U33
VCP U33
3.3K
3.3K
Q5 B SN20
Q6 B SN20
C5 4 0.1U K
U1 1
[P.1]
SCL
2 1
Q7 BSN20
3 3
2 1
Q8 B SN20
SCL_CPU
8 7 6 5
VCC WP SCL SDA
NC NC NC GND
1 2 3 4
RES ETn
C5 5 22P J L1 0 70 O HM
C5 6 22P J
[P.3]
DCLK DCLKNEG DVS DH S DEN DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DGR0 DGR1 DGR2 DGR3 DGR4 DGR5 DGR6 DGR7
TP6 2 TP6 3
[P.5]
DC LK DC LK RVS [P.5] RH S [P.5] RD E DR[0.. 7]
AT24C3 2A
2
SDA_CPU VCPU 33
[P.1]
SDA
[P.2] [P.2]
SCL_CP U SDA_CP U
VCPU 33 VCPU 33 VCPU3 3 VCP U33 R6 1 R6 2 R1 1 R1 2
R59 3.3K R6 0 R6 3 0 RPTR11 14 2 RES ETn 13 9 100 EXTRSTEN 28 RXD TXD 10K
TESTEN RESET EXTRSTEN RXD TXD PORTA0 PORTA1 PORTA2 PORTA3 PORTA4 PORTA5 PORTA6 PORTA7 TRST TCK TMS TDI TDO NMI XI XO
[P.2] [P.2] [P.2] [P.2] [P.2]
[P.1] [P.1]
GC LK GVS GH SSOG G FBK GBE[0. .7]
TP61
31 34 32 33 35 2 3 4 5 6 7 8 9 10 11 12 13 14 15 18 19 20 21 22 23 24 25 26 27 71 74 75 69 70
VY0 VY1 VY2 VY3 VY4 VY5 VY6 VY7
RX TXD
R64
470 R65
67 68 20 7 20 6 20 5 20 4 20 3 20 2 20 1 20 0 147 14 6 14 5 14 4 14 3 19 3 16 9 17 0
GCLK GPEN GVS GHSSOG GFBK GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7 VCL K VVS VH S VFIEL D VPEN VYUV0 VYUV1 VYUV2 VYUV3 VYUV4 VYUV5 VYUV6 VYUV7
GCOAST
36
GCOAST
[P.2]
TP1 2 TP1 3
GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GR GR GR GR GR GR GR GR E0 E1 E2 E3 E4 E5 E6 E7
[P.1]
[P.3]
TV_DET R 129 470
IR RCVR_3V R 128 20K L CD_BR R1 30 R66 C57 2.2U K 16 V OPE N 10 K
SDA_CPU SCL_CPU S DA2 S CL2 IR RCVR_3V IN T GPIOA6 PWM_BR
U1 2C PW113 Misc
A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 0 A1 1 A1 2 A1 3 A1 4 A1 5 A1 6 A1 7 A1 8 A1 9 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5
19 2 19 1 19 0 18 9 18 8 18 7 18 4 18 3 18 2 18 1 18 0 17 9 17 8 17 7 17 6 17 5 17 4 17 3 16 4 16 3 16 2 16 1 16 0 15 9 15 8 15 7 15 6 15 5 15 4 15 3 15 2 15 1 15 0 14 9 14 8 19 5 19 4 19 6 19 7 19 8 19 9
A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 0 A1 1 A1 2 A1 3 A1 4 A1 5 A1 6 A1 7 A1 8 A1 9 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 RDn WR n CS 0n CS 1n
A[1..19]
10 6 107 10 8 109 110 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 83 82 81 80 79 78 77 76 136 135 134 133 132 131 130 129 128 127 126 125 122 121 120 119 118 117 116 115 114 113 112 111
DCL KR RVS RH S RD E DR 0 DR 1 DR 2 DR 3 DR 4 DR 5 DR 6 DR 7 DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DG DG DG DG DG DG DG DG DG DG DG DG DG DG DG DG DG DG DG DG DG DG DG DG R0 R1 R2 R3 R4 R5 R6 R7 G0 G1 G2 G3 G4 G5 G6 G7 B0 B1 B2 B3 B4 B5 B6 B7
[P.5]
[P.3]
[P.5]
3.3K
3.3K
3.3K
3.3K
DG[ 0..7]
[P.5]
U 12B PW113 D[0 ..15] Dis play Port
DB [0..7]
[P.3]
[P.5]
[P.7]
[P.2]
GGE[0. .7]
DGR[ 0..7]
[P.5]
[P.3]
Trace and Compo
nents Close IC
VCP U18
NMI
[P.2]
G RE[0..7]
R6 7 Y1 X607
1.5M
L11 42 OH M
L1 2 42 OH M X608 C59 18P 50V J
D GG[0..7 ]
[P.1] [P.1] [P.1] [P.1] [P.1]
VDD PA3 V DDPD3
VCL K VVS VH S VF IELD VPE N
PW113 U1 2A Graphics and Vid eo Port
C60 0.1U K
C61 0.1U K
C5 8 14 .318MH Z 18 P 50V J
RD WR ROMOE ROMW E CS0 CS1

PW113
[P.3] ROM OEn [P.3] ROMW En [P.3] CS0 n [P.3] CS1 n
DGG0 DGG1 DGG2 DGG3 DGG4 DGG5 DGG6 DGG7 DGB0 DGB1 DGB2 DGB3 DGB4 DGB5 DGB6 DGB7
[P.5]
D GB[0..7]
[P.5]
VCP U33
VDDPA1_1.8V VDDPA2_1.8V
[P.1]
VY[0..7 ]
VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ3
VDD1 VDD1 VDD1 VDD1 VDD1 VDD1
47 48 49 50 51 54 55 56
[P.1]
U 12E V UV[0..7 ] V UV0 V UV1 V UV2 V UV3 V UV4 V UV5 V UV6 V UV7
39 40 41 42 43 44 45 46 57 58 59 60 61 62 63 64
PORTC0 PORTC1 PORTC2 PORTC3 PORTC4 PORTC5 PORTC6 PORTC7 PORTB0 PORTB1 PORTB2 PORTB3 PORTB4 PORTB5 PORTB6 PORTB7
PW11 3 GPO Port
29 52 72 86 10 4 12 3 14 0 17 1 20 8
16 7 16 5
0 1 2 3 4 5 6 7 8
1 2 3 4 5 6
16 37 65 84 13 7 18 5
VC C
VC C
VCP U33 U 12D PW113
Power and Ground
R6 9
3.3K
R7 1
1 30 53 73 87 105 124 141 172
17 38 66 85 138 186
166
3.3K 1
[P.1]
SDA_5V
Q1 1 B SN20
Q1 2 BSN20
2 SDA_CPU
VCP U33 VCP U18
[P.1]
C62 0.1U K C63 0.1U K C64 0 .1U K C65 0.1U K C66 0.1U K C6 7 0.1U K C6 8 0.1U K C69 0 .1U K
168
SCL_5V
3 3
SCL_CPU
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6
Q9 B SN20
Q1 0 B SN20
[P.7] [P.7] [P.1] [P.1] [P.2] [P.2] [P.1] [P.1]
MUTE L CD_ON VIDEO_RESET PORTB3 MV_EN P C_AV AV_SEL CVBS_SE L
VSSPA2
VSSPA1
VSSQ0 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8
C70 0.1U K
C71 0.1U K
C72 0 .1U K
C73 0 .1U K
C7 4 0.1U K
C75 0.1U K
C76 0 .1U K
( PC BOARD 5/7)
15"
SWAPRGB: Display Data Swap RGB Or der. When SWA PBO=1, RGB will be BGR.
[P.4] [P.4] [P.4] [P.4]
DC LK RVS RH S RD E
R73 R74 R75
600 OHM 600 OHM 600 OHM C7 7 22 P O PEN C78 22P OPE N C7 9 22P OPE N
DC LK DVS DH S DE N
R 142 TP64 TP65 R 143
0 0
DCL K15 DCL K20 V33 J9 J1 0 D BE0 D BE1 D BE2 D BE3 D BE4 D BE5 D BE6 D BE7 DG DG DG DG DG DG DG DG DR DR DR DR DR DR DR DR E0 E1 E2 E3 E4 E5 E6 E7 E0 E1 E2 E3 E4 E5 E6 E7 TP66 TP67 TP69 TP70 TP72 TP74 TP76 TP78 TP80 TP82 TP84 TP86 TP88 TP90 TP92 TP94 TP96 TP98 TP10 0 TP10 2 TP10 TP10 TP10 TP11 4 6 8 0
15"
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
20K 004904 0
20"
TP200
J2 0
First Pixel
D GB[0..7] TP6 8 DG DG DG DG DG DG DG DG B0 B1 B2 B3 B4 B5 B6 B7
SWAPEO: [P.4] Display Data Swap Even Odd Pixels. When SWAPEO=1, the even and odd pixel data will be swapped at the pac kage pins. DGR, DGG, DGB : First Pixels DR, DG, DB : Second Pixels
1 2 47 3 4 1 RN7 2 47 3 4 RN8
8 7 6 5 8 7 6 5 8 7 6 8 7 6 5 5
DR DR DR DR DR DR DR DR
O0 O1 O2 O3 O4 O5 O6 O7
DB O0 DB O1 DB O2 DB O3 DB O4 DB O5 DB O6 DB O7 DG DG DG DG O0 O1 O2 O3 O4 O5 O6 O7 O0 O1 O2 O3 O4 O5 O6 O7
TP7 1 TP7 3 TP7 5 TP7 7 TP7 9 TP8 1 TP8 3 TP8 5 TP8 7 TP8 9 TP9 1 TP9 3 TP9 5 TP9 7 TP9 9 TP101 TP103 TP105 TP107 TP109 TP111 TP112 TP113 TP114 TP115 TP116
C N11 22 P
CN 10 22 P
D GG[0..7 ]
20"
SWAPRGB: Display Data Swap RGB Or der. When SWA PBO=1, RGB will be BGR. SWAPEO: Display D ata Swap Even Odd Pixels. When SW APEO=0, DR, DG, DB : First Pixels
[P.4]
DG DG DG DG DG DG DG DG
G0 G1 G2 G3 G4 G5 G6 G7
1 2 47 3 4 RN9 1 2 47 3 4 RN 10
8 7 6 5 8 7 6 5 8 7 6 8 7 6 5 5
O0 O1 O2 O3 O4 O5 O6 O7
DG DG DG DG DR DR DR DR DR DR DR DR
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
CON3 0P
D BE0 D BE1 D BE2 D BE3 D BE4 D BE5 D BE6 D BE7 DG DG DG DG DG DG DG DG DR DR DR DR DR DR DR DR E0 E1 E2 E3 E4 E5 E6 E7 E0 E1 E2 E3 E4 E5 E6 E7
DCL K2 0 DE N DVS DH S TP20 1 VC C
C N13 22 P
CN 12 22 P
DGR[ 0..7]
DCL K15 DG DG DG DG DG DG DG DG R0 R1 R2 R3 R4 R5 R6 R7
[P.4]
1 2 47 3 4 1 RN 11 2 47 3 4 RN 12
8 7 6 5 8 7 6 5 8 7 6 8 7 6 5 5
DB O0 DB O1 DB O2 DB O3 DB O4 DB O5 DB O6 DB O7
DE N
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
20L2 04305 0
3 3 3
C N15 22 P
CN 14 22 P
Second Pixel
DR DR DR DR DR DR DR DR E0 E1 E2 E3 E4 E5 E6 E7
DB[0 ..7]
[P.4]
DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7
1 2 47 3 4 1 RN 13 2 47 3 4 RN 14
8 7 6 5 8 7 6 5 1 2 3 1 2 3 4 4
CN 17 22 P
CN 16 22 P
DG[ 0..7]
[P.4]
DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7
1 2 47 3 4 RN 15 1 2 47 3 4 RN 16
8 7 6 5 8 7 6 5 1 2 3 1 2 3 4 4
E0 E1 E2 E3 E4 E5 E6 E7
CN 19 22 P
CN 18 22 P
DR[0. .7]
[P.4]
DR 0 DR 1 DR 2 DR 3 DR 4 DR 5 DR 6 DR 7
1 2 47 3 4 RN 17 1 2 47 3 4 RN 18
8 7 6 5 8 7 6 5 1 2 3 1 2 3 4 4
D BE0 D BE1 D BE2 D BE3 D BE4 D BE5 D BE6 D BE7
CN 21 22 P
CN 20 22 P
( PC BOARD 6/7)
+9 V
R7 6 2 2 C8 1 0.1U K
C8 0 + 10 U 16 V
[P.1] [P.1] [P.1] [P.1] [P.1] [P.1] [P.1] [P.1]
RI 4 RI 3 RI 2 RI 1 LI1 LI2 LI3 LI4
C 134 C8 2 C8 3 C8 4 C8 5 C8 6 C8 8 C 135
0.47U Z 16 V 0 .47U Z 16 V 0 .47U Z 16 V 0 .47U Z 16 V 0 .47U Z 16 V 0 .47U Z 16 V 0 .47U Z 16 V 0.47U Z 16 V C89 2.2 U Z 16 V
1 2 3 4 5 6 7 8 9 10
R _IN 3 R _IN 2 R _IN 1 L_IN 1 L_IN 2 L_IN 3 L_IN 4 MUXOUTL IN_L MUXOUTR IN_R BIN R BOUTR BIN L
U1 3 TDA7440 D
R_IN 4 LOUT ROUT AGN D Vs CREF SDA SCL DIG_GN D TREBLER TREBLEL NC1 NC2 BOUTL
28 27 26 25 24 23 22 21 20 19 18 17 16 15
C96 5600P K 50 V C97 5600P K 50 V C8 7 1 10 U 16V + L_OUT
R77 R78 R _OUT R 122 R 123
470 470 470 470 C 132 10 U 16V 1 2 + AUD IO_L_OUT AUDIO_ R_OUT AU DIO_L_Line AUDIO _R_Line
[P.7] [P.7] [P.1] [P.1]
2
SDA_5V SCL_5V
[P.4] [P.4]
C 133 10 U 16V R1 24 10K R1 25 10K
C92 C95 C99 R79 5.6K
2.2 U Z 11 16 V 0.1U K 12 0.1U K 13
14
C 101 0 .1U K
I2C Add
r:
0x88
C1 05 0 .1U K R8 1 5.6K
( PC BOARD 7/7)
+19 V
VCC
+5VS
+12V J1 1 TP11 9 TP12 1 TP120
+12V +5VS
VC C
+19 V
[P.4]
L CD_ON
1 3 5
2 4 6 8 10 12 14 16 18 20
L CD_BR +12 V
[P.4]
U15 +9V
VI GND
VO
3 1
+ C 108 47U 16 V C 110 0.1U K
TP12 2 TP12 3
7 9 11
TP12 4
13 15 17 19
U16 +5VS C 112 0.1U K
VCPU3 3
GND
[P.4] [P.6] [P.6]
MUTE AU DIO_L_OUT AUDIO_ R_OUT
TP12 6
[P.3]
PWR _ON
TP12 5
VI N
VOUT
2
+ C 111 47U 16 V C 113 0.1U K
LD1117-3. 3
2072 06021 0 C 140 C 141 C 142 C1 43 C1 44 C1 45 C 146 C 147 C 148 C 149 C1 50 C1 51 C 152 C 153 C 115 0.1U K
U17
VCPU1 8
VI N GND
VOUT
2
R83 681F
220P J 220P J 22 0P J 220P J 220P J
220P J 220P J 220P J 22 0P J
22 0P J 220P J 220P J 220P J 220P J
C 109 0.33U Z
7809 ABD2 T
LM317 M
R84 301F
(For EMI)
(For
EMI)
+ C1 17 10U 16 V V33
J12 TP2 3
RT1
RT2
+12 V
U18 VC C C 119 0.1U K
GND
TP24
VI N
VOUT
2
+ C 118 47U 16 V C 120 0.1U K
LD1117-3. 3
C 114 47U 16 V
C 116 0.1U K
( PC BOARD 1/7, 20BI)
+5VS
+9V R2 2 15 0 R2 3 15 0
OP5V
RED_ IN GREEN_ IN BLU E_IN
R527 R528 R529
NC_R0603 NC_R0603 NC_R0603
VR _IN VY_I N VB _IN
J2
7 6 1 2 4 5 3
7 6 1 2 4 5 3
600 OHM TP 2 TP 4 C1 C2 TZMC5V1 R8 5 R8 6 600 OHM R1 R3 1K 1K R6 D1 3 TZMC5V1
[P .6 ]
LI3 RI 3 R7[P
DN1 BAV99 3
DN2 BAV99 3
DN3 BAV99 3
OP5V
D1 1 1000 P J 1000 P J
D9 TZMC5V1
1 1
VCC
RED_ IN
*2
GND
1
MM1031X MR R138 0
16
VR _IN
[P. 1]
TZMC5V1
D1 2
1 1
C9 0 47U 16V
C124 0.1U K
.6 ]
2210165031 R110 75
10K 10K
U2 4
D1 4 TZMC5V1
J3
TP 5 GSDA TP 7 TP 10 TP 11 GSCL
12 13 14 15
D-Sub15
G1 B1 TP 9
TP 6 TP 8 R8 75 R9 75
R4 R5 R1 0 75
47 47 C3 47P 50 V J C4 47P 50 V J
2
+
GREEN_ IN BL UE_I N
[P. 2] [P. 2]
C125 0.1U K GREEN_ IN OP5V
VR_GND
[P. 1]
2
+
11
6 1 7 2 8 3 9 4 10 5
R1
TP 3
R2
47
C121 10 U C122 10 U C123 10 U C5 47P 50 V J
2
+
1 16V 1 16V 1 16V
RED_ IN
[P. 2]
J1 U2 5
VCC
R115 75
[P. 6]
VY_I N
*2
GND
1
MM1031X MR R139 0
[P. 1]
Audio_L_Line Audio _R_Line
R8 7 R8 8
600 OHM 600 OHM C130 C131
7 6 1 2 4 5 3
7 6 1 2 4 5 3
PC _5V
83.27R03.036
2 2
D2 3 27V D2 1 27V TZMC5V1 TZMC5V1
D1 5 VY_GND
[P. 6] [P. 1]
TZMC5V1
D1 7 1000 P J 1000 P J TZMC5V1
17
Audio Line ou t(2210165031)
1 1
1 1
1 1
D6 TZMC5V1
D8 TZMC5V1
D2 0 27V
D2 2 27V
C126 0.1U K BLU E_IN
D1 6 R120 75 TZMC5V1
1 1
J5
OP5V
D1 8 TZMC5V1
U2 6
VCC
GND
D5
D7
MM1031X MR R140 0 VB _GND
[P. 1]
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79
GF80
R136 R137 +5VS
1K 1K R1 4 R1 3 +5VS D1 C7 C9 PC _5V 1N4148 U2 R1 5 4.7K GSCL R1 6 4.7K D2 0.1U K C1 0 0.1U K C8 0.1U K 0.1U K U1 47 47
RG B_VS RG B_HS
[P. 2] [P. 2]
*2
VB _IN
[P. 1]
[P. 4] [P. [P. [P. [P.
VCLK
+5VS 0.1U K C6
DN8 BAV99 3
DN9 BAV99 3
C137 100P C138 100P C139 100P
C136
1N4148
1 2 3 4 5 6 7 8
C1+ V+ C1C2+ C2VT2OUT R2IN

SP232 EC N
VCC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT
16 15 14 13 12 11 10 9
4] VVS 4] VHS 4] VPEN 4] VFI EL D [P .4 ]

GV[0 ..7] GV0 GV1 GV2 GV3 GV4 GV5 GV6 GV7
OPEN
OPEN
OPEN
OPEN
UART_R X UAR T_TX RX TX D
RX TX D
[P. 4] [P. 4]
8 7 6 5
VCC WP SCL SDA
A0 A1 A2 GND
1 2 3 4
C1 1 0.1U K
[P .4 ]
BU [0..7]
BU 0 BU 1 BU 2 BU 3 BU 4 BU 5 BU 6 BU 7
GSDA
AT2 4C02A
[P. 4]
RY[0..7 ] RY RY RY RY 0 1 2 3
S crew Holes
[P .7 ] +12V [P .7 ] [P .7 ] [P .7 ]
+5VS VCC +9V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80
VY_I N VY_GND VB _IN VB _GND VR _IN VR _GND RI 1 LI1 RI 2 LI2 RI 4 LI4 INPUT_D ET AV_ DET TV_DET SDA SC L DEC OE POR TB3 VIDE O_RESET AV_SEL CVBS_SEL RY RY RY RY 4 5 6 7
[P. [P. [P. [P. [P. [P. [P. [P. [P. [P. [P. [P.
1] 1] 1] 1] 1] 1] 6] 6] 6] 6] 6] 6]
[P. 3] [P. 3] [P. 3] [P. 4] [P. 4] [P. [P. [P. [P. [P. 3] 4] 4] 4] 4]
RY[0..7 ]
[P .4 ]
+12V [P +5VS VCC +9V
.7 ]
[P .7 ] [P .7 ] [P .7 ]
5 4 3 2
H1
9 8 7 6
5 4 3 2
H2
9 8 7 6
5 4 3 2
H3
9 8 7 6
5 4 3 2
H4
9 8 7 6
5 4 3 2
H5
9 8 7 6
Optical Points
PC BOA 48.M 2305 .A00 onday, September 08, 2003
GF-80Pin
OP1 OP
OP2 OP
OP3 OP
OP4 OP
OP5 OP
OP6 OP
OP7 OP
HO LE-V 8
HO LE-V 8
HO LE-V 8
HO LE-V 8
HO LE-V 8
OP8 OP
OP9 OP
OP10 OP
OP11 OP
OP12 OP
OP13 OP
OP14 OP
OP15 OP
OP16 OP
U2 0 74LVC1 G126 5 VCC
VD33 R1 7 3 .3K C1 2 .039U 16 V K
[P. 4] [P. 1]
PC_ AV RG B_HS
1 2 3
OE A
GND
R1 8 R1 9
47 47 C1 3 PV DD GVM ID AV DD 3900P 50 V K
Trac e and Components Close IC

PV DD VD3 3
U2 1 74LVC1 G126 5 VCC OE
[P. 1]
RG B_VS
2 3
A GND Y 4
C1 4 0.1U K
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
[P. 4]
GCOAS T C1 5 .047U 50 V K BA IN
GND VD CLAM P MIDSCV GND PVD PVD FIL T GND VSYN C HSYN C COAST GND VD VD GND GND VD D VD D GND
CN1 22P
CN2 22P GB E[0..7 ]
[P. 1] BLUE _IN
[P. 1] GREEN_ IN
C1 6 C1 7
.047U GA IN 50 V K 1000 P J SOG IN 50V .047U RA IN 50 V K 0 0 GVR EF
[P. 1] RED_ IN [P. 4] SCL _CPU [P. 4] SDA_ CP U
C1 8 R2 0 R2 1
GND VD GND VSOUT SOGOUT HSOUT DATACK GND VD D R7 R6 R5 R4 R3 R2 R1 R0 VD D VD D GND
C1 9 0.1U K
22P CN3
22P CN4
61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
GND VD BAIN GND VD VD GND GAIN SOGIN GND VD VD GND RAIN A0 SCL SDA REF BYPASS VD GND
U3 AD9 883KST-110
I2C Addr: 0x9
GND B0 B1 B2 B3 B4 B5 B6 B7 VDD GND G0 G1 G2 G3 G4 G5 G6 G7 GND
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
AD BE0 AD BE1 AD BE2 AD BE3 AD BE4 AD BE5 AD BE6 AD BE7 AD GE AD GE AD GE AD GE AD GE AD GE AD GE AD GE 0 1 2 3 4 5 6 7
1 2 RN1 3 47 4 1 RN2 2 3 47 4 1 2 RN3 3 47 4 1 2 RN4 3 47 4
8 7 6 5 8 7 6 5 8 7 6 5 8 7 6 5
GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7
[P. 4]
GGE [0..7]
[P. 4]
VCPU33 L1 42 OHM
VD3 3
AD RE AD RE AD RE AD RE AD RE AD RE AD RE AD RE A DCK A DHS ADVS VD33 C2 7 0.1U K ADS OG
0 1 2 3 4 5 6 7
1 2 RN5 3 4 1 2 RN6 3 4
8 7 6 5 47 8 7 6 5 47
L4
GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7
GRE[0. .7]
[P. 4]
1
+ C2 0 10 U 16V U4 AV DD
CN5 22P
CN6 22P
+5VS 30 OHM 47 47 C2 5 22P OPEN C2 6 22P OPEN R2 4 R2 5
[P. 4] GCL K [P. 4] GFBK

GVS
L3 42 OHM C2 1 0.1U K
VIN GND
VOUT
2 1
+ PV DD
[P. 4]
LD1117-3. 3
2
C2 4 22 P J U7 +5VS L6
C2 3 22 P J
16
R2 6 U5 C2 8 220P 50 V J R2 7 D3 1N4148 R2 8 47K 36 0 GHSS OG VD3 3 1K
U6
VD33
[P. 4]
VC C
MV _E N
1 2 3
OE A GND
VCC
1 2 4 3 9 10 11
1A 1B 1R 2A 2B 2R GND
CX1 RCX1 1Q 1Q 2Q 2Q CX2 RCX2
14 15 13 4 5 12 6 7
GND
[P. 4]
42 OHM C2 9
VIN
VOUT
2 1
+
2
0.1U K
C2 2 47U 16V
74LVC1 G126
D4 1N4148 C3 2 220P 50 V J
R2 9
1K
LD1117-3. 3 C3 1 1U 50V R3 0 47K
AV DD
VD3 3
74LV123PW
R3 1 221K F
PV DD
C3 3 0.1U K
C3 4 0.1U K
C3 5 0.1U K
C3 6 0.1U K
C3 7 0.1U K
C3 8 0.1U K
C3 9 0.1U K
C4 0 0.1U K
C4 1 0.1U K
C4 2 0.1U K
C4 3 0.1U K
C4 4 0.1U K
C4 5 0.1U K
C4 6 0.1U K
C4 7 0.1U K
C4 8 0.1U K
C4 9 0.1U K
C5 0 0.1U K
VD3 3
48.M 2305 .A00 20L0BI PC BOA RD onday, September 08, 2003
C3 0 47U 16V
D[0..15]
VCPU33 VCPU33 OPEN R3 2 U8 C5 1 0.1U K
[P. 4]
+5VS
[P. 4] ROMOEn [P. 4] ROMWEn [P. 4] RESETn
R3 3
0 FWPn A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
26 28 11 12 14 47 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16
CE OE WE RP WP BYTE A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18
VPP VCC D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 GND GND
13 37
+5VS R3 4
Q1 2N3906
L8
42 OHM
1
29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 46 27
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
2
5 6 7 2
10K R3 5 1K +5VS R3 8 R3 7 Q3 2N3904 10K R4 2 1K R3 9 Q4 2N3904 47 0 R4 1 10K R4 4 VCPU33 10K TP 47 TP 49 TP 50 TP 51 TP 53 TP 54 TP 55 TP 56 TP 57 TP 58 TP 48 Q2 2N3906 CN7 22P
R3 6 1K
2N3904 2N3906
LED1_SEL
[P. 3]
1K LED2_SEL R4 3 R4 0 10K
IRRCVR_3V
[P. 3]
1K
[P .4 ]
J6 LED1 LED2 IRRC VR KPD0 KPD1 KPD2 KPD3 KPD4 KPD5 KPD6 R4 7 R4 8 R4 9 R5 0 R5 1 R5 2 R5 3
AT 49BV8192A(T) D0 D1 D2 D3 D4 D5 D6 D7
C5 2 0.1U K
U9
KPD[0..6]
FCEn R4 5 R4 6
3.3K
3.3K
18 16 14 12 9 7 5 3
1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 GND
1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 1G 2G
2 4 6 8 11 13 15 17 1 19
KPD0 KPD1 KPD2 KPD3 KPD4 KPD5 KPD6 FAN_DET CS0n
TP 60 CS0n 10K 10K 10K 10K 10K 10K 10K
12 11 10 9 8 7 6 5 4 3 2 1
20L2021012
VC C
20
10
VCPU33 J8
VCPU33
74A HC244 VCPU33
CN8 22P
CN9 22P
TP 59
60
59
A2 A4 A6 A9 A11 A12 A14 A17 A19
ROMOEn
GND
[P. 4]
D15 D14 D5 D4 D3 D2 D9 D8
RESETn
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
20L1023060
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
3.3K
3.3K
U 10
3.3K
20
A1 A3 A5 A7 A8 A10 A13 A15 A16 A18 D8 D9 D10 D11 D12 D13 D14 D15
R5 4
R5 5
C5 3 0.1U K
R5 6
CONN ML 60P D1.27 ST AMP/104549
ROMWEn D7 D6 D13 D12 D11 D10 D1 D0
18 16 14 12 9 7 5 3
1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4
1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 1G 2G
2 4 6 8 11 13 15 17 1 19
R141
OPEN
AV_DET INPUT_DET TV_DET
[P. 1] [P. 1] [P. 1]
VC C
[P. 4]
CS0n VCPU33 C361 NC_R0603 R530 R531 NC_R0603
10
74A HC244
20
U 27 D8 D9 D10 D11 D12 D13 D14 D15
0.1U K
4
VCPU33
NMI
[P. 4]
A[1..19]
[P. 4]
[P. 4]
CS1n VCPU33 C359 VCPU33 R142 10K +
3 4 7 8 13 14 17 18 11 1
C 362 10U 16V
D1 D2 D3 D4 D5 D6 D7 D8 CLK CLR
Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8
2 5 6 9 12 15 16 19
VC C
MUTE VIDEO_RESET PORTB3 MV_EN PC_AV AV_SEL CVBS_SEL
[P. 7]
R532 Q 13_N C
LCD_ON [P NC_R0603
.7 ]
[P. [P. [P. [P. [P. [P.
1] 1] 2] 2] 1] 1]
[P. 4]
GND
0.1U K
20
U 22 D0 D1 D2 D3 D4 D5 D6 D7
10
74LVC 273
48.M 2305 .A00 PC BOARD
[P. 4]
CS1n VCPU33 R126 10K +
3 4 7 8 13 14 17 18 11 1
C 360 10U 16V
D1 D2 D3 D4 D5 D6 D7 D8 CLK CLR
Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8
2 5 6 9 12 15 16 19
DECOE [P. PWR_ON [P. LED1_SEL [P. LED2_SEL
[P. 1] 7] 3] 3]
GND
VC C
10
74LVC 273
2N3904
C553 2.2U K 16V
V33 R5 7
V33 R5 8 V33 VCPU33
VCPU33
3.3K
3.3K
Q5 BSN 20
Q6 BSN 20
C5 4 0.1U K
U1 1 DCLK_L
C5 5 22 P J
C5 6 22 P J
[P. 1] SC L
1
2
Q7 BSN 20
3 3
2 1
Q8 BSN 20
SCL _CPU
8 7 6 5
VCC WP SCL SDA
A0 A1 A2 GND
1 2 3 4
R ES ETn
[P. 3]
DCLK DCLKNEG DVS DHS DEN DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DGR0 DGR1 DGR2 DGR3 DGR4 DGR5 DGR6 DGR7 106 107 108 109 110 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 83 82 81 80 79 78 77 76 136 135 134 133 132 131 130 129 128 127 126 125 122 121 120 119 118 117 116 115 114 113 112 111
L1 0 DC LK 30 OHM RVS RHS RDE DC LK
AT 24C32AN-10SI-2.7
2
SDA_ CP U VCPU33
[P .5 ] [P .5 ] .5 ] .5 ]
[P. 1] SD A
R6 1
R6 2
R1 1
R1 2
[P. 2] SCL _CPU [P. 2] SDA _CPU
VCPU33
VCPU33
VCPU33
VCPU33
R5 9 3.3K R6 0 R6 3 0 RP TR 11 142 R ES ETn 139 10 0 EXTRSTEN 28 RX D TX D 10K
TESTEN RESET EXTRSTEN RXD TXD PORTA0 PORTA1 PORTA2 PORTA3 PORTA4 PORTA5 PORTA6 PORTA7 TRST TCK TMS TDI TDO NMI XI XO
[P. 2] [P. [P. [P. [P.
[P. 1] [P. 1]
3.3K
3.3K
3.3K
3.3K
GCL K
TP 61
2] GVS 2] GHSS OG 2] GFBK 2] GB E[0..7 ]
31 34 32 33 35 2 3 4 5 6 7 8 9 10 11 12 13 14 15 18 19 20 21 22 23 24 25 26 27 71 74 75 69 70
GV0 GV1 GV2 GV3 GV4 GV5 GV6 GV7
RX TX D
R6 4
47 0 R6 5
67 68 207 206 205 204 203 202 201 200 147 146 145 144 143 193 169 170
GCLK GPEN GVS GHSSOG GFBK GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7 VCLK VVS VHS VFIELD VPEN VYUV0 VYUV1 VYUV2 VYUV3 VYUV4 VYUV5 VYUV6 VYUV7
GCOAST
36
GCOAS T
[P. 2]
TP 12 TP 13
GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7
[P. [P. [P. [P.
3] 1] 7] 7]
IRRCVR_3V TV_DET L CD_ON L CD_BR
R129 R130 R6 6 C5 7 2.2U K 16V
0 OPEN 10K
SDA_ CP U SCL _CPU SDA2 SC L2 IRRCVR_3V IN T GP IOA6 PW M_ BR
U 12C PW11 3 Mi sc
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
192 191 190 189 188 187 184 183 182 181 180 179 178 177 176 175 174 173 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 195 194 196 197 198 199
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5 RDn WR n CS 0n CS 1n
A[1 ..19]
[P. 3]
DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DB 0 DB 1 DB 2 DB 3 DB 4 DB 5 DB 6 DB 7 DG DG DG DG DG DG DG DG R0 R1 R2 R3 R4 R5 R6 R7
RV S [P RHS [P RDE DR[0. .7]
[P .5 ]
DG [0..7]
[P .5 ]
U12B D[0..15] PW113 Display Port
DB [0..7]
[P. 3]
[P .5 ]
[P. 2] GGE [0..7]
DG R[0 ..7]
[P. 3]
[P .5 ]
Trace an
d Components Close IC
VCPU18 L11 42 OH M L12 42 OH M
NM I
[P. 2] GRE[0. .7]
R6 7 Y1 X607
1.5M
X608 C5 9 18P 50 V J
[P. [P. [P. [P. [P.
1] 1] 1] 1] 1]
V DDPA3 VDDPD3
VCLK VVS VHS VFI EL D VPEN
PW113 U12A Graphics and Video Port
C6 0 0.1U K
C6 1 0.1U K
C5 8 14.318M HZ 18P 50 V J
RD WR ROMOE ROMWE CS0 CS1

PW113
TP 62 TP 63 ROM OE n [P ROM WE n[P [P CS0 n [P CS1 n
.3 .3 .3 .3
] ] ] ]
DGG[0. .7]
[P .5 ]
DGB[0. .7]
VCPU33
old
[P. 1]
net: UV
U12E BU [0..7] BU 0 BU 1 BU 2 BU 3 BU 4 BU 5 BU 6 BU 7 RY RY RY RY RY RY RY RY 0 1 2 3 4 5 6 7
[P .5 ]
[P. 1]
VDDPA1_1.8V VDDPA2_1.8V
old net:
GV[0 ..7]
VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36 VDDQ37 VDDQ38
VDD11 VDD12 VDD13 VDD14 VDD15 VDD16
47 48 49 50 51 54 55 56
[P. 1]
39 40 41 42 43 44 45 46 57 58 59 60 61 62 63 64
RY[0..7 ]
PORTC0 PORTC1 PORTC2 PORTC3 PORTC4 PORTC5 PORTC6 PORTC7 PORTB0 PORTB1 PORTB2 PORTB3 PORTB4 PORTB5 PORTB6 PORTB7
PW113 GPO Port
29 52 72 86 104 123 140 171 208
167 165
16 37 65 84 137 185
L2 42 OHM L5 42 OHM L7 NC _L1206 C8 0 470P K
VCC R6 9
VCC
VCPU33 U 12D PW113 Q10 BSN 20
Power and Ground
0 1 2 3 4 5 6 7 8
VSSPA2 166
3.3K
R7 1
1 30 53 73 87 105 124 141 172
17 38 66 85 138 186
3.3K 1
[P. 1]
SD A_5V
Q11 BSN 20
Q12 BSN 20
2 SDA_ CP U
168
SCL_5V
3 3
SCL _CPU
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6
Q9 BSN 20
VSSPA1
[P. 1]
EMI solution
PC BOA RD 20L0BI 48.M 2305 .A00
VCPU33
VCPU18
C6 2 0.1U K
C6 3 0.1U K
C6 4 0.1U K
C6 5 0.1U K
C6 6 0.1U K
C6 7 0.1U K
C6 8 0.1U K
C6 9 0.1U K
C7 0 0.1U K
C7 1 0.1U K
C7 2 0.1U K
C7 3 0.1U K
C7 4 0.1U K
C7 5 0.1U K
C7 6 0.1U K
15"
SWAPRGB: Display Data Swap RGB Order. When SWAPBO=1, RGB will be BGR.
[P. [P. [P. [P.
4] 4] 4] 4]
DC LK RV S RHS RDE
R7 3 R7 4 R7 5
47 47 47 C7 7 22P O PEN C7 8 22P O PEN C7 9 22P O PEN
DC LK DVS DHS DEN
TP 64 TP 65 V33 J9
15"
J10 DBE0 DBE1 DBE2 DBE3 DBE4 DBE5 DBE6 DBE7 DGE0 DGE1 DGE2 DGE3 DGE4 DGE5 DGE6 DGE7 DR E0 DR E1 DR E2 DR E3 DR E4 DR E5 DR E6 DR E7 TP 66 TP 67 TP 69 TP 70 TP 72 TP 74 TP 76 TP 78 TP 80 TP 82 TP 84 TP 86 TP 88 TP 90 TP 92 TP 94 TP 96 TP 98 TP 10 0 TP 10 2 TP 10 4 TP 10 6 TP 10 8 TP 11 0
20"
TP 20 0
J20
First Pixel
TP 68 DR O0 DR O1 DR O2 DR O3 DR O4 DR O5 DR O6 DR O7 DBO0 DBO1 DBO2 DBO3 DBO4 DBO5 DBO6 DBO7 DGO0 DGO1 DGO2 DGO3 DGO0 DGO1 DGO2 DGO3 DGO4 DGO5 DGO6 DGO7 DGO4 DGO5 DGO6 DGO7 DR O0 DR O1 DR O2 DR O3 DR O4 DR O5 DR O6 DR O7 TP 71 TP 73 TP 75 TP 77 TP 79 TP 81 TP 83 TP 85 TP 87 TP 89 TP 91 TP 93 TP 95 TP 97 TP 99 TP 10 1 TP 10 3 TP 10 5 TP 10 7 TP 10 9 TP 11 1 TP 11 2 TP 11 3 TP 11 4 TP 22 6
DGB[0. .7]
DGG[0..7 ]
AU 20"
SWAPRGB: Display Data Swap RGB Order. When SWAPBO=1, RGB wi ll be BGR. SWAPEO: Display Data Swap Even Odd Pixels. When SWAPEO=0, DR, DG, DB : First Pixels
[P. 4]
DGG0 DGG1 DGG2 DGG3 DGG4 DGG5 DGG6 DGG7
SWAPEO: Display Data Swap Even Odd Pixels. When SWAPEO=1, the even and odd pixel data will be swapped at the package pins . DGR, DGG, DGB : First Pixels DR, DG, DB : Second Pixels
[P. 4]
DGB0 DGB1 DGB2 DGB3 DGB4 DGB5 DGB6 DGB7
1 2 47 3 4 1 RN7 2 47 3 4 RN8
8 7 6 5 8 7 6 5 8 7 6 8 7 6 5 5
CN 11 22P
CN 10 22P
1 2 47 3 4 RN9 1 2 47 3 4 RN 10
8 7 6 5 8 7 6 5 8 7 6 8 7 6 5 5
CN 13 22P
CN 12 22P
DG R[0 ..7]
[P. 4]
R0 R1 R2 R3 R4 R5 R6 R7
1 2 47 3 4 RN 11 1 2 47 3 4 RN 12
8 7 6 5 8 7 6 5 8 7 6 8 7 6 5 5
DBO0 DBO1 DBO2 DBO3 DBO4 DBO5 DBO6 DBO7
DEN
TP 11 6
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
20K0049 040(OPEN)
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
CON30P(O PEN )
DBE0 DBE1 DBE2 DBE3 DBE4 DBE5 DBE6 DBE7 DGE0 DGE1 DGE2 DGE3 DGE4 DGE5 DGE6 DGE7 DR E0 DR E1 DR E2 DR E3 DR E4 DR E5 DR E6 DR E7 DC LK DEN DVS DHS TP 20 1 VCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
20L2043050
CN 15 22P
CN 14 22P
Second Pixel
DR E0 DR E1 DR E2 DR E3 DR E4 DR E5 DR E6 DR E7
DC LK
TP 11 5 C 363 22 P J
DB [0..7]
[P. 4]
DB 0 DB 1 DB 2 DB 3 DB 4 DB 5 DB 6 DB 7
1 2 47 3 4 RN 13 1 2 47 3 4 RN 14
8 7 6 5 8 7 6 5 1 2 3 1 2 3 4 4
EMI solution, close to J2
CN 17 22P
CN 16 22P
DG [0..7]
[P. 4]
DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7
1 2 47 3 4 1 RN 15 2 47 3 4 RN 16
8 7 6 5 8 7 6 5 1 2 3 1 2 3 4 4
CN 19 22P
DGE0 DGE1 DGE2 DGE3 DGE4 DGE5 DGE6 DGE7 PC BOA RD CN 18 22P 48.M 2305 .A00
DR[0. .7]
[P. 4]
DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7
1 2 47 3 4 1 RN 17 2 47 3 4 RN 18
8 7 6 5 8 7 6 5
CN 21 22P
DBE0 DBE1 DBE2 DBE3 DBE4 DBE5 DBE6 DBE7 CN 20 22P
NOTE:I2C ADDRESS SELECT

C 501 3.3P C R501 10 R502 OPEN Y 501 18.432M HZ R503 4.7K R504 4.7K
C 502 3.3P C VCC
C 503 56 P J
L501 42 OHM
TP501 TP50 2 C 507 56 P J C 508 56 P J
+ C504 100 U 16V
C505 470P K
C506 1.5N M
63
62
57
55
53
64
61
60
59
58
56
54
51
52 ANA2_IN+
XTAL_I N
ANA_IN -
NC
NC
NC
TP
D_CTR_I/O_0
D_CTR_I/O_1
STANDBYQ
[ P.4] [ P.4]
SCL_5V SD A_5V
R505 R506
10 0 10 0 C510 100P K C511 100P K
1 2 3 4 5
AUD_CL_OUT
XTAL_OUT
ANA1_IN+
ADR_SEL
TESTEN
50
I2C_CLK I2C_SDA I2S_SL I2S_WS I2S_DA_OUT I2S_DA_IN1 ADR_DA ADR_WS ADR_CL DVSUP DVSS I2S_DA_IN2 NC NC NC RESETQ
AVSUP AVSS
49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
C533 C535 + 0.1U K 35V 3.3U C537 470P K C538 10 U 16V L503 42 OHM +9V 8_3_VOLT D1 9 1 N 4148 + C525 C526 330P J 330P J C527 C528 330P J 330P J C529 C530 330P J 330P J C531 C532 330P J 330P J C523 C524 330 N Z 330 N Z R513 R514 47 0 47 0 C517 C518 330 N Z 330 N Z R511 R512 47 0 47 0 C515 C516 330 N Z 330 N Z R509 R510 47 0 47 0 C513 C514 330 N Z 330 N Z R507 R508 47 0 47 0 RI 1 LI1 RI 2 LI2 RI 3 LI3 RI 4 LI4 C512 0.1U K C509 + 10 U 16V
MONO_IN VREFTOP SC1_IN_R SC1_IN_L

U501
VCC L502 42 OHM
6 7 8 9 10
[P. 1] [P. 1] [P. 1] [P. 1] [P. 1] [P. 1] [P. 1] [P. 1]
ASG1 SC2_IN_R
MSP 3412G
L ow:0x80 High:0x84 Open:0x88
SC2_IN_L ASG2 SC3_IN_R SC3_IN_L ASG4 SC4_IN_R SC4_IN_L AGNDC
VCC R515 4.7K
+ C519 100 U 16V
C520 1.5N M
C 521 220P Z 470P K
C522
11 12 13 14 15 16
SC2_OUT_R
SC1_OUT_R
SC2_OUT_L
AHVSU P
17
DACM_R
DACM_C
DACM_S
DACM_L
CAPL_M
DACA_L
CAPL_A
DACA_R
DACM_SUB
VREF2
VREF1
C 534 22U 16V
SC1_OUT_L
AHVSS
R533 R534 C539 10 U 16V + 10 U 16V + C540
NC_R0603 NC_R0603
C 536 1.5N M
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
C551 LINEOUT_ R LINE OUT_ L R519 R520 R517 R518 47 0 47 0 C549 C544 C543 1000P J 1000P J 1000P J C545 1000P J R516 R521 R522 R523 10 0 C548 1000P J NC_R0603 NC_R0603 C552
10 U 16V + 10 U 16V +
Voltage decreasing 0.7v
[P. 1] [P. 1] [P. 7] [P. 7]
AUDIO_R_Line A UDIO _L_Line AU DIO_R_OUT A UDIO_L_OUT R524 R525
R7 2 10 0 10 0 10 0 LINE OUT_ L LINEOUT_ R 10K 10K
0 48.M 2305 .A00 20L0BI PC BOARD
Digital GND
Analog GND
+19V
VCC
+5VS
+12V J11 TP 11 9 TP 12 1 TP 12 0
+12V +5VS
VCC
+19V
L CD_ON
[P. 4]
1 3 5
2 4 6 8 10 12 14 16 18 20
L CD_BR
[P. 4]
+12V
TP 12 2 TP 12 3
7 9 11
CHAN GE C108 P/N to 79.4761D.3A1

1
U1 5
TP 12 4 PW R_ON MUTE
13 15 17 19
VI
VO
+9V
[P. 3] [P. 4]
TP 12 5 TP 12 6
GND
+ 780 9ABD2T
A UDIO_L_O UT AU DIO_R_OUT
[P. 6] [P. 6]
C109 0.33U Z
C 108 47U 16V
C110 0.1U K
2072060210 +5VS C140 C141 C142 C143 C144 C145 C146 C147 C148 C149 C150 C151 C152 C153 220PJ C112 0.1U K 220P J 220P J 220P J 220P J 220P J 220P J 220P J 220P J 220P J 220PJ 220PJ 220PJ 220PJ
U1 6
VIN
VOUT
VCPU33
GND
LD1117-3. 3
C 111 47U 16V
C113 0.1U K
(For EMI)
(For EMI)
3
U1 7
VIN
VOUT
VCPU18
GND
C115 0.1U K
LM317 M
R8 3 681F
C 114 47U 16V
C116 0.1U K
R8 4 301F
+ C117 10 U 16V
VCC C119 0.1U K J12 TP 23 RT1 RT2 +12V
U1 8
VIN
VOUT
V33
GND
LD1117-3. 3
C 118 47U 16V
C120 0.1U K
3
OPEN
TP 24
NC
NC
20L0BI PC BOA RD 48.M 2305 .A00
VIDEO SIGNAL PROCSSING - TRAITEMENT VIDEO - VIDEO SIGNALVERARBEITUNG - ELABORAZIONE VIDEO - TRATAMIENTO VIDEO
( VIDEO BOARD 1/6)
J1
[P.3] [P.3] [P.3] [P.3] [P.2] [P.3]
V CLK VVS VHS V PEN VF IELD VY0 VY1 VY2 VY3 VY4 VY5 VY6 VY7
TP1 TP3 TP5 TP7 TP8 TP10 TP12 TP14 TP16 TP19 TP21 TP22 TP24 TP27 TP28 TP30 TP32 TP34 TP36 TP38 TP40 TP97 TP43 TP44 TP45
VY[0..7 ]
[P.3]
VU V[0..7]
V UV0 V UV1 V UV2 V UV3 V UV4 V UV5 V UV6 V UV7
+12 V +5VS VC C +9 V
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
TP2 TP98 TP6 TP99 TP9 TP10 0 TP11 TP13 TP15 TP17 TP18 TP20 TP4 TP23 TP25 TP26 TP29 TP31 TP33 TP35 TP37 TP39 TP42
L23 L24 L25 L26 L27 L28 RI 1 LI1 RI 2 LI2 RI 4 LI4 AV_DET
1000 1000 1000 1000 1000 1000
OHM OHM OHM OHM OHM OHM
SD _Y_IN SD_Y_ GND S D_CB_I N SD_CB_GND SD_C R_I N SD_ CR_GND
[P.2] [P.2] [P.2] [P.2] [P.2] [P.2]
[P.4] [P.4] [P.4] [P.4] [P.4] [P.4] [P.4] [P.2 .3] [P.2 .3] [P.2 .3] [P.4] [P.2 .3] [P.4] [P.2]
INPUT_DET TV_DET SD A SCL DECO E TUNER _ACK VIDEO_RESET AV_SEL CVBS_SE L +12 V +5VS VCC +9 V L22
R1 0
BE AD
TEKCON SLOT 60Pin

Screw Holes
Opti cal Points
OP1 OP
OP2 OP
OP3 OP
OP4 OP
OP5 OP
OP6 OP
OP7 OP
5
OP8 OP OP9 OP OP10 OP OP1 1 OP OP1 2 OP OP1 3 OP OP1 4 OP
9 8 7 6
5 4 3 2
H2 HOLE-V8
9 8 7 6
5 4 3 2
H3
9 8 7 6
5 4 3 2
H4 HOLE-V8
9 8 7 6
4 3 2
H1 HOLE- V8
HOLE-V 8
( VIDEO BOARD 2/6)
VCC_A VCC_ A PIN5 9 PIN6 9 C2 10U Z C3 0.1U K C4 15 00P J P C5 390P K C6 0.22U K VCC_A IN7 6 C7 15 00P J C8 390P K PIN5 2 C9 0.047U K C10 0.015U K V 33D
(Bypass Group
Delay Circuit)
+9 V
C1 0.1U K
R63 560 L1 OPEN C 255 180 P J Q1 2N3904
R64 6.8K
R 204 R 205 R6 R8 R9 R10 C1 1 3.3P C Y1 20.25MHZ C1 2 3.3P C V3 3D V 33D RN 1 47
47 47 47 47 47 NC_R0 603
C45
R61
2.2K 1 C 200 OPE N
C11 9 OPE N
R69 R7 8 OPEN OPEN R66 470 R62 470 R65 3.3K
[P.6]
CVB S_INPUT
R7 0
R6 8
270
SVVS SVH S S VPEN VF IELD
[P.3] [P.3] [P.3] [P.1]
22 U 16 V
5 6 7 8 5 6 7 8
V3 3D RN 2 47
4 3 2 1 4 3 2 1
DU DU DU DU DU DU DU DU
V0 V1 V2 V3 V4 V5 V6 V7
VC C
C17
C2 54 82P J
C16 UV0 UV1 UV2 UV3 UV4 UV5 UV6 UV7
DUV[ 0..7]
[P.3]
R 255 0.047 U K Q7 2N3904
S CART_BLNK
1
100
[P.5]
ASGF XTAL2 XTAL1 N.C CLK5 VSTBY FPDAT/VSYA VS MSY/HS FSY/HC/HSYA AVO INTLC VSUPSY GNDSY C0 C1 C2 C3 GNDC VSUPC C4 C5 C6 C7
Q5 2N3906
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
R 262
470
VCC_ A R 230 R 231 75 75 C 184 75 330P J 33 0P J CVB S_VD R2 32 R11 NC_R0 603 +9 V 10 U 16 V 0 C 186 68P J C19 C15 0.68U K 0.68U K C 185 C13 C18 C14 0.68U K TP4 6 0.68U K OPE N
[P.4]
R 259
S_C S_Y
R 257
10 K
1
R 258 10K
Q8 2N3904
[P.4]
[P.4]
VCC
B 1/CB1I N G1/Y1I N R 1/CR1I N B 2/CB2I N G2/Y2I N R 2/CR2I N ASGF N.C/FFRSTWI N VSUPCAP VSUPD GNDD GNDCAP SCL SDA RESQ TEST VGAV YCOEQ FFI E FFW E FFRSTW FFRE FFOE CLK2 0
SCA RT_FB_EN
R 260
Q4 2N3904 C27
C20 +
C21 0.047U K
[P.6]
VPC3 23X D
D15 1N414 8
R 261 150
0 .1U K U3
+ C26 10 U 16 V TP47 R15 NC_R0 60 3 C2 8 L3 6 3.3NH L3 7 3.3NH L3 8 3.3NH R 226 R 227 R 228 75 C3 6 75 C39 75 C41 R2 0 330P J 330P J C40 0.22U K VR1 3 30 P J C38 0.22U K VG1 C30 0.22U K C35 15 00P J C37 390P K R20 R21 C33 100P K 3 30 P J C34 0.22U K VB1 R17 10 0 VIDEO_RESET VC C
SEL FBI 1 FBI 2 VIA1 VIA2 VIB1 VIB2
VP
[P.6] [P.5] [P.6] [P.5] [P.6] [P.5] [P.6]
TT_BLNK SCART_BLUE TEXT_ B SCA RT_GREEN TEXT_ G SCAR T_RED TEXT_ R NC_R0 603 C 190 C 191 C 192 C 193 C 194 C 195 R1 6 R1 8 R1 9 R22 0.047U K 0.047U K 0.047U K 0.047U K 0.047U K 0.047U K
15 14 2 6 3 7 4 8
FBO VOA VOB VOC GND IOCNR
13 12 11 10 16
L3 5 3.3NH
R14
75
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
VIC1 VIC2
10 0 100 100 U4 VCC 1000 OHM S D_CB_I N L29 R2 3 75 L39 3.3NH R 233 75 C42 C4 3 0.22U K 3 30 P J VB2 R3 1K VC C V3 3D
TDA8601T
100 100
SDA SCL
[P.1] [P.1]
GND
DECOE L H
Y/C Output Disable Enable

1K DECOE
VI N
VOUT
[P.1]
1000 OHM SD_CB_GN D L30 1000 OHM L31
C47 0.1U K LD1117-3. 3
+ C46 47 U 16 V
0.1U K C49
PIN1 0
PIN2 9
PIN3 6
SD_Y_I N
L40 3.3NH R2 4 75
R 234
75
C44 C1 18
0.22U K 330P J
VG2
[P.1]
1000 OHM SD_Y_ GND L32 1000 OHM L33
Q2 2N3904
R5 R7 10K
[P.1]
[P.1]
SD_C R_I N
L41 R2 5 75 3.3NH
R 235
75
C48 C5 4
0.22U K 3 30 P J
VR2
[P.1]
1000 OHM SD _CR_GND L34
[P.1]
PIN4 5
[P.1]
10 U 16 V
65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
GNDF VRT I2CSEL ISGND VSUPF VOUT CI N VIN1 VIN2 VIN3 VIN4 VSUPAI GNDAI VREF FB1I N AISGND
U1 VPC3230D
I2C : 0X 8E
Y0 Y1 Y2 Y3 VSUPY GNDY Y4 Y5 Y6 Y7 GNDLLC VSUPLLC LLC 1 LLC 2 VSUPPA GNDPA
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
RN3 5 6 7 8 RN4 5 6 7 8 R12 R13
47
4 3 2 1
47
DY DY DY DY DY DY DY DY
0 1 2 3 4 5 6 7
4 3 2 1
DY[ 0..7]
[P.3]
0 NC_R 0603
S VCLK
[P.3]
C22 15 00P J
C23 0.1U K
C25 O PEN
[P.1]
+ C29 47U 16V
L2
VCC_A
L3
BEAD C31 0.1U K + C3 2 22U 16 V
BE AD L4
BE AD
0.1U K C50
0.1U K C51
0.1U K C5 2
0.1U K C5 3
( VIDEO BOARD 3/6)
P3P3 V U5 A U5B P2P5 V U5 C RAMA0 RAMA1 RAMA2 RAMA3 RAMA4 RAMA5 RAMA6 RAMA7 RAMA8 RAMA9 RAMA1 RAMA1 RAMA1 RAMA1 R AMD0 R AMD1 R AMD2 R AMD3 R AMD4 R AMD5 R AMD6 R AMD7 R AMD8 R AMD9 RAMD10 RAMD11 RAMD12 RAMD13 RAMD14 RAMD15
1 2 3 4 6 7 8 9
DY[0 ..7]
VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7 VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7 VR0 VR1 VR2 VR3 VR4 VR5 VR6 VR7 SVHS SVVS SVCLK PVCLK CREF PVVS PVHS DGB0 DGB1 DGB2 DGB3 DGB4 DGB5 DGB6 DGB7 DGG0 DGG1 DGG2 DGG3 DGG4 DGG5 DGG6 DGG7 DGR0 DGR1 DGR2 DGR3 DGR4 DGR5 DGR6 DGR7 DGHS DGVS DGCL K
PW1230
DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DCL K DVS DHS DEN DENG DENB DENR ADR ADG ADB VREFI N VREFOUT RSET COMP MVE CGMS TESTCL K
110 111 113 114 116 117 118 119 121 122 124 125 127 128 129 130 13 2 13 3 13 5 13 6 13 8 13 9 14 1 14 2 102 103 10 4 14 5 10 6 10 7 10 8 15 6 153 150
C55 DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DR 0 DR 1 DR 2 DR 3 DR 4 DR 5 DR 6 DR 7 DC LK DVS DH S DE N DP EN
19 49 77 11 2 13 4 18 7 21 9 25 1 4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1
47
Vs s Vs s Vs s Vs s Vs s Vs s Vs s Vs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s PVs s DPAVs s DPDVs s MPDVs s MPAVs s ADDVs s ADAVs s ADGVs s AVS33B AVS33G AVS33R
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d PVd d DPAVd d DPDVd d MPDVdd MPAVd d ADDVd d ADAVd d ADGVd d AVD33B AVD33G AVD33R
5 34 93 12 3 14 0 17 5 20 5 23 5 14 29 42 54 64 69 80 90 101 109 120 131 143 165 180 200 208 216 224 230 237 243 249 256 19 7 199 58 60 149 16 3 166 15 1 154 157
[P.2]
DY DY DY DY DY DY DY DY DU DU DU DU DU DU DU DU
0 1 2 3 4 5 6 7 V0 V1 V2 V3 V4 V5 V6 V7
15 16 17 18 20 21 22 23 30 31 32 33 35 36 37 38 11 12 13 25 26 27 28 70 71 72 73 75 76 78 79 81 82 83 84 86 87 88 89 91 92 94 95 97 98 99 100 66 67 68
5 6 7 RN5 8 5 47 6 7 RN 6 8 5 6 7 RN 7 8 5 47 6 7 RN 9 8
47
VY 0 VY 1 VY 2 VY 3 VY 4 VY 5 VY 6 VY 7 V UV0 V UV1 V UV2 V UV3 V UV4 V UV5 V UV6 V UV7
VY[0..7 ]
P3P3 V
[P.1]
DUV[0 ..7]
V UV[0..7 ]
[P.2]
[P.1]
[P.2] [P.2] [P.2] [P.2] [P.2] [P.2] [P.2]
S VHS SVVS S VCLK S VCLK S VPEN SVVS S VHS
70 OHM R29 R31 47 47 R33 47 R35 TP4 8 TP4 9 R38 47 TP5 0 TP5 1 TP5 2 0.01U K 27 0 0.01U K
6 12 46 52 28 41 54
V CLK [P.1] [P.1] VVS [P.1] VHS DECOE [P.1] V PEN
[P.1]
10 24 39 46 57 65 74 85 96 10 5 11 5 12 6 13 7 14 7 17 1 18 9 19 3 20 2 21 2 22 2 22 8 23 3 24 0 24 6 25 3 19 6 19 8 59 61 14 8 16 4 16 7
0 1 2 3
213 210 207 204 203 206 209 211 214 217 215 220 221 218
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA1 0 MA1 1 MA1 2 MA1 3
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 mRASn mCASn mWEn
25 5 25 2 24 8 24 5 24 2 23 9 23 6 23 2 23 1 23 4 23 8 24 1 24 4 24 7 25 0 25 4 22 5 22 6 22 7
U6 RAMA11 RAMA10 RAMA9 RAMA8 RAMA7 RAMA6 RAMA5 RAMA4 RAMA3 RAMA2 RAMA1 RAMA0 RAMA12 RAMA13
VDDQ VDDQ VDDQ VDDQ VDD VDD VDD
49 43 9 3 27 14 1
R26 RC LK R28
0 0
223 229
MCLKFB MCLK
PW1230
4 33 3 2 RN 8 1
5 R RASn 6 R CASn 7 RWEn 8
35 22 34 33 32 31 30 29 26 25 24 23 20 21 19 38 37 18 17 16 39 15
A1 1 A1 0 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 BA0 BA1 CS CL K CKE RAS CAS WE
R27 P3P3V RC LK P3P3V
1K
DQ1 5 DQ1 4 DQ1 3 DQ1 2 DQ1 1 DQ1 0 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
53 51 50 48 47 45 44 42 13 11 10 8 7 5 4 2 40 36
RAMD15 RAMD14 RAMD13 RAMD12 RAMD11 RAMD10 RA MD 9 RA MD 8 RA MD 7 RA MD 6 RA MD 5 RA MD 4 RA MD 3 RA MD 2 RA MD 1 RA MD 0
R RASn R CASn RWEn P3P3V R30 R32 R34 R36 R37 AVDD2 AVDD1 A VD25 Y2 A VD33 R45 C65 18P J 2M C66 18P J DI _RESET 1 0MHZ R44 0 R39 R40 U5 D 10K 10K 10K 10K 10K 0 0 0 0
NC/RFU NC
48 50 51 52 53 43 44 45 47 40 41 56 55
TDO TCK TDI TMS TRSTN I2CA1 I2CA2 SCL SDA XTAL I XTAL O TEST
MCUA0 MCUA1 MCUA2 MCUA3 MCUA4 MCUA5 MCUA6 MCUA7 MCUD0 MCUD1 MCUD2 MCUD3 MCUD4 MCUD5 MCUD6 MCUD7
16 8 16 9 17 0 17 2 17 3 17 4 17 6 17 7 17 8 17 9 18 1 18 2 18 3 18 4 18 5 18 6 19 0 19 1 192 18 8
VSSQ VSSQ VSSQ VSSQ VSS VSS VSS
UDQM LDQM
HY57V641620HGT-
4M*16 SDRAM
[P.1] [P.1]
SCL SDA
R41 R42
P3P3V
16 1 16 2 159 16 0 20 1 14 6 14 4
R4 3 C63 C64 2 R4 6 R4 7
A VD33
1 10 U 0 16 V P3P3 V 0 TP5 3
15 2 15 5 15 8
C56 0.1U K
C57 0 .1U K
C58 0.1U K
C5 9 0.1U K
C60 0.1U K
C6 1 0.1U K
C6 2 0.1U K
PW1230
RESETn MCUCS MCUWR MCUCMD MCURDY

PW1230
1
+ C67 10U 16V
22U 16V
P3P3 V
L7 A VD33 VC C C73 0.1U K C74 0.01U K C7 5 0.1U K L8 AVDD2 42 OHM C87 0.01U K R50 681F U7 P2P5V
P2P5 V
42 OHM
0.1U K 0.01U K
GND
C7 8 0 .1U K
C7 9 0 .1U K
C8 0 0 .1U K
C81 0 .1U K
C8 2 0.1U K
C83 0.1U K
C8 4 0 .1U K
C8 5 0 .1U K P2P5 V P3P3 V
LM317 M
R49 681F
1
+ C72 47 U 16V
C8 8 0 .1U K
C8 9 0 .1U K
C9 0 0 .1U K
C91 0 .1U K
C9 2 0.1U K
C93 0.1U K
C9 4 0 .1U K
C9 5 0 .1U K
C96 0 .1U K
C97 0.1U K
C98 0.1U K
C99 0.1U K
C1 00 0.1U K
C1 01 0.1U K
C86 0.1U K L9
AVDD1 C10 4 0 .1U K C10 5 0 .1U K C10 6 0 .1U K C1 07 0.1U K C10 8 0 .1U K C1 09 0 .1U K C1 10 0 .1U K C1 11 0 .1U K C11 2 0.1U K C1 13 0.1U K 42 OHM C1 02 0.1U K C 103 0.01U K
C77 10U 16 V
I2C
[P.1]
VIDEO_RESET 0 R4 8
: 0X64
V 33D P2P5 V L6 A VD25 42 OHM C69 + C70 C71
L5
P3P3V
42 OHM
C68 0.1U K
VI N
VOUT
C76 0.1U K
( VIDEO BOARD 4/6)
VC C C 114 0.1U K R51 68K R52 R53 R55 68K LI1 100 1K Q3 2N3904 R54 0 CV BS VI DEO_I N 74 HC405
J6 TP54
Bottom
View
3 3 4 4
TP5 6 R5 6 1K
+5VS
5 4 3 16
3 CVB S_VD
TP5 5
CVBS_ IN
1000 OHM L10
C1 17 +
10U 16V
AV_SEL
[P.1]
[P.1]
[P.2]
[P.4]
TP5 7
R5 7
1K D1 D2 TZMC5V1 R60 75 TZMC5V1 R58 22K R59 22 K DN 1 BAV99
[P.1] RI 1
VCC
6 7 8
C 115 + 10U 16V
C1 16 0.1U K
AV_SEL LOW HIGH

U2 C
OUTPUT CVBS TV
2
TZM C5V1 D3
TZMC5V1 D4 C1 89 0 .1U K VC C R3 16 68K R3 18 100 R3 17 68K R 319 1K Q305 2N3904
2N3904 2N3906
J7
Bottom G1
View
TP41
Y . S1 S1 G1 .
3 1 G1
TP58
1000 OHM L11 C 127 O PEN C1 20 10U 16 V +
R 311
S_Y
[P.2]
+5VS TP59 R71 DN 2 BAV99
G2
2 4
75
2 G3
4
221 028900 1 INPUT_DET
1000 L12
OHM VC C C1 24 10U 16 V DN 3 BAV99 C1 22 0 .1U K R72 68 K R74 100 R76 68 K R80 VCC 1K Q6 2N3904 R77 0 S_C + +5VS
C 128 O PEN
R82 75
[P.2]
Top View
14 13
(ST)
2 1
+9V L20 42 OHM R 253 + C 125 10 U 16 V 560 C 133 10U 16V +
C 130 0.1U K
R8 8 68K R9 0 100 R94 68 K Q9 2N3904 R95
[P.1]
CVBS_ SEL
16
0 S CART_CVBS TV
12 13
U2A 74HC4053
11
14
[P.5]
R9 7 1K
VI DEO_I N
[P.4]
+9V R 249 22
J8 TP6 1 1 3 5 7 9 11 13
6 7 8
+9 V TP62 TP63 TP65 TP66 TP67 TP68 TP69 L1 3 1000 OHM R89 100 100 R91 R73 NC_R0 60 3 SCL_TV SDA_TV
CVBS_SEL Output LOW HIGH

+ C 126 10U 16 V
TP6 4
2 4 6 8 10 12 14
CVBS_VD SCART_CVBS
T UNER_DET TUNE R_ACK
R 254 470
R98 Q2 3 2N3906 V 33D VC C
100
Q2 2 2N3904 R92 R2 50 1K 68 VI DEO_OUT
[P.5]
R 108
R 107
[P.6]
RI 2 LI2
[P.1] [P.1]
3.3K
3.3K
Q1 1 SCL
Q1 0
R109 R110
2 1
Q13 BSN2 0
3 3
2 1
BSN2 0 Q1 2
470 470 S CART_ROUT SCART_L OUT
[P.5] [P.5]
[P.1]
SDA
2
BSN 20
3
BSN 20
[P.1]
C 196 O PEN
C 197 O PEN
C 198 OPE N
C 199 OPE N
( VIDEO BOARD 5/6)
+5VS DN 6 BAV99
VC C
C 140 0.1U K
[P.4]
S CART_ROUT SCART_L OUT R 163 R 164 0 L1 4 0 R19 4 R 195 C 141 D5 D6 C1 42 TP70 TP72 100K 100K 10 00P J 10 00P J J9 SCAR T_CVBS_I N 1000 OHM C1 43 R 115 75 10U 16V
R1 13 68 K R 114 10 0 R1 17 68 K R 118 1K Q1 4 2N390 4 R1 16
[P.4]
[P.5]
2
TP71 TP7 3 TP74 TP76 CLK_OUT DAT A_OUT R 166 R 167 0 0 TP7 7 TP7 9 SCA RT_AL_I N R 165 0 SCART_ AR_I N
47
S CART_CVBS
1 3 4 5 6
[P.5]
[P.2]
TZM C5V1
TZM C5V1
SCAR T_BLUE_I N
TP75
7 8 9 10
[P.5]
SC ART_AL_I N R1 19 1K D9 SCART _AR_I N R1 20 1K R 121 22K R1 22 22K D11 TZMC5V1 D12 TZMC5V1 TZMC5V1 D10 TZMC5V1 RI 4 LI4
[P.1]
[P.5]
SCART_G REEN_I N TP78
SCA RT_SWITCH D13 12.4~14 .1V
D7
D8
11 12 13 14
[P.5]
[P.5] [P.1]
[P.5]
TZMC5V1 TZMC5V1 SCART_RE D_I N TP80
[P.5]
TP81 R 168 0 D1 4 R 125 75 DN 9 BAV99 S CART_BLNK
15 16 17 18 19 20 21
[P.5]
TP82
[P.2]
+5VS
TP83
[P.5]
TZMC5V1
SCART _CVBS_I N
DN 8
+5VS SCAR T_BLUE_I N BAV9 9
1000 OHM L1 6
C 154 O PEN C 145 R1 26 75 10U 16V S CART_BLUE
[P.2]
[P.5]
VI DEO_OUT
L1 5 1000 OHM
[P.4]
+5VS DN 10 BAV99
1000 OHM L1 7 REEN_I SCART_G N
C 155 O PEN C 147 R1 32 75 10U 16V SCA RT_GREEN
[P.2]
[P.5]
Mode1 8.6- 12V 3.5- 8.6V 0-3 .5V 0 1 1

+5VS
Mode2 0 0 1 Auto 16:9 Manual

+5VS R 224 R2 25 SCART_RE D_I N 10K 10K C 156 O PEN C 149 R1 38 75 U15 SCART_M ODE1 10U 16V SCAR T_RED DN 11 BAV99 +5VS
1000 OHM L1 8 +
[P.2]
[P.5] [P.6] [P.6] [P.1]
V+
R21 5 10K SCA RT_SWITCH
0V~4. 85V
3 2
R21 6 4.3K
R 217 10K
1 7
[P.5]
3.49V
5 6
IN1+ OUT1 IN1IN2+ OUT2 IN28 IN3+ OUT3 IN314 IN4+ OUT4 IN4GND
R22 0 R22 1
100K 100K
Q1 2N3904 Q16 2N3904 R 222 NC_R0 603 R2 23 NC_R0 603 R1 27 0
SCART_M ODE2 TV_DET
1.40V
R 245 6.8K R21 8 10K R 219 3.9K
10 9 12 13
High Active
11
LMV3 24M
( VIDEO BOARD 6/6)
+2.5V +3. 3VDAC C 168 R 171 4.7K R1 72 4.7K R 189 R 190 R 191 R 192 R 193 C 167 0 .1U K U1 3 +2. 5VDAC 0 .1U K C 169 +3. 3VDAC 0.1U K EE_SCL EE_SDA U14 +3. 3VDAC C 170 0.1U K C 171 0.1U K +2. 5VDAC +2. 5V LANG3 LANG2 LANG1
[P.6] [P.6] [P.6]
1 2 3 4
NC NC NC GND
VCC WP SCL SDA
8 7 6 5
0 NC_R 0603 0 NC_R 0603 0
+3. 3VDAC L ANG3 L ANG2 LCB R1 74 I N FO R 175 LIS T R1 76 I2C_EN R 177 RGB_G AI N R1 78 L ANG1 R 143 220 R14 4 68 Q18 2N3904 R14 8 R1 49 330 R15 0 10 10 10 TEXT_ B TEXT_ G TEXT_R 47 TT_BLNK R1 45 68 R1 46 68 NC_R 0603 0 NC_R 0603 0 NC_R 0603 +3. 3V
AT24 C02
R2 39 R2 40 0 0
[P.4]
CVBS _INPUT
C 172 R 181 NC_R0 603
0.1U K
TP8 4
TT_STAR T
[P.1] [P.1]
SCL SDA
R 243 R 244
0 0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
P 0.0 P 0.1 P 0.2 P 0.3 P 0.4 P 0.5 P 0.6 P 0.7 VDD 2.5 VSS VDD 3.3 CVBS VDDA 2. 5 VSSA P 2.0 P 2.1 P 2.2 P 2.3 HS/SSC VS P 3.0 P 3.1 P 3.2 P 3.3 P 3.4 P 3.5
SDA555 xF L
P 1.7 P 1.6 P 1.5 P 1.4 P 1.3 P 1.2 P 1.1 P 1.0 VDD 3. 3 VSS VDD 2. 5 BLANK/COR B G R VDDA 2. 5 VSSA XTAL 1 XTAL 2 RSTP 4.3 P 4.2 VDD 3. 3 VSS P 3.7 P 3.6
52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27
TT_FSB TT _B TT _G TT_ R
R1 79 R1 80 R1 82 R1 83
0 0 0 0
FSB B LUE GREEN RE D
[P.2]
[P.2] [P.2] [P.2]
TT_ RSTn +3.3V R25 2 R 184 10K Y3
B LUE GREEN
2N390 6 Q2 1 2N3906 Q2 0 2N3906 Q19
R15 1 R15 2
0 R23 6 NC_R0 60 3
6MHZ C 177 33P J C1 78 33P J
RE D
I2C : 0X60
+ C 176 10 U 16 V
+3. 3VDAC NC_R0 60 3
SCA RT_FB_EN
[P.2] [P.2]
NC_R0 60 3
SVVS S VHS
R 185 R 186
0 0
R 157
R1 58
R1 59
C 161 0 .1U K U11 16 VDD
3.3K
[P.1] [P.1]
SCL SDA
14 15 13 1 2 3
SCL SDA IN T A0 A1 A2
P0 0 P0 1 P0 2 P0 3 P0 4 P0 5 P0 6 P0 7 GND
4 5 6 7 9 10 11 12 8
[P.6] LANG1 [P.6] LANG2 [P.6] LANG3 SCA RT_FB_EN

T UNER_DET SCART_M ODE1 SCART_M ODE2
[P.2] [P.4] [P.5] [P.5]
U9 VCC +3. 3VDAC
3
C1 51 0 .1U K
GND
BE AD + C 150 47U 16 V C 152 0 .1U K + C1 53 10 U 16 V
NC_R 0603
VI N
VOUT
L19
+3.3V
R 160
R1 61
R1 62
PCA9554P W
I2C : 0X48
3.3K 3.3K
LD1117-3. 3
U1 2 VCC
3 VI N GND VOUT
+2. 5VDAC L21 BE AD R 169 681F + C 162 47 U 16 V C1 65 0 .1U K
+2.5V
C1 64 0 .1U K
LM317 M
C1 63 10 U 16 V
R1 70 681F
C 166 10U 16 V
+3. 3VDAC PIN1 1 P IN 30 C17 3 0 .1U K PIN4 4 C17 4 0 .1U K C1 75 0.1U K
( VIDEO BOARD 1/6, 20BI)
J1
[P. 3] [P. [P. [P. [P. 3] 3] 3] 2]
VCL K VVS VH S VPEN VFI EL D GY[0.. 7] GY GY GY GY GY GY GY GY 0 1 2 3 4 5 6 7
TP 1 TP 3 TP 5 TP 7 TP 8 TP 10 TP 12 TP 14 TP 16 TP 19 TP 21 TP 22 TP 24 TP 27 TP 28 TP 30 TP 32 TP 34 TP 36 TP 38 TP 40 TP 10 1 TP 10 2 TP 10 3 TP 10 4 TP 97 TP 43 TP 44 TP 45
[P. 3]
[P. 3]
BU [0..7]
BU 0 BU 1 BU 2 BU 3 BU 4 BU 5 BU 6 BU 7
[P. 3]
RV [0..7]
RV 0 RV 1 RV 2 RV 3
+12V +5VS VCC +9V
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79
2050044080
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80
TP 2 TP 98 TP 6 TP 99 TP 9 TP 10 0 TP 11 TP 13 TP 15 TP 17 TP 18 TP 20 TP 4 TP 23 TP 25 TP 26 TP 29 TP 31
L23 L24 L25 L26 L27 L28
1000 OHM 1000 OHM 1000 OHM 1000 OHM 1000 OHM 1000 OHM RI 1 [P. LI1 [P. RI 2 [P. LI2 [P. RI 4 [P. LI4
SD_Y_I N SD_Y_ GN D SD_CB _IN SD_CB _GND SD_ CR_IN SD _ CR_GND
[P. [P. [P. [P. [P. [P.
2] 2] 2] 2] 2] 2]
+9V R320 Q26 2N3906 2
[P. 4] 4] 4] 4] 5] 5] [P. 2]
R1 0
AV_SEL
[P. 4]
10K
1
R322 1K R334
AV_ DET
INPUT_D ET
[P. 4] TV_DET
SDA SC L
[P .2.3] [P .2.3]
AV_ SEL_I N
R321
3
Q17 2N3904
TP 33 DEC OE [P .2.3] TP 35 T UNER_ACK (old net: TP 37 VIDE O_RESET TP 39 AV_ SEL_I N [P .2.3] TP 42 YC _SEL_I N TP 10 5 TP 10 6 TP 10 7 TP 10 8 RV 4 RV 5 RV 6 RV 7 RV [0..7] +12V +5VS VCC +9V
1
1K R194 10K
10K
TT_ST ART) [P. 4]
+9V
[P. 3]
R195
Q24 2N3906 2
CVBS_SEL
[P. 2]
10K
1
R196 1K
R335
R197 YC _SEL_I N 1K
1
R198 10K
L22
TEKCON SLOT 80Pin
BEAD
S crew Holes
10K
Q25 2N3904
20L0BI VIDEO BOARD 48.M 2306 .A00
5 4 3 2
H1
9 8 7 6
5 4 3 2
H2
9 8 7 6
5 4 3 2
H3
9 8 7 6
5 4 3 2
H4
9 8 7 6
OP1 OP OP2 OP OP3 OP OP4 OP OP5 OP OP6 OP OP7 OP Optical Points
HO LE-V 8
HO LE-V 8
HO LE-V 8
HO LE-V 8 OP8 OP OP9 OP OP10 OP OP11 OP OP12 OP OP13 OP OP14 OP
VCC R6 3 R6 4 6.8K 56 0 L1 NC _L1206 C199 180P J Q1 2N3904 C4 5 R336 C200 R6 9 C119 R330 47 0 C191 82 PJ 20.25 MH Z C1 7 C1 6 47 0 R6 5 3.3K C1 1 3.3P C Y1 C1 2 R331 R6 2 NC_C0603 2.2K +
VCC _A VC C_ A PI N5 9 C1 0.1U K C2 10 U Z C3 0.1U K PI N69 C4 1500 P J C5 390P K C6 0.22U K VC C_ A PIN76 C7 1500 P J C8 390P K PI N5 2 C9 0.047U K C1 0 0.015U K V33 D
R204 R205 R6 R8 R9 R1 0 RN1 47
47 47 47 47 47 NC_R0603
[P. 6] CVBS_INPU T
R7 0
R6 8
27 0
22 U 16V
SVVS SVHS SVPE N VFIELD
[P. [P. [P. [P.
3] 3] 3] 1]
NC_C0603
NC_R0603
NC_R0603
3.3P C V33 D V33 D
5 6 7 8 5 6 7 8
V33 D RN2 47
4 3 2 1 4 3 2 1
DU V0 DU V1 DU V2 DU V3 DU V4 DU V5 DU V6 DU V7
UV 0 UV 1 UV 2 UV 3
[P. 4]
S_ C S_Y R230 R231 75 75 C184 330P J C1 3 C1 8 C185 330PJ C1 9 0 .68U K 0 .68U K 0 .68U K
VCC VC C_ A
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
[P. 4]
0.047U K
10 U 16V
UV 4 UV 5 UV 6 UV 7
DUV [0..7]
[P. 3]
ASG F XTAL 2 XTAL 1 N.C CLK 5 VSTBY FPDAT/VSYA VS MSY/H S FSY/HC/HSYA AVO INTLC VSUPSY GNDS Y C0 C1 C2 C3 GNDC VSUPC C4 C5 C6 C7
[P. 4]
R342 47 0 Q29 CVBS_V D R232 R1 1 NC _R0603 2N3904 R341 NC_R0603 75 Q28 10K R340 R339 VCC 10K Q27 SCART _F B_EN R338 0 +9V 2N3904 R337 C2 7 D1 5 1N4148 15 0 0.1U K U3 + C2 6 10 U 16V TP 47 2N3904 10 U 16V 0.047U K C2 0 + C2 1 0 TP 46 C 186 68 P J C1 5 0 .68U K
[P. 5]
SCART _BLN K R343 Q30 2N3906
B1/CB1I N G1/Y1I N R1/CR1I N B2/CB2I N G2/Y2I N R2/CR2I N ASG F N.C/FFRSTWI N VSUPCAP VSUPD GNDD GNDCA P SC L SD A RESQ TEST VGAV YCOE Q FFI E FFWE FFRSTW FFR E FFOE CLK20
VPC 323XD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
SEL FBI 1 FBI 2 VIA1 VIA2 VIB1 VIB2
VP
[P. 6] TT_BLNK [P. 5] SCART _BLU E [P. 6] TEX T_ B [P. 5] SCART_GREE N [P. 6] TEX T_ G [P. 5] SC AR T_ RE D [P. 6] TE XT _R
NC_R0603
15 14
1U Z 1U Z 1U Z 1U Z 1U Z 1U Z C193 C194 C195 C196 C197 C198
FBO VOA VOB VOC GND IOCNR
13 12 11 10 16
L35 3.3NH L36 3.3NH L37 3.3NH L38 3.3NH
R1 4 R226 R227 R228
75 C2 8 75 C3 6 75 C3 9 75 C4 1 3.3NH R233 R2 3 L39 C4 3 330P J VG2 75 C4 2 0 .22U K 330PJ 330PJ 330PJ C3 8 C4 0 0 .22U K 0 .22U K VG1 330PJ C3 4 0 .22U K VB1
2 6 3 7 4 8
VB2
VIC1 VIC2
R1 6 R1 8 R1 9 R2 2
GND
TDA8601T R2 0 SD_CB _IN
L29 1000 OHM
10 0 10 0 10 0
[P. 1] [P. 1]
SD_CB _GND SD_Y_I N L30 1000 OHM L31 1000 OHM
PI N1 0
PI N2 9
PI N3 6
75 3.3NH L40 R2 4 C118 1000 OHM 330PJ R234 75 C4 4 0 .22U K
Q2 2N3904
R5 R7 10K
1K
DEC OE 20L0BI VIDEO BOARD 48.M 2306 .A00
[P. 1]
[P. 1] [P. 1]
SD_Y_ GN D L32 1000 OHM L33
75 3.3NH L41 R2 5 C5 4 330P J 1000 OHM R235 75 C4 8 0 .22U K
[P. 1]
SD_ CR_I N
[P. 1]
SD _ CR_GND L34
75
VR 2
PI N4 5
65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
GNDF VRT I2CSEL ISGND VSUPF VOUT CI N VIN1 VIN2 VIN3 VIN4 VSUPAI GNDAI VREF FB1I N AISGND
U1 VPC3230D
I2C : 0X8E
Y0 Y1 Y2 Y3 VSUPY GNDY Y4 Y5 Y6 Y7 GNDLLC VSUPLLC LLC1 LLC2 VSUPPA GNDPA
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
RN3 5 6 7 8 RN4 5 6 7 8 R1 2 R1 3
47
4 3 2 1
47
0 1 2 3 4 5 6 7
4 3 2 1
0 NC_R0603
DY[0..7 ]
[P. 3]
SVC LK
[P .3 ]
C2 2 1500 P J
C2 3 0.1U K
C2 5 22 P J
R1 5 NC _R0603
VCC R1 7 C3 0 0.22U K C3 5 1500 PJ C3 7 390P K R2 0 R2 1 10 0 VIDE O_RESET
[P. 1]
+ C2 9 47U 16V
L2
VC C_ A
L3
BEAD C3 1 0.1U K + C3 2 22U 16V
BEAD L4
C3 3 100P K
BEAD
10 0 10 0
SDA SC L
[P. 1] [P. 1]
U4 VR 1 VCC VCC V33 D
3
R3 1K
DECO EY/C Output L Disable H Enabl e
VI N
VOUT
2
+ C4 6 47 U 16V 0.1U K C4 9 0.1U K C5 0 0.1U K C5 1 0.1U K C5 2 0.1U K C5 3
C4 7 0.1U K
LD1117-3. 3
P3P3V U5 A BU [0..7] U5 B P2P5V U5C RAM A0 RAM A1 RAM A2 RAM A3 RAM A4 RAM A5 RAM A6 RAM A7 RAM A8 RAM A9 RA MA10 RA MA11 RA MA12 RA MA13 DB 0 DB 1 DB 2 DB 3 DB 4 DB 5 DB 6 DB 7 DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DC LK DVS DHS DEN D PEN BU 0 BU 1 BU 2 BU 3 BU 4 BU 5 BU 6 BU 7 GY GY GY GY GY GY GY GY 0 1 2 3 4 5 6 7
1 2 3 4 6 7 8 9
DY[0..7 ]
VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7 VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7 VR0 VR1 VR2 VR3 VR4 VR5 VR6 VR7 SVHS SVVS SVCLK PVCLK CREF PVVS PVHS DGB0 DGB1 DGB2 DGB3 DGB4 DGB5 DGB6 DGB7 DGG0 DGG1 DGG2 DGG3 DGG4 DGG5 DGG6 DGG7 DGR0 DGR1 DGR2 DGR3 DGR4 DGR5 DGR6 DGR7 DGHS DGVS DGCLK
PW1230
DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DG0 DG1 DG2 DG3 DG4 DG5 DG6 DG7 DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DCLK DVS DHS DEN DEN G DEN B DEN R ADR ADG ADB VREFIN VREFOUT RSET COMP MVE CGMS TESTCLK
110 111 113 114 116 117 118 119 121 122 124 125 127 128 129 130 132 133 135 136 138 139 141 142 102 103 104 145 106 107 108 156 153 150
4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1
5 6 7 RN 10 8 5 47 6 7 RN 11 8
47
[P. 1]
19 49 77 112 134 187 219 251 10 24 39 46 57 65 74 85 96 105 115 126 137 147 171 189 193 202 212 222 228 233 240 246 253 196 198 59 61 148 164 167
Vss Vss Vss Vss Vss Vss Vss Vss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss PVss DPAVss DPDVss MPDVss MPAVss ADDVss ADAVss ADGVss AVS33B AVS33G AVS33R
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd PVdd DPAVdd DPDVdd MPDVdd MPAVdd ADDVdd ADAVdd ADGVdd AVD33B AVD33G AVD33R
5 34 93 123 140 175 205 235 14 29 42 54 64 69 80 90 101 109 120 131 143 165 180 200 208 216 224 230 237 243 249 256 197 199 58 60 149 163 166 151 154 157
[P. 2]
0 1 2 3 4 5 6 7
15 16 17 18 20 21 22 23 30 31 32 33 35 36 37 38 11 12 13 25 26 27 28 70 71 72 73 75 76 78 79 81 82 83 84 86 87 88 89 91 92 94 95 97 98 99 100 66 67 68
5 OPEN 6 7 RN 5 8 5 OPEN 6 7 RN 6 8 5 OPEN 6 7 RN 7 8 5 OPEN 6 7 RN 9 8

R2 9 R3 1 R3 3 R3 5 TP 48 TP 49 R3 8 TP 50 TP 51 TP 52
GY[0.. 7]
P3P3V
[P. 1]
213 210 207 204 203 206 209 211 214 217 215 220 221 218
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 mRASn mCASn mWEn
255 252 248 245 242 239 236 232 231 234 238 241 244 247 250 254 225 226 227
RAM D0 RAM D1 RAM D2 RAM D3 RAM D4 RAM D5 RAM D6 RAM D7 RAM D8 RAM D9 RAMD 10 RAMD 11 RAMD 12 RAMD 13 RAMD 14 RAMD 15
U6 RA MA11 RA MA10 RAM A9 RAM A8 RAM A7 RAM A6 RAM A5 RAM A4 RAM A3 RAM A2 RAM A1 RAM A0 RA MA12 RA MA13
VDDQ VDDQ VDDQ VDDQ VD D VD D VD D
49 43 9 3 27 14 1
DU V[0..7 ]
[P. 2]
DU V0 DU V1 DU V2 DU V3 DU V4 DU V5 DU V6 DU V7
RV 0 RV 1 RV 2 RV 3 RV 4 RV 5 RV 6 RV 7 0 47 47 47 47
RV [0..7]
R2 6 RC LK R2 8
0 0
[P. 1]
223 229
MCLKFB MCLK
4 33 3 2 RN 8 1
5 RR ASn 6 RC ASn 7 RW En 8
35 22 34 33 32 31 30 29 26 25 24 23 20 21 19 38 37 18 17 16 39 15
A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 BA0 BA1 CS CLK CKE RAS CAS WE
R2 7 P3P3V RC LK P3P3V
1K
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
53 51 50 48 47 45 44 42 13 11 10 8 7 5 4 2 40 36
RAMD 15 RAMD 14 RAMD 13 RAMD 12 RAMD 11 RAMD 10 RAM D9 RAM D8 RAM D7 RAM D6 RAM D5 RAM D4 RAM D3 RAM D2 RAM D1 RAM D0
PW1230
RR ASn RC ASn RW En U5D 10K 10K 10K 10K 10K 0 0 0 0
NC/RFU NC
[P. [P. [P. [P. [P. [P. [P.
2] 2] 2] 2] 2] 2] 2]
SVHS SVVS SVC LK SVC LK SVPE N SVVS SVHS
6 12 46 52 28 41 54
VCLK [P. [P. VVS [P. VHS [P. DEC OE VPEN
1] 1] 1] 1]
P3P3V R3 0 R3 2 R3 4 R3 6 R3 7 AV DD2 AV DD1 AV D2 5 Y2 AV D3 3 R4 5 C6 5 18 P J 2M C6 6 18 P J 10M HZ R4 4 R3 9 R4 0
48 50 51 52 53 43 44 45 47 40 41
TDO TCK TDI TMS TRSTN I2CA1 I2CA2 SCL SDA XTALI XTALO TEST
[P. 1]
MCUA0 MCUA1 MCUA2 MCUA3 MCUA4 MCUA5 MCUA6 MCUA7 MCUD0 MCUD1 MCUD2 MCUD3 MCUD4 MCUD5 MCUD6 MCUD7
168 169 170 172 173 174 176 177 178 179 181 182 183 184 185 186 190 191 192 188
VSSQ VSSQ VSSQ VSSQ VSS VSS VSS
UDQM LDQM
HY 57 V641620HGT -6
4M*1 6 SDRAM
[P. 1] [P. 1]
SCL SDA
R4 1 R4 2
P3P3V
C5 5
0 .01U K 27 0 0 .01U K
161 162 159 160 201 146 144
R4 3 C6 3 C6 4 2 R4 6 R4 7
AV D3 3
56 55
1 1 0U 0 16V P3P3V 0 TP 53
152 155 158
C5 6 0.1U K
C5 7 0.1U K
C5 8 0.1U K
C5 9 0.1U K
C6 0 0.1U K
C6 1 0.1U K
C6 2 0.1U K
PW1230
RESETn MCUCS MCUWR MCUCMD MCURDY

PW1230
DR0 47 DR1 DR2 DR3 DR4 47 DR5 DR6 DR7
1 2 3 4 1 2 3 4
RN 8 14 7 6 5 RN 8 15 7 6 5
GY GY GY GY GY GY GY GY
0 1 2 3 4 5 6 7
P2P5V
1
L6 + C6 7 10U 16V
42 OHM
C6 9 +
C7 0
C7 1
22U 16V
P3P3V
0.1U K 0.01U K VCC AV D3 3 U7 P2P5V
L7
42 OHM C7 3 0.1U K C7 4 0.01U K C7 5 0.1U K
GN D
Chan ge color space from RGB8 88 to YUV 444

P2P5V P2P5V
1
R4 9 681F + C7 2 47U 16V
L8 C7 8 0.1U K C7 9 0.1U K C8 0 0.1U K C8 1 0.1U K C8 2 0.1U K C8 3 0.1U K C8 4 0.1U K C8 5 0.1U K P3P3V AV DD2 42 OHM C8 6 0.1U K L9 AV DD1 42 OHM C 102 0.1U K C 104 0.1U K C 105 0.1U K C 106 0.1U K C 107 0.1U K C 108 0.1U K C 109 0.1U K C 110 0.1U K C 111 0.1U K C 112 0.1U K C 113 0.1U K C103 0.01U K C8 7 0.01U K 20L0BI 48.M 2306 .A00 VIDEO BOARD W ednesday, September
R5 0 681F
17, 2003
C8 8 0.1U K
C8 9 0.1U K
C9 0 0.1U K
C9 1 0.1U K
C9 2 0.1U K
C9 3 0.1U K
C9 4 0.1U K
C9 5 0.1U K
C9 6 0.1U K
C9 7 0.1U K
C9 8 0.1U K
C9 9 0.1U K
C 100 0.1U K
C 101 0.1U K
C7 7 10U 16V
DI_RE SET
OPTI ON
DG0 47 DG1 DG2 DG3 DG4 47 DG5 DG6 DG7
I2C
[P. 1]
RV 0 RV 1 RV 2 RV 3 RV 4 RV 5 RV 6 RV 7 VIDE O_RESET 0 R4 8
: 0X64
1 2 3 4 1 2 3 4
RN 8 12 7 6 5 RN 8 13 7 6 5
V33 D
L5
P3P3V
42 OHM
AV D2 5
C6 8 0.1U K
VIN
VOUT
LM317 M
C7 6 0.1U K
VCC C 114 0.1U K R5 1 68K R5 2 10 0 Q3 2N3904 R5 4 R5 5 LI1 1K 0
+9V
AV_SEL LO W
C 116 0.1U K
OUTPUT CVBS TV
AV_SEL
J6 TP 54
Bott om View
TP 55
CVB S_IN
1000 OHM L10 C117 +5VS 10 U 16V +
R5 3 68K
C115 + 10 U 16V
HIGH
[P. 1]
U2C
16
6
1 1 2 2
TP 57 R5 7 1K R5 8 R5 9 D1 TZMC5V1 D2 TZMC5V1 R6 0 75 22K 22K DN1 BAV99
3
[P. 1] RI 1 [P. 4]
CVBS VIDEO_I N
5 4 3 6 7 8
74HC 4053 CVBS_V D
TP 56
R5 6
1K
[P. 1]
[P .2 ]
2210018561
2
TZ MC 5V1 D3
2N3904 2N3906
D4
TZ MC 5V1
J7
Bott om View G1
TP 41
Y . S1 S1 G1
3 1 G1 2 4
TP 58
1000 OHM L11 C120 +5VS 10 U 16V DN2 BAV99 +
VCC R316 68K R323 10 0 R317 68K R318 1K Q305 2N3904 R311 0 C 189 0.1U K
TP 59
R7 1 75
[P. 2]
S_Y
G2
. C
2 G3
4
2210289001 INPUT_D ET
1000 OHM L12 C124 10 U 16V DN3 BAV99 +5VS +
VCC R7 2 68K R7 4 10 0 R7 6 68K R8 0 1K Q6 2N3904 R7 7 C 122 0.1U K
R8 2 75
[P. 2]
0 S_ C
+9V 1000 OHM L42 C128 + 10 U 16V C129 0.1U K C133 + R253 56 0 C 130 0.1U K 10 U 16V +9V R345 +9V J8 TP 61 1 3 5 7 9 11 13 2060201207 R333 NC_R0603 R332 NC_R0603 SC ART _LOUT SCART_R OU T VCC V33 D R109 R110 R107 R108 47 0 47 0 RI 2 LI2 TP 62 TP 63 TP 65 TP 66 TP 68 TP 69 L13 1000 OHM 10 0 R8 9 R9 1 10 0 R7 3 NC_R0603 SCL _TV SDA _TV R254 47 0 22 R9 4 68K R9 7 1K VCC
CVBS_SEL
R8 8 68K R9 0 10 0 R9 5 Q9 2N3904
Output CVBS_VD SCART_CVBS
LO W
[P. 1]
16
CVBS_SEL 0 TV
HIGH
12 13
U2 A 74HC 4053
11
13.2 2032.092
C1902 + R344 10 0
[P. 5] SCART _CVBS
14
VIDEO_I N
TP 64 TP 10 9 TP 11 0
2 4 6 8 10 12 14
110 U 16V
Q22 2N3904 R251 1K
6 7 8
[P. 5]
R9 2 68 VIDEO_ OU T
T UNER_ DE T T UNER_ACK
[P. 6] [P. 1]
Q23 2N3906
[P .1 ] [P .1 ]
[P. 5]
SCART_R OU T SC ART _LOUT
[P. 5]
C203 C201 C202 NC_C0603 NC_C0603 NC_C0603 C204 20L0BI VIDEO BOARD 48.M 2306 .A00 W ednesday, September 24, 2003
3.3K
14 13
2 1
3.3K
Top View (ST)
Q10
Q11
2 1
Q12 BSN20
3 3
BSN20
2
Q13
SC L
[P. 1]
NC_C0603
2
BSN20
3
BSN20
SDA
[P. 1]
J9
+5VS
[P. 4]
SCART_R OU T SC ART _LOUT R324 R325 C141 1000 P J D5 D6 C142 1000 P J SCART _BLUE_ IN TP 75 0 0 TP 70 TP 72
VCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
2210285001
[P. 5]
TP 71 TP 73 R326 0 SC ART _AR_I N
DN6 BAV99 C 140 0.1U K R113 68K R114 10 0 R117 68K R118 1K Q14 2N3904 R116 0
[P. 4]
[P. 5]
TP 74 TP 76 CL K_OU T DA TA _OUT R327 R328 TP 77 TP 79 0 0 SCART_AL_I N SCART_S WI TC H D1 3 12.4~14. 1V SCART_CVBS_ IN R115 75 L43 TP 81 D1 6 TZ MC 5V1 TP 83 SCART_CVBS_ IN TZMC5V1 1000 OHM D1 4 R125 75 SCART _BLN K L14 1000 OHM C143 10 U 16V
[P. 5]
SC ART_GREEN_I N TP 78
[P. 5]
TZMC5V1
TZMC5V1
[P. 5]
[P .2 ]
SCART _CVBS
[P. 5]
SCART_ RED_IN TP 80
D7
D8
[P. 5]
TP 82
[P. 2]
SCART_AL_I N R119 1K D9 SC ART _AR_I N R120 1K R121 22K R122 22K D1 1 T ZM C 5V1 D1 2 T ZM C 5V1 TZ MC 5V1 D1 0 T ZM C 5V1 RI 4 LI4
TZMC5V1
TZMC5V1
[P. 1]
[P. 5]
[P. 5] [P. 1]
[P. 5]
DN8 +5VS
1 3
L15 1000 OHM
2
BAV99 VIDEO_ OU T DN9 BAV99 C 205 0.1U K +5VS
[P. 4]
SCART _BLUE_ IN
1000 OHM L16 R126 75
SCART _BLU E
[P .2 ]
[P. 5]
8.6-12V 3.5-8.6V 0-3.5V
Mode 1 Mode 2 Auto 0 0 1 1

+5VS
+5VS DN 10 BAV99 +5VS
0 1
16:9 Manua l
3
R224 R225 SC ART_GREEN_I 10K 10K SC ART_ MO DE 1 [P. N 1000 OHM L17 R132 75 U1 5
C 206 0.1U K
SCART_GR EEN
[P .2 ]
[P .5 ] 6] 6]
V+
R215 10K SCART_S WI TC H
0V ~4.85V 3.4 9V 1.4 0V

R245 6.8K R218 10K R219 3.9K
R216 4.3K
R217 10K
[P. 5]
3 2 5 6 10 9 12 13
IN1+ OUT1 IN1IN2+ OUT2 IN2IN3+ OUT3 IN3IN4+ OUT4 IN4GND
1 7 8 14
R220 R221
100K 100K R222 R223
Q15 2N3904 Q16 2N3904 R127 0
SC ART_ MO DE 2 [P. TV_DET
+5VS DN 11 BAV99
[P. 1]
High Active
SCAR T_ RED_IN 1000 OHM L18 R138 75
C 207 0.1U K
NC_R0603
NC_R0603
SC AR T_ RE D
[P .2 ]
[P. 5]
LMV3 24M
11
20L0BI VIDEO BOARD 48.M 2306 .A00 W ednesday, September
24, 2003
+2. 5V +3.3VDA C C168 R171 4.7K R172 4.7K R189 R190 R191 R192 R193 C 167 0.1U K U1 3 +2.5VDA C 0.1U K C169 +3.3VDA C 0.1U K +3.3VDA C U1 4 C170 0.1U K C171 0.1U K +2.5VDA C +2. 5V LAN G3 LAN G2 LAN G1
[P. 6] [P. 6] [P. 6]
1 2 3 4
NC NC NC GND
VCC WP SCL SDA
8 7 6 5
V er P114V004
EE _SCL EE _SDA R237 R238 NC_R0603 NC_R0603
0 NC_R0603 0 NC_R0603 0
+3.3VDA C LA NG 3 LA NG 2 LC B IN FO LIST I2C_ EN RG B_GAIN LA NG 1 R174 R175 R176 R177 R178 NC_R0603 0 NC_R0603 0 NC_R0603
AT 24C02
Ve r P115
R239 R240 0 0
[P. 4]
CVBS_INPUT
C172 R181
0.1U K
NC_R0603
TP 84 R241 NC_R0603
NC_R0603
[P. 1] [P. 1]
V er P114V004
SCL SDA R242 NC_R0603
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
SDA555x FL
P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 VDD 2.5 VSS VDD 3.3 CVBS VDDA 2.5 VSSA P2.0 P2.1 P2.2 P2.3 HS/SSC VS P3.0 P3.1 P3.2 P3.3 P3.4 P3.5
P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 VDD 3.3 VSS VDD 2.5 BLANK/COR B G R VDDA 2.5 VSSA XTAL1 XTAL2 RSTP4.3 P4.2 VDD 3.3 VSS P3.7 P3.6
52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27
TT_FSB TT_ B TT _G TT_R
R179 R180 R182 R183
0 0 0 0
FS B BLUE GRE EN RED +3. 3V
TT_ RSTn +3. 3V R252 R184 10K Y3 FS B 0 R236 6M HZ C 177 33 P J C 178 33 P J RED GRE EN BLUE
R143 22 0 Q18 2N3904
R144 68
R145 68
R146 68
R148 R149 33 0 2N3906 Q19 2N3906 Q20 2N3906 Q21 R150 R151 R152
47 10 10 10
TT_BLNK TEX T_ B TEX T_ G TE XT _R
[P. 2] [P. 2] [P. 2] [P. 2]
Ve r P115
R243 R244 0 0
I2C
: 0X60
+ C176 10 U 16V
[P. 2] [P. 2]
SVVS SVHS
R185 R186
0 0
+3.3VDA C R157 R158 NC_R0603 R159 NC_R0603 C161 0.1U K U1 1 16 VDD LAN G1 [P .6 LAN G2 [P .6 LAN G3 [P .6 SCART _F B_EN T UNER_ DE T SC ART_ MO DE 1 SC ART_ MO DE 2
3.3K
[P. 1] [P. 1]
U9 VCC +3.3VDA C +3. 3V L19 + C 150 47U 16V BEAD C 152 0.1U K + C 153 10U 16V 20L0BI VIDEO BOARD 48.M 2306 .A00 W ednesday, September +2.5VDA C +2. 5V L21 BEAD R169 681F + C 162 47U 16V C 165 0.1U K + C 163 10U 16V
SCL SDA
14 15 13 1 2 3
SCL SDA INT A0 A1 A2
GND
3
C 151 0.1U K
VIN
VOUT
P00 P01 P02 P03 P04 P05 P06 P07 GND
4 5 6 7 9 10 11 12 8
] ] ] [P .4 ] [P .5 ] [P .5 ]
LD1117-3. 3
R160 NC_R0603
R161
R162
PCA9554P W
I2C : 0X48
3.3K 3.3K
U1 2 VCC
24, 2003
VIN GND
VOUT
C 164 0.1U K
LM317 M
R170 681F
C 166 10U 16V
+3.3VDA C PI N1 1 PI N3 0 C 173 0.1U K PI N4 4 C 174 0.1U K C 175 0.1U K
INTEGRATED CIRCUITS BLOCK DIAGRAM
PortC PortB PortA (7:0) (7:0) (7:0)
JTAG Debugger
A D CS (19:1) (15:0) (1:0)
NMI
TxD RxD
GPIO
PWM
IR Decoder
2-Wire Serial
16-Bit Microprocessor
Processor ROM RAM Interface
Wtchdog Timers
Interrupt Controller
UART
Processor Memory Interface VYUV (7:0) YUV to RGB YPbPr to RGB Memory Buffer Graphic or Video Port Pixel Processing Scaler
OnScreen Display
Microprocessor BUS OSD and Gain Color LooKup Tables Color Space Expander Display Timing Generator DRGB (23:0) DRGB (23:0) DVS,DHS DEN,DCLK
Color Matrix
GRGB (23:0) GVS GHS GCLK VVS VHS VCLK
Reset Sync Decoder And Timer Auto Image Optimisation Power On Reset
MCLK DCLK UCLK PLL and Oscillator X1 X0
PW113 Image Processor Internal Block Diagram
GREF GFBK
Reset
Input Unit Premary Video Port ITU-R BT 601 Secondary Video Port ITU-R BT 6656
Video Unit
Motion Detection & Noise Reduction
Memory Unit Film-Mode Detection (3:2&2:2) Previous Video I-Channel P-Channel Premary Picture (l/P)
Display Unit
Display Timing
I-Channel
Deinterlacer P-Channel RGB Video Enhancement YUV Up Scaler
Digital Output Timing
Digital Graphic Port 24-Bit
Down Scaler
CSC Two-Wire Interface Proramming Unit Analog Output Digital Output Data
PW1230 Interna Block Diagram
Color Lut
Blue Screen
VSync/ HSync DACs Timing
63
INTEGRATED CIRCUITS BLOCK DIAGRAM

A { 16 to A20 }
PSEN RD WR
SDA55XX
A { 0 to 15 } D { 0 to 7 } ALE
Analog / MUX ADC ADC
Slicer RAM 256x8 ADC Interface Memory Extension STACK 128x8 Memory Extension / Unit Counter 0 CORE Counter 1 Interrupt Contoller BUS Arbiter
Acquisition PROGRAM ROM 128K x8 Acquisition Interface
WDT Capture Control PWM P { 0 to 04} Port Logic
XRAM SRAM 16K x8bit
Peripheral BUS Interface
Caracter ROM
UART RAM / ROM Interface SFRs CLOCK & Sync System Display Logic DISPLAY GENERATOR Display REGs CLUT FIFO DAC's R G B
16K x8bit H V
BLANK / COR
CIN VIN1 VIN2 VIN3 VIN4 VOUT
71 72 73 74 75 70 AGC 2 x ADC NTSC PAL Analog Front-end Adaptive Comb Filter Color Decoder NTSC PAL SECAM Saturation Tint
Y
Mixer
2D Scaler PIP
Output Formatter ITU-R 656 ITU-R 601 Memory Control
31...34 37...40 41...44 47...50 18 19...23
Y OUT CrCb OUT YCOE FIFO CNTL
Cr
Cr Panorama
Cb
Mode Peacking Cb Contrast Brightness
RGB/ YCrCb FB RGB/ YCrCb
1..3 79 4..6
Processing Y Analog Component U/B Cr Matrix Front-End Contrast V/R Saturation Cb 4 x ADC FB Brightness FB Tint
Y/G
VPC3230
I2C Bus Sync + Clock Generation
27,28 56 57 54 13,14
LLClock H Sync V Sync AVO
Clock Gen. 62 63
20.25 MHz I2C Bus
AD9883A
54
R AIN
CLAMP
A/D
8 70...77
R OUTA
G AIN
48
CLAMP
A/D
2...9
G OUTA
43
B AIN
CLAMP
A/D
8 12...19
37
B OUTA MIDSCV DTACK HSOUT VSOUT SOGOUT
HSYNC CO AST CLAMP FILT
30 29 38 33
67
SYNC PROCESSING AND CLOCK GENERATIO N
66 64 65
SCL SD A A0
56 57 55
REF SERIAL REGISTER AND POWER MANAGEMENT
58
REF BYPASS
AD9883A
64
This technical documentation is for use by maintenance technicians only Documentation technique exclusivement destine aux professionnels de la maintenance Diese Angaben und Hinweise sind ausschlielich fr den Service des Fachhndlers bestimmt Documentazione tecnica destinata esclusivamente ai tecnici dell'assistenza Documentacin tcnica destinada exclusivamente a los profesionales de mantenimiento
Thomson multimedia Scandinavia AB Florettgatan 29 C S-25467 Helsingborg (Sweden) Tel. : 042 25 75 00
Thomson multimedia Sales UK Limited 30 Tower View Kings Hill, West Malling Kent ME19 4NQ (England) Tel. : 44 (0) 173 252 0920 Thomson multimedia Sales Germany GmbH & Co oHG Karl-Wiechert-Allee 74 30625 Hannover Thomson Consumer Electronics Poland ul.Gen.L. Okulickiego 7/9 05-500 Piaseczno (Varsovie) Tel. : (22) 757 10 80 Thomson multimedia Sales France 46, quai Alphonse Le Gallo 92648 Boulogne cedex Tel. : 01 41 86 60 00 Minitel : 3616 ou 3623 TCEDS Internet : http://www.thomson.fr
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Thomson multimedia Sales Portugal Avenida da Boavista, 3521 4106 Porto Tel. : (2) 26 18 76 41
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The description and characteristics given here are of informative significance only, and non committal. To keep up the high quality of our products, we reserve the right to make any changes or improvement without previous notice. Les descriptions et caractristiques figurant sur ce document sont donnes titre d'information et non d'engagement. En effet, soucieux de la qualit de nos produits, nous nous rservons le droit d'effectuer, sans pravis, toute modification ou amlioration. Die Beschreibungen und Daten in dieser Anleitung dienen nur zur Information und sind nicht bindend. Um die Qualitt unserer Produkte stndig zu verbessern, behalten wir uns das Recht auf nderungen vor. Le descrizioni e le caratteristiche date su questo documento sono fornite a semplice titolo informativo e senza impegno. Ci riserviamo il diritto di eseguire, senza preavviso, qualsiasi modifica o miglioramento. Las descripciones y caractersticas que figuran en este documento se dan a ttulo de informacin y no de compromiso. En efecto, en bien de la calidad de nuestros productos, nos reservamos el derecho de efectuar, sin previo aviso, cualquier modificacin o mejora.
Thomson multimedia Sales Europe - S.A. au capital de
30 000 000 - Sige : 46, quai Alphonse Le Gallo 92100 Boulogne France - RCS Nanterre B 322 019 464

Thomson Lcd03b 15et20

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TV

WARNING : ATTENTION : ACHTUNG : ATTENZIONE : IMPORTANTE :

Code :357 510 10 - 0304 / 6M -LCDB03B Print.

MEASUREMENT CONDITIONS - CONDITIONS DE MESURES - MESSBEDINGUNGEN CONDIZIONI DI MISURA - CONDICIONES DE MEDIDAS

MAIN ... etc. identifies each

pcb module. NOTE :

platines constituant l'appareil.

der Platinen, aus denen das Gert zusammengesetzt ist.

piastre dell' apparecchio.

placas que constituyen el aparato.

: INPUT - ENTRE - EINGANG - ENTRATA - ENTRADA

: OUTPUT - SORTIE - AUSGANG - USCITA - SALIDA

: EARTH - MASSE - MASSE - MASSA - MASA

INFORMATION - INFORMATIONS - INFORMATIONEN INFORMAZIONE - INFORMACIONES

15LCDM03B 20LCDM03B 20LCDB03B

27to41 27to41 27to41

42to58 42to58 42to58

LCD03B First issue 04 / 04

BLOCK DIAGRAM - SCHEMA SYNOPTIQUE - BLOCKSCHALTBILD - SCHEMA A BLOCCHI - ESQUEMA DE BLOQUES

15" ,20" System Block Diagram (EU version)

Inverter LCD Panel

12 pin Keypad/IR Interface

50 pin* 20" model only*

15" model only** Tuner Flash AT49BV8192A EEPROM 14 pin

Audio Processor TDA7440D

60 pin golden finger

14 pin Teltext SDA555XFL

SCART S-Video Composite Video L/R Audio Input

LCD03B First issue 10 / 03

BLOCK DIAGRAM - SCHEMA SYNOPTIQUE - BLOCKSCHALTBILD - SCHEMA A BLOCCHI - ESQUEMA DE BLOQUES

20"BiSonic System Bolck Diagram(EU version) Inverter

PFC/DC+DC/Audio Board LCD Panel

Keypad Board EarPhone Jack

12 pin Keypad/IR Interface

D-Sub Audio Input Audio Line Out

De-Interlace Chipset PW1230

Video Decoder VPC3230D

14 pin Teltext SDA555XFL

S-Video Composit e L/R Audio Video Input

LCD03B First issue 10 / 03

Disassembly process 15LCDM03B

Slider to extract The AV module

AV module : video and tuner boards

20 " LCD TV Boards overview

Earphone board Power board Control board

SERVICE MODE - MODE SERVICE - SERVICE-MODE - MODO SERVICIO

Sound Picture Preferences Installation

Service Mode Operation Manual

Manuale Procedura Service Mode

Anleitung Service Mode

Manual de operacin del Modo Servicio

Page1 on service mode

Tuner Set Factory Programs

Pw Gamma Scale Mode VPC AGC ON VPC AGC OFF

HV Lock Sensitivity Color Delay Audio Gain Pb Offset Pr Offset - NotEnabled... -

+ - 123 + - 123 + - 123 + - 123 + - 123 -

Enter PW1230 Adjustment Page...

Reset All Nvram Test Pattern H.position V.position

00034:10 EU20L03B 800 X 600 OC / 14 649 X 548 864 X 625 55 41.0 M

Page5 on service mode

LCD03B First issue 04 / 04

39 R1 3 4.7 C7 0.1U 25V K D1 TZMC 5V 1 D2 TZMC 11 D3 TZMC 5V 1

10K R8 1K R7 1K + C1 2 100U 16V + C1 3 100U 16V

J3 20L1033010 V5S 1 R3 10K 1N4148 + C1 4 100U 16V 1