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AV/Side AV +3.

3V
RGB PC
D129
ENKMC2838-T112
+5V_ST

A1
10K C
R145 R151 A2
+3.3V
1K 006:AR23
R105 JP114 SIDEAV_DET
10K P100
Need to pull up 3.3V D112
12507WS-08L
C118
AV_CVBS_DET 5.6V 100pF
R121
1K 006:AR23 IC102 R163 R167
C105 R172 C133
D100 AT24C02BN-10SU-1.8 4.7K 4.7K 0.1uF
100pF 1 10K 16V
5.6V 50V L105
A0 VCC
OPT BG2012B080TF 1 8
R180
JK100 2 006:C25 100
JP115 SIDEAV_CVBS_IN
A1
2 7
WP
PPJ231-01 VGA_EEPROM_WP 006:AR22
L100 R119 D113 A2 SCL
4 [RD]R_IN BG2012B080TF 10K 30V R136 C116 3 6
AV_R_IN 3 ISP_RXD 006:AB27
ZENER 75 100pF GND SDA

ZENER
4 5
[WH]L_IN R106 C107 R124 OPT ISP_TXD 006:AB27;006:AS31
5 D101 100pF
470K 12K
50V 4 C130 C131 R170
5.6V 22 R178
7 [YL]AV_DET 18pF 18pF
L101 R120 L104 22
BG2012B080TF BG2012B080TF R146 50V 50V
10K 006:R32
AV_L_IN 5
[YL]V_IN JP116 SIDEAV_L_IN D131
8 10K D130 ADMC5M03200L_AMODIODE
D114 C117

ZENER
D102 C108 R137 ADMC5M03200L_AMODIODE 5.6V
R107 R125 100pF R148 12K 5.6V
6 [YL]GND 100pF 6 50V OPT
470K 12K 5.6V 470K OPT
5.6V 50V
ZENER L103
BG2012B080TF R147
7 006:R33
AV_CVBS_IN JP117 SIDEAV_R_IN
10K 0 R157
D115 R138 006:C28DSUB_VSYNC
C109 C119 R149 12K
ZENER

D103 R108 006:C25 470K


75 47pF 8 5.6V 100pF
30V 1% 50V ZENER 50V 0 R158
9 006:C29DSUB_HSYNC C125 C129 D128
ADUC30S03010L_AMODIODE D122 68pF 68pF
50V

ZENER
30V 50V

ZENER
OPT OPT 30V
ADUC30S03010L_AMODIODE

006:C28 DSUB_B

ZENER
D125
R159 ADUC30S03010L_AMODIODE
75 C122
OPT 30V

COMPONENT1/2 006:C28 DSUB_G

ZENER
C123 D126 +5V_GENERAL
+3.3V +3.3V R160
75 OPT ADUC30S03010L_AMODIODE
30V
R102 R139
10K 006:AR22 10K 006:AR22
R114 R150
1K 1K
COMP1_DET COMP2_DET R182
10K
D104 D116
JK101 JK102
5.6V 5.6V DSUB_DET
PPJ-230-01 PPJ-230-01
R183
[RD]MONO [RD]MONO 1K
13 13 006:C28 DSUB_R

ZENER

OPT
0
D132

R181
006:R32 006:R31 C124 D127
R122 R152 R161 ADUC30S03010L_AMODIODE ADMC5M03200L_AMODIODE
[RD]R_IN 10K [RD]R_IN 10K OPT 5.6V
4 4 75 30V
COMP1_L_IN COMP2_L_IN
D105 C110 C120
R126

R154
5 [WH]L_IN R109 5 [WH]L_IN D117 R140
12K

12K
5.6V 1000pF 5.6V 1000pF
470K 470K
ZENER 50V ZENER 50V

ngDeveloped
6 [RD]R 6 [RD]R

GREEN_GND

DDC_CLOCK
DDC_DATA

SYNC_GND
BLUE_GND

DDC_GND
RED_GND
[BL]B [BL]B

H_SYNC

V_SYNC
7 7
006:R32 006:R31

GREEN
GND_2

GND_1
R123 R153

BLUE
B e iRED
10K 10K

NC
8 [GN]C_DET COMP1_R_IN 8 [GN]C_DET COMP2_R_IN

[GN]G D106 R110 C111 [GN]G D118 R141 C121


R127

R155
9 9
12K

12K
5.6V 470K 1000pF 5.6V 470K 1000pF

SHILED
ZENER

11

12

13

14

15
50V ZENER 50V
10 [GN]GND
BeingDeveloped 10 [GN]GND
BeingDeveloped
11 11

16
10
006:C30 006:C27

9
FIX-TER FIX-TER
COMP1_PR COMP2_PR

5
D107 R111 D119 R142
30V 75 30V 75
ZENER ZENER
JK105
006:C30 006:C27
SPG09-DB-010
COMP1_PB COMP2_PB

D108 R112 D120 R143


75 75
30V 30V
ZENER ZENER
PC AUDIO
006:C30 006:C27
JK103
COMP1_Y COMP2_Y
PEJ027-01
D109 R113 D121 R144
75 75 E_SPRING
30V 30V 3 B eingDeveloped
ZENER ZENER
6A T_TERMINAL1

7A B_TERMINAL1
PC_R_IN
D123 R168 R176 006:R31
4 R_SPRING C126
ADMC5M03200L_AMODIODE 10K R173 0
100pF R164 12K
5.6V 470K
OPT 50V
RS-232C +3.3V_ST 5 T_SPRING

L102
BLM18PG121SN1D 7B B_TERMINAL2
C100 0.33uF PC_L_IN
C106 D124 R169 R177 006:R31
T_TERMINAL2 C127 R165 0
0.1uF 6B ADMC5M03200L_AMODIODE
100pF 10K
5.6V 50V 470K
16V OPT R174
JK106
R103

R104
4.7K

4.7K

8 SHIELD_PLATE 12K
IC100 SPG09-DB-009
0 R115
MAX3232CDR DBG_RX

0 BeingDeveloped
C101 0.1uF C1+ VCC R116 1
1 16 DBG_TX
6
C102 RxD R135
0.1uF V+ GND 2
2 15 R117 220
100
OPT R134 7
C1- DOUT1 TxD 220
3 14 3
SPDIF OPTIC JACK +3.3V
C104 0.1uF C2+ RIN1 ADUC30S03010L ADUC30S03010L 8
4 13 50V D111
50V D110 C114 C115
220pF 220pF 4
30V 30V 47pF 47pF
R118 C112 C113
C2- ROUT1 50V 50V JK104
100 OPT OPT 9 +3.3V +5V_GENERAL
5 12
OPT JST1223-001
5 R156 IC101
V- DIN1 4.7K NL17SZ00DFT2G GND
6 11 10

1
R179

Fiber Optic
C103 0.1uF +5V_ST 0
R175 OPT
DOUT2 DIN2 3.3K A VCC 0 VCC
7 10 R133 1 5

2
SPDIF_OUT
+5V_ST male R171
C R166 1K
OPT

RIN2 ROUT2 R128 100K 006:V29 B C128 22 OPT VINPUT


3.3K 2
8 9 Serial Port

3
0 R130 R131 B Q101 0.1uF
50V 1/10W

4
2SC3052 C132
OPT 1% C134
GND Y OPT ZD100 100pF 0.1uF
C 100K E 3 4 FIX_POLE
R132 50V 50V
10K
BOPT Q100
IR 2SC3052
R129
R100 OPT
100 E
R162
0
R101 OPT
100

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SL80-UX 09.02.25
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IN/OUT 1 14
+5V_ST
+5V_ST
* HDMI CEC
5V_HDMI_3 002:Q15;002:AI18
5V_HDMI_4 R268
R243 R259 47K +1.8V_AMP +1.8V_HDMI +3.3V +3.3V_HDMI
0 002:AH19 +3.3V_ST
47K OPT
20 R239 OPT HPD4 L200 L201
0
68K CB3216PA501E BLM18PG121SN1D
HPD3

MMBD301LT1G
20
002:AD6 20
R282
OPT C218 C226
19 R203

D200
1K 19 R255 Q200 0.1uF 0.1uF
1K

9.1K
R284
SSM6N15FU

3.6K
18 OPT
18

OPT

3.6K
R200

OPT

R254
17
R206 0 17 0 002:R13;002:AH19 DRAIN1 SOURCE1 006:C36
R260 0
16 DDC_SDA_3 6 1
002:N13;002:AD6 DDC_SDA_4 CEC_REMOTE HDMI_CEC
16 R276
DDC_SCL_3 002:R13;002:AH19
15 R225 0 DDC_SCL_4 002:H26;002:H17;002:H7;002:R26 GATE2 GATE1
002:N13;002:AE6 15 5 2
R257 0

AVRL161A1R1NT
14 002:H17;002:H7;002:R26;002:W27 002:H26;002:H17;002:H7;002:W27
R226 0 14

VR208
CEC_REMOTE R261 0 SOURCE2 DRAIN2
13 CEC_REMOTE 4 3
002:AE6 13
CK-_HDMI3 002:AH19
12 CK-_HDMI4
12 C208
11 0.1uF
002:AE6
11 16V

R281
CK+_HDMI3 002:AG19
10 002:AE6 CK+_HDMI4
10

0
D0-_HDMI3 002:AG19 GND
9 D0-_HDMI4 GND
9
8 OPT
002:AF6
8 002:AG19
D0+_HDMI3
7 002:AF6 D0+_HDMI4
7
D1-_HDMI3 002:AF19
6 D1-_HDMI4
6
5
002:AF6 5
D1+_HDMI3 002:AF19
4 D1+_HDMI4 +3.3V_HDMI
002:AG6 4
D2-_HDMI3 002:AF19
3 D2-_HDMI4 R283
3
0
2 002:AG6
2 002:AF19
D2+_HDMI3
1 D2+_HDMI4
1

YKF45-7058V GND
KJA-ET-0-0032
JK202 JK203

UI_HW_PORT3 with screw GND SIDE_HDMI_PORT4

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
C205

C207

C209

C210

C211

C212
HDMI4
+5V_ST C221
002:Q19;002:AK15

D2-_HDMI4

D1-_HDMI4
5V_HDMI_2

D2+_HDMI4
HDMI_CLK+

CK+_HDMI4
HDMI_RX0+

HDMI_RX1+

D1+_HDMI4
HDMI_CLK-

HDMI_RX0-

HDMI_RX1-

CK-_HDMI4
D0-_HDMI4
HDMI_RX2+

D0+_HDMI4
HDMI_RX2-
0.1uF

DDC_SCL_4
+3.3V_HDMI

DDC_SDA_4
R242 C222

HDMI_SCL
HDMI_SDA

HPD4
47K
20 R240 OPT 5V_HDMI_1 5V_HDMI_2
0 002:AL11 0.1uF

0
C223
HPD2
20

R277
OPT R248 R270 0.1uF
19 R204 R279 C224
1K 2K
18 0.1uF
3.6K

5V_HDMI_4
OPT

R201

17 002:R17;002:AL12 R278
R212 0 R249 R252 R274 2K
R271
16 DDC_SDA_2 47K 47K 47K 47K
002:R17;002:AL12
15 0 DDC_SCL_2 C213
R213
DDC_SDA_1 DDC_SDA_2 0.1uF
14 16V
002:H26;002:H7;002:R26;002:W27 +1.8V_HDMI
R214 0 DDC_SCL_1 DDC_SCL_2
CEC_REMOTE
13
002:AL12
CK-_HDMI2
12
C220 C225
C217
11 0.1uF 0.1uF
002:AL12 0.1uF
16V 16V
16V

RXD_DDC_DAT
RXD_DDC_CLK
VDDH[3V3]_8

VDDH[3V3]_7
VDDC[1V8]_3
CK+_HDMI2
10

VDDO[1V8]
002:AL13
D0-_HDMI2

RXD_HPD
RXD_DC+
RXD_D2+

RXD_D1+

RXD_D0+
OUT_D0+

OUT_D1+

OUT_D2+

RXD_DC-
RXD_D2-

RXD_D1-

RXD_D0-
OUT_D0-

OUT_D1-

OUT_D2-
9

RXD_5V
VSS_12

VSS_11

VSS_10
5V_HDMI_3 5V_HDMI_4
8 5V_HDMI_3
002:AL13
D0+_HDMI2
7
002:AL13
HDMI1

100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
D1-_HDMI2 R250
6 R272 VSS_1 VDDH[1V8]_2
1 75
5V_HDMI_1 R292 C219
5 OUT_C+ 2 74 R12K
0.1uF
002:AL13 OUT_C- VSS_9 12K
D1+_HDMI2 3 73 16V
4 VDDO[3V3] RXC_D2+
002:AL14 4 72 D2+_HDMI3
D2-_HDMI2 OUT_DDC_CLK RXC_D2-
3 R251 R253 5 71 D2-_HDMI3
47K C203
47K R273 R275 OUT_DDC_DAT 6 70 VDDH[3V3]_6
0.1uF
2 47K 47K VSS_2 RXC_D1+
002:AL14 16V 7 69 D1+_HDMI3
D2+_HDMI2 VDDC[1V8]_1 RXC_D1-
1
DDC_SDA_3 DDC_SDA_4
RXA_HPD
8
9
IC200 68
67 VSS_8
D1-_HDMI3

DDC_SCL_4 HPD1
RXA_5V 10 66 RXC_D0+
DDC_SCL_3
YKF45-7058V RXA_DDC_DAT 11 TDA9996HL 65 RXC_D0-
D0+_HDMI3
D0-_HDMI3
JK201 DDC_SDA_1 RXA_DDC_CLK VDDH[3V3]_5
GND 12 64
DDC_SCL_1 RXA_C- RXC_C+
13 63 CK+_HDMI3
UI_HW_PORT2 EDID Pull-up CK-_HDMI1
CK+_HDMI1
RXA_C+ 14 62 RXC_C-
CK-_HDMI3
VDDH[3V3]_1 15 61 RXC_DDC_CLK
DDC_SCL_3
RXA_D0- 16 60 RXC_DDCC_DAT
D0-_HDMI1 DDC_SDA_3
RXA_D0+ 17 59 RXC_5V
D0+_HDMI1 VSS_3 RXC_HPD
18 58
R293 HPD3
RXA_D1- 19 57 CEC
D1-_HDMI1 RXA_D1+ VSS_7 0OPT
20 56
D1+_HDMI1 VDDH[3V3]_2 VDDS[3V3]
21 55
RXA_D2- CDEC_STBY HDMI3
22 54
002:L19;002:Z14 +5V_ST D2-_HDMI1
5V_HDMI_1 RXA_D2+ 23 53 INT/HP_CTRL R294 0
D2+_HDMI1 VDDH[1V8]_1 XTAL_OUT
24 52 OPT

0.1uF
C216
R246 NC 25 51 XTAL_IN
20 R241 47K
002:Y13 +5V_ST

26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
0 OPT R280
HPD1 For Only TDA9996 ES3
20

SCL/SEL0
0

VSS_4

VSS_5

VSS_6

VDDC[1V8]_2

SDA/SEL1
PD
VDDH[3V3]_3

VDDH[3V3]_4
TEST

VDDC[3V3]
RXB_C-

RXB_D0-

RXB_D1-

RXB_D2-
C201

0MODE
RXB_5V

RXB_C+

RXB_D0+

RXB_D1+

RXB_D2+
OPT

RXB_HPD

CDEC_DDC
0.1uF

RXB_DDC_CLK
RXB_DDC_DAT
19 R205
1K
18
3.6K

R285
OPT

R202

17 0
R223 0 002:N17;002:X13
+1.8V_HDMI R291
16 DDC_SDA_1
002:N17;002:X12
DDC_SCL_1 OPT
15 0

0
R224
C214 C215
14 002:H26;002:H17;002:R26;002:W27 C202 0.1uF 0.1uF
R230 C200 C204
0 16V 16V

R287
CEC_REMOTE 0.1uF 0.1uF 0.1uF
13

0
16V 16V 16V
002:Z12 5V_HDMI_2
CK-_HDMI1
12

R288
+3.3V_HDMI
11 002:Z12 C206
CK+_HDMI1 0.1uF
10
002:Z12 16V
D0-_HDMI1
9
R289
8 R286
002:Z11 OPT
7 D0+_HDMI1 R290

HPD2

DDC_SCL_2
002:Z11

D0-_HDMI2

D1-_HDMI2

D2-_HDMI2
DDC_SDA_2

CK-_HDMI2

D0+_HDMI2

D1+_HDMI2

D2+_HDMI2
CK+_HDMI2
D1-_HDMI1 OPT
6

5
002:Z11
D1+_HDMI1
4

TDA9996_SDA
TDA9996_SCL
002:Z10
D2-_HDMI1
3

2
002:Z10
D2+_HDMI1
HDMI2
1

YKF45-7058V
JK200 GND
HDMI S/W For MSTAR Platform
UI_HW_PORT1 VARISTORS(VR500/501/502/503/504/505/506/507) on lines-HPD1/2/3/4 are all options
in case HDMI Switch doesn’t support ’ESD protection’

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SL80-UX 09.02.25
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 2 14
HDMI
IC300
+3.3V AZ1117H-1.8TRE1(EH13A) +1.8V_AMP

INPUT 3 1 ADJ/GND

2
C300
22uF C301
OUTPUT
16V 0.1uF
GND
16V

C303 C305
0.1uF 22uF
16V 16V

+24V L300 +24V_AMP


MLB-201209-0120P-N2

SPK_L+ 003:AG10
+24V_AMP D300 C345
L304 0.01uF
1N4148W R315 50V
AD-8770
100V 5.6 C341 R320
R313 EAP60684501 R324
OPT 0.1uF 4.7K
3.3 C334 2S 2F 50V
1000pF 3.3
50V C339
0.47uF
50V
SPEAKER_L
C318 C327 R325
68uF C330 1S 1F
0.01uF C322 C324 C335
50V 0.1uF 0.1uF 35V 1000pF C342 3.3
0.01uF 15uH 0.1uF R321
50V 50V 50V D301 50V 50V C346
1N4148W R316 4.7K 0.01uF
100V 50V

MLB-201209-0120P-N2
C317 OPT 10K SPK_L- 003:AG10
+3.3V 22000pF
50V C321
22000pF
50V
L303

PGND1A_2
PGND1A_1

PVDD1A_2
PVDD1A_1
PVDD1B_2
PVDD1B_1

PGND1B_2
PGND1B_1
C323

OUT1A_2
OUT1A_1

OUT1B_2
OUT1B_1
1uF
R301 16V

VDR1B
BST1B
100
006:AB20 AMP_RST
C309

56
55
54
53
52
51
50
49
48
47
46
45
44
43
1000pF
50V R303
0 BST1A 42 NC C325
006:W26
AUDIO_MASTER_CLK C314 1 SPK_R+ 003:AG9
VDR1A VDR2A 16V1uF C328
2 41
1uF 10V RESET BST2A 22000pF
3 40 D302 L305
+1.8V_AMP 50V R317 C347
AD 4 39 PGND2A_2 1N4148W AD-8770
MLB-201209-0120P-N2

+1.8V_AMP 100V 5.6 0.01uF


DVSS_1 38 PGND2A_1 EAP60684501 C340 C343 R322
C311 5 OPT 0.47uF 50V
2S 2F 50V 0.1uF 4.7K R326
MLB-201209-0120P-N2

0.1uF VSS_IO 6 IC301 37 OUT2A_2 C336


CLK_I 7 36 OUT2A_1
1000pF
50V
50V 3.3 SPEAKER_R
L302
C310 VDD_IO 8 35 PVDD2A_2 1S 1F
R300

C307 1000pF R327


L301 50V DGND_PLL EAN60664001 PVDD2A_1 C337
9 34 0.01uF 3.3
100pF
0

R302 AGND_PLL PVDD2B_2 D303 50V 15uH C344 R323


50V 10 33
1N4148W 0.1uF 4.7K C348
3.3K LFM 11 NTP-3100L 32 PVDD2B_1 R318 0.01uF
100V 50V
AVDD_PLL OUT2B_2 OPT 5.6 50V
12 31 SPK_R- 003:AG9
DVDD_PLL 13 0x54 30 OUT2B_1
TEST0 14 29 PGND2B_2
C302 C304
10uF 0.1uF C306 C308 +24V_AMP

15
16
17
18
19
20
21
22
23
24
25
26
27
28
16V 50V 10uF 0.1uF
16V 16V R319
3.3

SCL
DVSS_2

BST2B
SDA
WCK
BCK

FAULT
DVDD

PGND2B_1
VDR2B
SDATA

MONITOR_0
MONITOR_1
MONITOR_2
+1.8V_AMP
C332 C333
C329 C331 68uF C338
Mstar Application 0.1uF 0.1uF 0.1uF 35V 0.01uF
50V 50V
50V 50V
C313 C320
10uF C316 1uF
0.1uF 10V C326
10V
50V
22000pF
50V
R304 100
006:W25 MS_LRCH OPT
R305 100 C319
006:W26 MS_LRCK 33pF
R306 100 50V OPT
006:W25 MS_SCK
R312
R307 100 POWER_DET
006:AI3;010:M24
SDA_SUB/AMP
R308 100 0
006:AI3;010:M24
SCL_SUB/AMP

C312 C315
33pF 33pF
50V 50V +3.3V_ST
WAFER-ANGLE

L306 5
120-ohm
R311 003:AJ22 SPK_L+
R310 10K 4
L307 SPK_L+
MCLK SDATA WCK BCK TP is necessory 0
C
R314 003:AJ20 SPK_L-
120-ohm
Q300 B 3
Monitor0_1_2 TP is necessory R309
33K OPT 2SC3052 10K
AMP_MUTE
L309
120-ohm
SPK_L-

E 006:D15 003:AJ18 SPK_R+


2
L308 SPK_R+
120-ohm
003:AJ15 SPK_R-
1
SPK_R-
P300

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SL80-UX 09.02.25
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AUDIO 3 14
UDIO
FROM LIPS & POWER B/D +5V_+12V Stand-by +3.3V
+5V_ST +3.3V_ST

CB3216PA501E
+5V_ST +5V_ST +5V_ST IC406

+3.3V_ST +5V
L421 AP1117E33G-13
L417
+5V_ST CB3216PA501E IN ADJ/GND
+3.3V_ST 3 1
R449

OPT
10K

0 R420
C475

0 R419
2
C450 10uF C478

OPT
C458 C462 C468 C469 OUT
R446 10uF 0.1uF 10uF 0.1uF 6.3V 0.1uF
10K 16V

R435
16V 10V 16V

10K
Q400 0.1uF
R450
R412 +3.3V_ST 560 Q408
+5V_ST Q406 SI4925BDY
0 +12V
3 1 2SC3052 C
2 2 0 u F = = > 1 0 0 u F * 2 + 2 2 u F f o r D e p tL405
h OPT R442 L418 +5V_GENERAL

CB3216PA501E
R423 POWER_ON_DELAY 0 0 CB3216PA501E
B OPT S1 1 8 D1_2
2 10K
C421 C445

L411
ToBeExtincted R421 R433 C 10uF
C404 C407 C412 P400 15pF R417 R425 +3.3V_ST +3.3V_AVDD_MPLL
22uF 100uF 100uF FM20020-24 50V 33K 20K 0 E G1 2 7 D1_1 C459 C463
C400 0 BOPT
16V 16V 16V 10uF 0.1uF
OPT 2SC3052 C455
22uF C OPT R424 R434 R437 10V 16V
16V R431 POWER_ON/OFF 10K Q404 S2 3 6 D2_2 22uF L423
10K RL_ON 16V
NC PWR ON Q402 B 0 006:AV31 C438 C439 E BLM18PG121SN1D
1 2

120K
R436

OPT
GND GND 2SC3052 4.7uF 4.7uF
3 4 OPT 006:AS32;006:AV31 G2 4 5 D2_1
C470
6.3V 6.3V 12V_TCON

120K
R428
GND GND E 0.1uF

OPT
+12V 5 6 OPT OPT R454 C442
5.2V 5.2V 47K 4.7uF 16V
7 8
5.2V 5.2V 25V
9 10
L402 GND 11 12 GND +12V
MLB-201209-0120P-N2 12V 12V
OPT 13 14
R455 L419
C401 GND 15 16 GND R447 47K C456 C460 C464
C405 C408 L407 22uF
22uF 47uF C413 24V +24V 22K 1uF 10uF
0.1uF 24V 17 18 25V
16V 25V 0.1uF 25V 10V
50V 50V NC INV ON C
19 20 ToBeExtincted R440
OPT A.DIM C424 C425 C427 C430
21 22 Err OUT 68uF 68uF 10K B Q407
0.1uF 1uF
NC PWM_DIM 50V 35V 35V 35V 2SC3052
23 24 OPT
L403
BG2012B080TF E
R451
25 22K
A_DIM R401 C
006:AF11 4.7K C409 +5V_GENERAL +3.3V_ST R441
C414
1uF 16V 10K B Q405
25V 0.1uF R418 2SC3052
OPT 3.3K R426 PANEL_CTL
10K 006:AS31 E

OPC_OUT2 100 C
008:AK17 C415 R414 R422
0.1uF Q401 B 10K R430 0
50V 2SC3052

R415
6.8K
OPT
OPT C OPT
006:AS32
R429
E INV_CTL
Q403 B 10K
2SC3875S(ALY)
E OPT R432
+3.3V +5V_EXT 006:AR30;004:X20;004:AL8;005:AG7

CB3216PA501E
10K 006:AR30;004:AL8;004:AN20;005:AG7 +12V
OPT OPT
R473

CB3216PA501E
POWER_EN 100
POWER_EN
+5V

L420
R453
OPT
OPT 006:AB20 +3.3V_FE

100
L409
PWM_DIM R402 ERROR_OUT R468 R474
OPT OPT 10K 2K
006:AF11;008:AK16 0 R427
L404 4.7K R445 L414
OPC_OUT1 C416 C426 10K +3.3V BLM18PG121SN1D
C410 BG2012B080TF 16V R416
0 0.1uF C453

BLM18PG121SN1D
1uF 0.1uF 16V
008:AK16 0 50V OPT 1uF 0.1uF
OPT OPT OPT 82K 10V 16V
R403
R457 C443

L413
Vout=0.8*(1+R1/R2) GND OPT
C482 Close to IC
+3.3V_MEMC
IC402 R466 IC405
+1.26 Core for Saturn5 R438 C l o s e t o IMP2212DN
C
560pF
50V
68K R1
1% MP2212DN
C481 56K R1 +5V_GENERAL
390pF 1/10W +5V_EXT
1% L415 OPT
50V
FB EN/SYNC BLM18PG121SN1D FB EN/SYNC R472
1 8 1 8
R467
+5V_GENERAL +1.26V_VDDC R439 R452 L412 13K 10K L424
+3.3V 18K 100K C l o s e t o I C1%
R2 3.6uH R2 3.6uH
1/10W GND SW_2 5% GND SW_2
2 7 Placed on SMD-TOP 2 7
1%
NR8040T3R6N NR8040T3R6N
CB3216PA501E R413 MAX 3A IN
3 6
SW_1
C449 C451 C454
0.1uF Placed on SMD-TOP
IN
3 6
SW_1 C476 C477 C479
L401 1/10W C447 0.1uF 22uF 16V
22uF 0.1uF 0.1uF
OPT 10K 16V 16V 16V 16V
D401 10uF D403 OPT
R410 OPT BS VCC C441 OPT BS VCC C473 3225
4 5 6.3V C461 4 5
C423 OPT C432 C434 0.1uF C465 0.1uF
10K 100V 22uF 100V PI Result
Close to IC 0.1uF 50V 22uF 50V
Vout=0.8*(1+R1/R2)
1/10W
R411
22uF 22uF 1N4148W_DIODES 16V
16V 1N4148W_DIODES
16V
16V OPT
OPT IC401 24K 1%
R404 1/8W
C480 MP2212DN Placed on SMD-TOP R443 R469
22K
560pF R1 $0.07 +5V_GENERAL
1/10W 10 10
50V 1% C l o s e t o I C FB 4.9A 0.0150OHM 34MHZ
EN/SYNC 3A, DCR=0.025 ohm R444 R470
1 8
R405 10 C440 10
75K L406 L408
1/10W
GND GND GND GND
1uF 1/10W
1/8W R2 GND SW_2 3.6uH BLM18PG121SN1D GND 1% 1%
C471
2 7 10V 1uF
1%
NR8040T3R6N 10V
IN SW_1 C OUT
Placed on SMD-TOP
3 6 GND
C428 C429 C431
22uF 22uF 0.1uF
OPT D400 OPT
C411 C417 BS VCC 16V 16V
22uF 4 5 C422
22uF
100V 0.1uF
1N4148W_DIODES 50V Placed on SMD-TOP
C IN

R408

10

R409
+1.26 Core for URSA +1.8V_MEMC for URSA DDR
10
1/10W C420
1%
1uF
16V
+5V_GENERAL +1.26V_MEMC
Vout=0.8*(1+R1/R2) 415 mA @85% efficiency
R2
+5V_EXT
IC403

CB3216PA501E
APE8953MP 1% 1% R1
1/10W 1/10W
30K 27K 450 mA

L416
R456 R458 R459
EN GND 33K
8 1
OPT
+1.8V for Saturn5 DDR C436 POK FB
1/10W
1% R464
R471
100 POWER_EN
C437 7 2
+1.8V_MEMC 1uF
16V OPT 10K
1/10W
VCNTL VOUT_1
BLM18PG121SN1D 6 3

+3.3V L410
Close to IC
VIN VOUT_2 25V Vout=0.8*(1+R1/R2) R465
+1.8V_DDR 5 4
0.01uF
IC400 C444 IC404
0
R460
SC4215ISTRT C433 C435 C483 390K
MP2212DN 400 mA + 600 mA
Close to IC
10uF 10uF 100pF 1/8W R1
L400 6.3V 6.3V 50V 1%
$0.07 +1.8V_MEMC
NC_1 GND R407 FB EN/SYNC
1 8 Placed on SMD-TOP 1 8 4.9A 0.0150OHM 34MHZ
12K R461
1% 300K L422
R400 R448 3.6uH
3.3K EN ADJ 1K 1/8W R2 GND SW_2 About 1.84V
2 7 1% 2 7
$0.24
C446 C448 NR8040T3R6N
VIN VO 10uF 10uF IN SW_1 C OUT C474
3 6 3 6
6.3V 6.3V 22uF
C472
Placed on SMD-TOP 16V
C402 C403 C418 D402 OPT C467 22uF
NC_2 NC_3 R406 C419 BS VCC
10uF 0.1uF OPT 4 5 22uF 4 5 0.1uF 16V
C406 9.1K 0.1uF C452 OPT
10V 16V 16V R1/R2 = 12K/20K => Vout=1.28 C457
0.47uF 1% 16V 22uF 100V 50V
22uF
16V C IN 1N4148W_DIODES

Placed on SMD-TOP
R1/R2 : 27K / 20K => Vout=1.88 R462
R1/R2 : 15K / 12K => Vout=1.80 Placed on SMD-TOP
10
R1/R2 : 12K / 9.1K => Vout=1.85
R463
C466
10
1uF
1/10W
16V
1%

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SL80-UX 09.02.25
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 4 14
+5V_TU

R511
0

C522
C504 C506 C508 C514 C517 220uF
0.01uF 0.1uF 0.1uF 10uF 220uF 16V
25V 50V 50V 10V 16V

Tuner-Sanyo Tuner-LGIT

TU500-*1
UCA36AL +3.3V_AVDD_PVSB

TDVW-H103F
TU500 NC_1 1N4148W
NC_1 1 R544 D500
1 47K
NC_2 +5V_TU C546 C548
NC_2 2 OPT
2 27pF 27pF
X500
GND_1 GND_1 50V 50V
3 C552 VSB_RESET
3 1uF R545
+5V[MAIN] +B1 25MHz 10V
4 4
NC_3[RF_AGC] RF_AGC R539 1M
5 5 Close to tuner
R524-*1 +3.3V_AVDD_PVSB
NC_4[VT] NC[VT] 0
6 6 IF_Short
R512 R516

0
GND_2 GND_2 +1.2V_DVDD_PVSB

OPT
7 4.7K 4.7K +3.3V_DVDD_PVSB
7 R524

R542
DATA R505 22 R517 0 (I2C Channel 6) 220nHI F _ L C _ F i l t e r
SDA 8 L510

I F _ L C _ F i l t eIrF _ L C _ F i l t e r
8 FE_TUNER_SDA CB3216PA501E
CLOCK R506 22 R518 0

VCCAAD10A
SCL 9

VSSDAD10
9 FE_TUNER_SCL

C527
36pF
OPT

VDD33_3
VSS33_3
50V
AS R500 0 C510 OPT C523
AS C507 C544

XTALO
10 C520

VDD_3

XTALI
VSS_3
10 100pF 27pF

NRST
NC_2
100pF 27pF 0.1uF

OPM
NC_3 OPT 50V 50V 50V IF_N

XM
NC_5 11 50V 50V

48
47
46
45
44
43
42
41
40
39
38
37
11
R534
D_IF1 DIF[+] L506
12 C529

XM

VSS33
VSS

XTALI
VDD

OPM
NRST
VDD33
270nH

VSSAD10

XTALO

SLIM_SCAN
VCCAAD10A
12 47pF 5.1K

C528
36pF
DIF[-]

50V
NC_1 PLLAVSS
36

OPT
D_IF2 13 1
13 VROA PLLAVSS
100 R527 0 . 0 1 u F C541 VINA2
2 PLLAVDD
35
IF_AGC
14
IF_AGC 14 IF_AGC IF_P IF_P
100 R528 0 . 0 1 u F C542 VINA1
3
VINA2 PLLAVDD
VSS33_2
34
IF_N VINA1 VSS33
+5V[VIF] +B2 INCAP
4 VSS_2
33
15
15 R523
220nHI F _ L C _ F i l t e r VSSAAD10A5
INCAP
IC502 VSS
VDD_2
32
SIF SIF VSSAAD10A VDD
16 0 . 1 u F C538 R530 100 I2CSEL VSS_1
16
6.8uH
6
I2CSEL LGDT3305 VSS
31
NC_6[AFT] NC_4 +5V_TU R531 0 ANTCON7 SCL
30 22 R547
17 17 ANTCON SCL
OPT VDD_18 VDD33_2
29 FE_DEMOD_SCL
NC_7 AUDIO C516 L502 CM2012F6R8KT R523-*1 VDD VDD33
18 18 0.1uF 0 R532 OPT
I2CRPT_SCL9 SDA
28 22 R548
IF_Short FE_TUNER_SCL I2CRPT_SCL SDA
VIDEO VIDEO 50V R507 I2CRPT_SDA10 NIRQ
27 FE_DEMOD_SDA
19 19 R513 R533OPT I2CRPT_SDA NIRQ C553 C554
12K FE_TUNER_SDA 1K IFOUT
11 TPSOP
26
470 IF OUT TPSOP OPT OPT
IF_AGC
R526 RFOUT12 TPCLK
25
20 R509 R519

TPDATA[0]

TPDATA[1]

TPDATA[2]
TPDATA[3]

TPDATA[4]
TPDATA[5]

TPDATA[6]

TPDATA[7]
20 1K R529 RF OUT TPCLK
OPT

TPVALID
0 R546 OPT

VSS33
TPERR

VDD33
FE_SIF
006:V30 C533
SHIELD C536
SHIELD C513 0.1uF 0.1uF

13
14
15
16
17
18
19
20
21
22
23
24
MStar Application

VSS33_1
0.01uF E

TPDATA[0]

TPDATA[1]
TPDATA[2]
TPDATA[3]
TPDATA[4]
TPDATA[5]
TPDATA[6]
TPDATA[7]
VDD33_1
TPERR

TPVALID
50V +3.3V_DVDD_PVSB
AR500
ISA1530AC1 100
B Q501 JTAG 1/16W
R508 PV
10K C TS_VALID JP502 470
R504 R535 TS_SYNC
2.2K TS_SYNC JP501 LD500 TS_CLK
GND
OPT

PV
TS_VALID
TS_CLK JP500

+5V_TU

TS_DATA[0-7] 100
AR501
TS_DATA[0]

50V
0.1uF
TS_DATA[1]

C525
TS_DATA[2]
270
R514

OPT TS_DATA[3]

TS_DATA[0-7]
R501 R510 R520
0 0 0 AR502 100
006:C23 FE_VMAIN TS_DATA[4]
TS_DATA[5]
CM3216F100KE

TS_DATA[6]
270
R515

L503

TS_DATA[7]
10uH

E Option for FM Rejection


The value of coil & cap’ could be changed to optimized each
ISA1530AC1
B Q500 C526
82pF
C
50V
R503
C512
10K 0.047uF
OPT 50V
VCOMO
OPT

006:C23

MStar Application

MLB-201209-0120P-N2
VSB +3.3V B+ BLOCK
+5V_EXT

L509
+3.3V_PVSB +3.3V_AVDD_PVSB +3.3V_PVSB +3.3V_DVDD_PVSB
+3.3V_PVSB +3.3V_FE
IC504
SC156515M-1.8TR

L511
CB3216PA501E
L508

OPT

500
L507 500

VIN VO
C531 2 4
C530 C532 C535 C540 C543

4.7K
10uF 0.1uF 10uF R551

R540
0.1uF 0.1uF 0.1uF
16V 50V 16V R543
50V 50V 50V VSB_CTRL 1K EN ADJ 15K
3216 3216 1 5
R552
3 8.2K
GND2

C550 C551 C555 C558


100uF 0.1uF GND
IC501 100uF 0.1uF
16V 50V 16V 50V
KIA78R05F

1 2 3 4 5
VIN

VC

NC

GND1
VOUT

006:AR30;004:X20;004:AL8;004:AN20
+12V POWER_EN
+5V_TU
IC503
VSB +1.0V B+ BLOCK
SC4215ISTRT
IC500

OPT
AS7809DTRE1 +1.2V_PVSB +1.2V_DVDD_PVSB R541 +1.2V_PVSB
L500 100 NC_1 GND
BG2012B800 R502 1 8

R549
INPUT OUTPUT 100

20K
1 3
R525 R538 R2
OPT OPT 20K EN ADJ
C501 2 0 2 7
C500 C505 C511 C519 C521 C524
GND C502 C503

R550
0.1uF 100uF 0.1uF 0.33uF 0.1uF 47uF 0.1uF 0.01uF C549

10K
16V 16V 100uF 16V 1/4W
R1
16V 16V 16V 25V 1uF
16V 5% C534 C537 C539 VIN VO
10uF 0.1uF 0.1uF 16V 3 6
16V 50V 50V V0 = 0.8(R1+R2) / R2
NC_2 NC_3 C556 C557
3216 4 5 100uF 0.1uF
16V 50V
C545 C547
2.2uF 2.2uF
16V 16V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SL80-UX 09.02.25
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER 5 14
UNER
+3.3V
+3.3V_VDDP
+1.26V_VDDC L603
BLM18PG121SN1D

C700 C702 C704 C706 C708 C711 C717 C721 C727 C735
C660 C663 C665 C667 C669 C670 C671 C672 C673 C676 C677 C678 C679 C680 C681 C682 C683 C684 C686 C688 C689 C690 C691 C692 C693 C694 C695 C696 C697 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
330uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF
4V
IC600
LGE3369A (Saturn6 Non RM)

+1.8V_DDR
HDMI

002:AA19 F1 RXACKP AE16 008:S27


HDMI_CLK+ LVA0P MEMC_RXE0+
002:AA19 F2 RXACKN AD16 008:S27
HDMI_CLK- LVA0M MEMC_RXE0-
002:AB19 G2 RXA0P AD15 008:R27
HDMI_RX0+ LVA1P MEMC_RXE1+ C736
002:AB19 G3 AF16 C701 C703 C705 C707 C709 C712 C718 C722 C728 C734 C742 C743
HDMI_RX0- RXA0N 008:S27 MEMC_RXE1- 0.1uF
LVA1M 330uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF
002:AC19 H3 RXA1P AF15 008:R27
HDMI_RX1+ LVA2P MEMC_RXE2+ 4V
G1 AE15 S5/S6_Reset 006:W15
HDMI_RX1- 002:AC19 RXA1N 008:R27 MEMC_RXE2-
002:AC19 H1 RXA2P
LVA2M
AD13 008:Q27
IC600 X600
HDMI_RX2+ MEMC_RXE3+ 12MHz C698
002:AC19 H2 RXA2N
LVA3P
AF14 008:Q27
LGE3369A (Saturn6 Non RM)
HDMI_RX2- LVA3M MEMC_RXE3-
002:AA19 R613 0 A1 DDCD_A_DA AF13 008:Q27
HDMI_SDA LVA4P MEMC_RXE4+ R782 20pF
002:AA19 R614 0 B2 DDCD_A_CK AE13 008:Q27 1M
HDMI_SCL LVA4M MEMC_RXE4- D4 HWRESET B3
R615 100 A2 HOTPLUG_A XIN C699
A3 R749 0
002:AD27 R616 100 AE14 008:R27 XOUT
HDMI_CEC LVACKP MEMC_RXEC+ AC16
C3 AD14 PCMD0/CI_D0 20pF
RXBCKP 008:R27 MEMC_RXEC- AA15 E6 R750 0
LVACKM
B1 RXBCKN PCMD1/CI_D1 TESTPIN/GND
AA16
C1 RXB0P AE20 008:V27 PCMD2/CI_D2
LVB0P MEMC_RXO0+ AC6
C2 RXB0N AD20 008:V27 PCMD3/CI_D3
LVB0M MEMC_RXO0- Y10 AE11 R746 33 006:I10 SPI_DI
D2 RXB1P AD19 008:U27 PCMD4/CI_D4 SPI_DI
LVB1P MEMC_RXO1+ Y11 AF12 006:E11 SPI_DO
D3 AF20 PCM_A[0-7] PCMD5/CI_D5 SPI_DO
RXB1N 008:U27 MEMC_RXO1- Y12 AE12
LVB1M R747 33 006:E11 SPI_CS
E3 RXB2P AF19 008:U27 PCMD6/CI_D6 /SPI_CS
LVB2P MEMC_RXO2+ Y13 AD11 R748 33 006:I10 SPI_CK
D1 RXB2N AE19 008:U27 PCMD7/CI_D7 SPI_CK
LVB2M MEMC_RXO2-
E1 DDCD_B_DA AD17 008:T27 PCM_A[0]
LVB3P MEMC_RXO3+ AB16
F3 DDCD_B_CK AF18 008:T27 PCM_A[1] PCM_A0/CI_A0
LVB3M MEMC_RXO3- AC15
E2 HOTPLUG_B AF17 008:T27 PCM_A[2] PCM_A1/CI_A1
LVB4P MEMC_RXO4+ AC14
AE17 008:T27 PCM_A[3] PCM_A2/CI_A2
LVB4M MEMC_RXO4- AB14
AE8 RXCCKP PCM_A[4] PCM_A3/CI_A3
AC12 B5 R752 OPT 0
AD8 RXCCKN AE18 008:T27 PCM_A[5] PCM_A4/CI_A4 USB_DP_1
LVBCKP MEMC_RXOC+ AB8 A5 R753 OPT 0
AD9 RXC0P AD18 008:U27 PCM_A[6] PCM_A5/CI_A5 USB_DM_1 USB
LVBCKM MEMC_RXOC- AC13 AC10
AF8 RXC0N PCM_A[7] PCM_A6/CI_A6 USB_DM_2 USB_DM 010:AF24
AA9 AB10
AF9 RXC1P PCM_A7/CI_A7 USB_DP_2 USB_DP 010:AF24
AB5
AE9 RXC1N PCM_A8/CI_A8 PM GPIO assigned followed by CoP
AA4
AE10 RXC2P AA3 C630 2.2uF 001:X24 PCM_A9/CI_A9
AUR0 SIDEAV_R_IN V4
AD10 Y1 C631 2.2uF PCM_A10/CI_A10 R787 100
RXC2N 001:X25 SIDEAV_L_IN Y4 RL_ON
AUL0 +3.3V_ST
AE7 DDCD_C_DA AE1 C632 2.2uF 001:K16 COMP1_R_IN AB9
PCM_A11/CI_A11
R788 100 R789 OPT 100 SB_MUTE
AUR1
AF7 DDCD_C_CK AF3 C633 2.2uF 001:K18 PCM_A12/CI_A12 LED_MOVING/LED_R
AUL1 COMP1_L_IN AA7 OPT

R783
R790OPT 100

10K
AD7 HOTPLUG_C AE3 C634 2.2uF 001:K26 PCM_A13/CI_A13
AUR2 AV_R_IN AD6 POWER_DET
J 3 CEC AUL2 AE2 C635 2.2uF 001:K25 PCM_A14/CI_A14 R791
AV_L_IN INV_CTL 100 DBG_TX
AA1 C636 2.2uF 001:X16
AUR3 COMP2_R_IN AA14 E5 PANEL_CTL
AB1 C637 2.2uF 001:X18 PCM_RST/CI_RST GPIO_PM0/GPIO134
AUL3 COMP2_L_IN AB18 F5 R792 100
AB2 C638 2.2uF 001:AL10 PCM_CD/CI_CD GPIO_PM1/GPIO135 POWER_ON/OFF
AUR4 PC_R_IN Y5 G5 R774 100
COMPONENT1

N2 AC2 DBG_RX
HSYNC0/SC1_ID C639 2.2uF 001:AL9 /PCM_OE GPIO_PM2/GPIO136 OPT R793 100
AUL4 PC_L_IN AB15 H5 R775 100 R786 100 RL_ON
N1 VSYNC0/SC1_FB AB3 C640 2.2uF PCM_REG/CI_CLK GPIO_PM3/GPIO137 ISP_TXD
AUR5 AA10 F6 R785 100 OPT

R784
OPT

100
001:K15 R624 47 C603 0.047uF P2 RIN0P/SC1_R AC3 C641 2.2uF PCM_WAIT/CI_WACK GPIO_PM4/GPIO138 POWER_DET
COMP1_PR AUL5 AC8 G6
001:K12 R625 47 C604 0.047uF R3 GIN0P/SC1_G /PCM_IRQA GPIO_PM5/INT1/GPIO139 Interrupt for ISP Wake up in STB Mode
COMP1_Y AC7 H6
001:K13 R626 47 C605 0.047uF R1 BIN0P/SC1_B /PCM_WE GPIO_PM6/INT2/GPIO140
COMP1_PB AA5 AC17 R754 100 POWER_EN
R627 470 C606 1000pF P3 SOGIN0/SC1_CVBS PCM_IOWR/CI_WR GPIO131/LDE/SPI_WPn1
W4 AB17 R755 100 008:M20;008:AK16
LVDS_SEL
R628 47 C607 0.047uF P1 RINM W3 C642 0.1uF R672 47 005:O21 AR603 PCM_IOR/CI_RD GPIO130/LCK
SIF0P FE_SIF T4 AF11 R756 100 006:C11 Flash_WP_1
R629 47 C608 0.047uF T3 BINM W2 C643 0.1uF R673 47
006:S8
/PCM_CE GPIO132/LHSYNC/SPI_WPn POWER DETECT
SIF0M /PF_CE0 AE6 AA18 R757 0 006:AO3 SDA1
R630 47 C609 0.047uF R2 GINM /PF_CE0 GPIO60/PCM2_RESET/RX1
/PF_CE1 006:T6 AF6 AA17 R758 0 006:AO3 SCL1
/PF_CE1 GPIO62/PCM2_CD_N/TX1
R607 C600 R610 C602 /PF_OE 006:S9 AR602 AA12
10K 68pF 10K 68pF F11 OPT R655 22 /PF_OE +24V +12V
SPDIF_IN 006:T6 22 AA11
001:AC23 R644 22 K3 E9 001:AC5 /PF_WE
HSYNC1/DSUB_HSYNC R656 100 /PF_WE +3.3V_ST
DSUB_HSYNC SPDIF_OUT SPDIF_OUT PF_ALE 006:T6 AC9
001:AC23 K2 PF_ALE I2C for Tuner_5V
DSUB

R645 22 VSYNC1/DSUB_VSYNC
DSUB_VSYNC PF_WP 006:Q5 Y14
001:AC18 R631 47 C615 0.047uF L1 RIN1P/DSUB_R PF_AD15 +5V_ST
DSUB_R /F_RB 006:S9 22 AB11 E7 R776 0 0 0 6 : A I 5 ; 0 0 5 : O 2 4 ; 0 0 5 :FE_TUNER_SCL
Y21
R632 C610 0.047uF L3 GIN1P/DSUB_G F_RBZ LHSYNC2/I2S_OUT_MUTE/RX1 R6002 R6013 R6003
DSUB_G 001:AC20 47 AC18 22OPC(V4) R6011
R777 30K OPT OPT
001:AC22 R633 47 C616 0.047uF K1 BIN1P/DSUB_B LVSYNC/GPIO133 OPC_EN +12V 10K
DSUB_B R701 0 F8 C6 R778 0 0 0 6 : A I 6 ; 0 0 5 : O 2 4 ; 0 0 5 :FE_TUNER_SDA
Y21 1/10W
470 1000pF L2 SOGIN1 AF1 100 EEPROM_SCL 006:H5;006:O16;006:AO4 R6004
R634 C611 R661 OPT UART2_TX/SCKM GPIO79/LVSYNC2/TX1 1%
AUOUTR0/HP_ROUT EEPROM_SDA 006:H5;006:O15;006:AO4 R702 0 D11 F9 R6007 POWER_DET
AF2 R662 OPT 100 UART2_RX/SDAM UART2_RX/GPIO84 10K
AUOUTL0/HP_LOUT 006:AO5 R703 0 AB21 F10 010:AH18 22
COMPONENT2

AD3 R663 OPT 100 SDA0 DDCR_DA UART2_TX/GPIO85 USB_OCD C


AUOUTR1/SC1_ROUT 006:AO5 R704 0 AC21 A6
001:X15 R635 47 C617 0.047uF V1 AD1 R664 OPT 100 SCL0 DDCR_CK UART1_RX/GPIO86 R6010 R6006
COMP2_PR RIN2P/COMP_PR+ AUOUTL1/SC1_LOUT B6 B Q604
001:X12 R636 47 C618 0.047uF V2 GIN2P/COMP_Y+ AC1 R665 OPT 100 UART1_TX/GPIO87 12K 2SC3052 R6012
COMP2_Y AUOUTR2/SC2_ROUT I S P D e b u g p o r t f o r S 5 ISP_RXD 001:AL26 R705 22 J1 AF5 C 1K
001:X13 R637 47 C619 0.047uF U1 BIN2P/COMP_PB+ AD2 R666 OPT 100 DDCA_CLK GPIO42/PCM2_CE_N 1%
COMP2_PB AUOUTL2/SC2_LOUT 22 J2 AF10 TS_DATA[0-7] R6008 E

0.01uF

0.01uF
OPT 006:AS31;001:AL25 R706 B Q605 OPT

0.01uF

0.01uF

0.01uF

0.01uF
R638 470 C612 1000pF V3 OPT OPT OPT OPT OPT ISP_TXD DDCA_DA GPIO43/PCM2_IRQA_N R6005

R669

R674
SOGIN2 R707 22 W5 005:AD18

C650

C653

R676

R678

R685
22K

22K
2SC3052 2.2K

C656

C658

C661

C666

R688
22K

22K

22K
J 5 VSYNC2 DBG_RX UART_RX2 1K

22K
R708 22 V5 AA8 TS_DATA[0] IC605

OPT

OPT
DBG_TX E

OPT

OPT

OPT
UART_TX2 TS0_D0 R6009 NCP803SN293

OPT
Y8 TS_DATA[1]
A8 R657 22 003:K18 TS0_D1 1.1K
I2S_OUT_MCK AUDIO_MASTER_CLK Y9 TS_DATA[2]
B7 R658 22 003:K12 TS0_D2 RESET 2 3 VCC
R617 47 C613 0.047uF U3 CVBS1/SC1_CVBS I2S_OUT_WS MS_LRCK AB7 TS_DATA[3]
CVBS

C7 R659 22 003:K12 TS0_D3


001:X26 R618 47 C614 0.047uF U2 CVBS2/SC2_CVBS I2S_OUT_BCK MS_SCK AA6 TS_DATA[4] 1 C6001
SIDEAV_CVBS_IN D8 R660 22 003:K13 TS0_D4 R6001
R639 47 C620 0.047uF T1 CVBS3/SIDE_CVBS I2S_OUT_SD MS_LRCH AB6 TS_DATA[5] R6014 GND 0.1uF
AV_CVBS_IN 001:K24 C8 5.1K
TS0_D5 OPT 16V
R640 47 C621 0.047uF T2 VCOM1 I2S_IN_SD C654 C655 C657 C659 U4 TS_DATA[6] 1/10W
22pF 22pF 22pF 22pF TS0_D6 OPT
AC5 TS_DATA[7] 5%
OPT OPT OPT OPT TS0_D7
AC4 005:AC19;005:AK20TS_SYNC
R619 OPT 47 C622 0.047uF M1 +3.3V TS0_SYNC
CVBS4/S-VIDEO_Y C652 AD5
OPT

005:AC20;005:AK19
TS_VALID
R620 OPT 47 C623 0.047uF M2 CVBS6/S-VIDEO_C K4 C629 0.1uF TS0_VLD
0.1uF AB4
OPT

VCLAMP 005:AC19;005:AK19TS_CLK
H4 C649 TS0_CLK
REFP
R641 47 C624 0.047uF N3 CVBS5 J4
REFM 0.1uF AB19
R642 47 C625 0.047uF M3 CVBS7 G4 R654 390 TS1_D0
REXT C651 AA20
1% 0.1uF TS1_SYNC
PWM0 006:N10;006:AK11 AB13 AC19
005:O17 R643 100 C626 0.047uF W1 CVBS0/RF_CVBS PWM0 TS1_VLD
TV/MNT

FE_VMAIN PWM1 006:N10;006:AK11 AB12 AA19


005:J15 R621 100 C627 0.047uF Y3 VCOM0 AE5 C644 0.1uF PWM1 TS1_CLK
VCOMO AUCOM PWM2 006:AK11 AD12
0 AE4 PWM2
AUVRM PWM3 006:AK10 AA13 C10 001:K27
R606 R622 100 Y2 CVBSOUT0/SC2_MNTOUT AF4 C645 10uF 10V PWM3 ET_TXD0 AV_CVBS_DET
AUVRP Stand-by GPIO(SAR[0-3]) B11 R764 100 001:X28
AA2 CVBSOUT1 AD4 C646 0.1uF ET_TXD1 SIDEAV_DET
AUVAG 010:T23 A4 A9 R771 100 001:X19
C647 1uF KEY1 SAR0 ET_TX_CLK COMP2_DET
------------------------------ B4 C11
+3.3V_ST 010:T23 R751 100 001:K19
C648 4.7uF HIGH LOW KEY2 SAR1 ET_RXD0 COMP1_DET
D6 LCD PDP R700 0 F4 C9 R765 100 001:AN19
LED_MOVING/LED_R SAR2 ET_RXD1 DSUB_DET
D7 FRC Non-FRC 006:AS32;010:S17 R698 E4 B10 R772 100 001:AL26
SB_MUTE SAR3 VGA_EEPROM_WP
E11 Movin’LED Blinkin’LED 0 ET_TX_EN
R699 0 C4 A10 R773 100 005:AG10
T-Project(&& GPIO96 High) IR IRIN ET_MDC VSB_CTRL
B9 FullHD WXGA B9 R766 100 005:AJ26
001:L3;010:K20 ET_MDIO VSB_RESET
------------------------------ A11 R781 OPT 100
ET_COL
R709 0 AC11
GPIO44

OPT
R690 10K

R69210K

R69510K

R69610K
010:S17 R710 100 D9
Close to IC LED_B GPIO96 IC600 +1.26V_VDDC VDDC : 970mA
AMP_RST 003:K18 R711 100 D10
as close as possible GPIO88 LGE3369A (Saturn6 Non RM)
008:AF4 R712 100 D7
MEMC_RESET GPIO90/I2S_OUT_MUTE
R716 100 E11
GPIO91
ERROR_OUT 004:O19 R713 100 E8
GPIO97 E16 VDDC_1 D16
NTP_MUTE 006:H15 R717 100 E10 GND_2
GPIO98 E17 VDDC_2 D17
D6 D7 E11 B9 R718 100 D6 GND_3
GPIO99 E18 VDDC_3 D18

OPT 3.3K

OPT 3.3K

3.3K

OPT 3.3K
008:AK22 R714 100 OPT D5 GND_4

R691
BIT_SEL

R693

R694

R697
GPIO103/I2S_OUT_SD3 F7 VDDC_4 D19
R715 22 OPT C5 GND_5
GPIO102 L9 VDDC_5 D20
GND_6
L10 H18
Audio Mute HDCP EEPROM S5 Reset GND_7
VDDC_6
L11 VDDC_7 H19
GND_8
VDDC_8 H20
VDDC_9 J20
POWER_ON_DELAY
L12 VDDC_10 K20
GND_9
C L13 VDDC_11 L20
+5V R679 GND_10
B Q603 L14 VDDC_12 M20
GND_11
+5V_ST +3.3V_ST 2SC3052 L15 VDDC_13 P7
4.7K GND_12
L16 VDDC_14 R7
E GND_13
IC603 L17 GND_14 VDDC_15 T7
IC602
R667 R670
MAX810RTR L18 GND_15 T22
CAT24WC08W-T 0 0 VDDC_16
+3.3V_ST M9 U7
OPT

R646 GND_16
3

4.7K A0 VCC
Addr:10101-- VCC RESET
VDDC_17
U20
1 8 3 2 SW600 VDDC_18
R651 +3.3V_ST M10 U22
R623 A1 $0.199 WP 4.7K 1
GND_17 VDDC_19
3.3K 2 7 006:H5;006:AB28;006:AO4 M11 V7
GND_18 VDDC_20
EEPROM_SCL GND
4

A2 SCL R652 22 M12 V22


3 6 GND_19 VDDC_21
D600 R686 M13 W11
R689 100
ENKMC2838-T112 VSS
4 5
SDA
100 GND_20 VDDC_22
A1 006:AB22;006:AV32 M14 W12
SB_MUTE R653 22 C GND_21 VDDC_23
C EEPROM_SDA M15 W19
003:W10 006:H5;006:AB28;006:AO4 R680
AMP_MUTE B Q602 GND_22 VDDC_24
A2 006:AB20 M16 W20
NTP_MUTE 2SC3052 A7 R744 100 GND_23 VDDC_25
10K GPIO67 USB_CTL 010:AE19 M17 W22
E B8 R767 100 GND_24 VDDC_26
GPIO68 Y22
C662 OPT VDDC_27
S5/S6_Reset M18
4.7uF
R687 C668 N4
GND_25 +3.3V_VDDP VDDP : 102.3mA
10V 10uF
10K GND_26
6.3V N9 H9
GND_27 VDDP_1
N10 H10
GND_28 VDDP_2
N11 H11
GND_29 VDDP_3
N12 H12
GND_30 VDDP_4
N13 N20
GND_31 VDDP_5
N14 P20
GND_32 VDDP_6
PWM Dimming W9
Serial FLASH MEMORY NAND FLASH MEMORY N15
VDDP_7
W10
for BOOT MCU BOOT STRAP GND_33 VDDP_8 AVDD_AU : 36.11mA
N16 +3.3V
006:AR30

GND_34
N17 L608
+3.3V IC601 GND_35 BLM18PG121SN1D
N18 W7
MX25L3205DM2I-12G +3.3V GND_36 AVDD_AU
R609
4.7K

P4 +1.8V_DDR
L601

GND_37 C731 C739


IC604 P9
CS# VCC 10 : BOOT 51 HY27US08121B-TPCB +3.3V GND_38
+3.3V P10 G12
Flash_WP_1

SPI_CS 1 8 11 : BOOT RISC 004:A23 R723 1.2K OPT006:N10;006:AB23 PWM0 GND_39 AVDD_DDR_1 0.1uF 0.1uF
+3.3V $0.76 +3.3V
A_DIM
R724
G13
100OPT
0.1uF

006:AR35 004:A19;008:AK16 006:N10;006:AB23 PWM1 AVDD_DDR_2


PWM_DIM H13
C628

R608 SO HOLD# NC_1 NC_28 R725 100 006:AB23 AVDD_DDR_3


SPI_DO 2 7 1 48 PWM2
R605

006:AR35 P11 H14


10K

33 R649 1K /PF_CE0 R726 GND_40 AVDD_DDR_4


NC_2 NC_27 C685 1.2K 006:AB23 PWM3 P12 H15
H : Serial Flash 2 47 C687
1uF GND_41 AVDD_DDR_5
0
WP#
3 6
SCLK
SPI_CK
OPT
PWM0 006:AB23;006:AK11
L : NAND Flash NC_3
1386 WON NC_26
PCM_A[0-7] 1uF P13 H16
/PF_CE1 3 46 OPT GND_42 AVDD_DDR_6
R647 1K P14 W14
R603 C 006:AR35 H : 16 bit GND_43 AVDD_DDR_7
006:AR36 NC_4 NC_25 P15 W15
1K

L : 8 bit
3.9K

OPT B GND SI OPT R650 1K 4 45 AR600 GND_44 AVDD_DDR_8


0 4 5 SPI_DI PWM1 006:AB23;006:AK11 P16 W16
NC_5 I/O7 PCM_A[7] GND_45 AVDD_DDR_9 AVDD_MEMPLL : 23.77mA
R604 R648 1K 5 44 R727 P17 W17
Q600 010:P21 100 GND_46 AVDD_DDR_10 +3.3V
E NC_6 I/O6 PCM_A[6] Buzzer_PWM P18 W18
KRC103S
R684

6 43
R682

OPT GND_47 AVDD_DDR_11


R/B I/O5 PCM_A[5] L605
7 42 R4 H17 BLM18PG121SN1D
/F_RB
RE I/O4 PCM_A[4] GND_48 AVDD_MEMPLL_1
006:AB28 R9 T20
/PF_OE 8 41 GND_49 AVDD_MEMPLL_2 C719 C725 C740
R10 V20 C732
006:AB29 CE NC_24 22 GND_50 AVDD_MEMPLL_3
/PF_CE0 9 40 R11
I2C GND_51 0.1uF 0.1uF 0.1uF 0.1uF
006:AB29 NC_7 NC_23 R12
C674
1K

10 39 GND_52
10uF 6.3V R13
0.1uF

NC_8 PRE +3.3V


OPT

GND_53
C664

11 38 R14
EEPROM L604
R683

VCC_1 VCC_2 GND_54 BLM18PG121SN1D


12 37
R15 R20 AVDD_LPLL : 4.69mA
+5V_GENERAL GND_55 AVDD_LPLL
VSS_1 VSS_2 C675 0.1uF +3.3V +3.3V_AVDD_MPLL
+3.3V OPT 13 36 R16 C729 C737
+3.3V GND_56
R677 NC_9 NC_22

4.7K OPT
R17 H7

R734 4.7K OPT


1K 14 35 GND_57 AVDD_MPLL 0.1uF 0.1uF
R18
NC_10 NC_21
L600

GND_58 C713

1.2K
1.2K
C716

1.2K
15 34

1.2K
T5

R745 3.3K

R768 3.3K
IC606 GND_59 10uF
AT24C512BW-SH-T CLE NC_20 T9
16 33 0.1uF 10V
/PF_CE1 AR601 GND_60
R675

T10
10K

0
R735

R738
R739

R742
ALE I/O3 PCM_A[3] AVDD_MPLL : 7.76mA

R743
R600 006:AB29 17 32 GND_61 +3.3V
A0 VCC PF_ALE T11
1 8 C601 +3.3V_ST GND_62
0 $0.418 006:AB29 WE
18 31
I/O2 PCM_A[2] T12 L606 AVDD_33 : 281mA
0.1uF /PF_WE FE_TUNER_SDA GND_63 BLM18PG121SN1D
R601 006:AR28;005:O24;005:Y21 J7
A1
2 7
WP
R671 006:AB29 WP I/O1 PCM_A[1] CH6 FE_TUNER_SCL AVDD_33_1
0 33 19 30 006:AR28;005:O24;005:Y21 T13 K7
OPT

R602 R611 R668 0 NC_11 I/O0 PCM_A[0] GND_64 AVDD_33_2 C714 C720 C723 C726 C733 C741
R681

A2 SCL T14 L7
3 6 EEPROM_SCL
006:O16;006:AB28;006:AO4 10K 20 29 MEMC_SDA R728 0 GND_65 AVDD_33_3
SDA0
1K

008:J22 006:AB27 T15 M7 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF


PF_WP
Q601 NC_12 NC_19 22 008:J22 MEMC_SCL R729 0 SCL0 006:AB27 GND_66 AVDD_33_4
R612 KRC103S 21 28 T16 N7
GND
4 5
SDA
EEPROM_SDA 006:AB28
CH2 GND_67 AVDD_33_5
006:O15;006:AB28;006:AO4 OPT NC_13 NC_18 FE_DEMOD_SDA R736 0 T17
33 22 27 005:AK21 +3.3V
GND_68
005:AK22 FE_DEMOD_SCL R737 0 T18
NC_14 NC_17
23 26 HW IIC U5
GND_69
W8 L607 AVDD_DM : 0.03mA
R740 OPT 0 EEPROM_SDA GND_70 AVDD_DM
NC_15 NC_16 CH1 006:H5;006:O15;006:AB28 W13 +3.3V
24 25 R741 OPT 0 EEPROM_SCL BLM18PG121SN1D
006:H5;006:O16;006:AB28 GND_71 C730 C738
Y21 L602
GND_72 BLM18PG121SN1D
TDA9996_SDA R730 0 AA23 H8
002:AH5 GND_73 AVDD_USB 0.1uF 0.1uF
TDA9996_SCL R731 0
002:AH5 C724
C710 C715
SDA_SUB/AMP R732 0
003:K12;010:M24 SDA1 006:AR29 2.2uF 0.1uF
SCL_SUB/AMP R733 0 SCL1
CH4 0.1uF
003:K12;010:M24 006:AR29

AVDD_OTG : 22.96mA

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SL80-UX 09.02.25
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN IC 9 14
MAIN
DDR2 1.8V By CAP - Place these Caps near Memory
+1.8V_DDR +1.8V_S_DDR
L1
BLM18PG121SN1D

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
10uF
C1 C22

0.1uF

0.1uF
10uF
10uF

10uF

C24

C27

C30

C31

C32

C33

C34

C35

C36

C37

C38

C39

C41
C23

C25

C29

C43
C13
0.1uF 0.1uF

C10

C11

C12

C14

C15

C17

C19

C20

C21
C3

C5

C6

C7

C8

C9
+1.8V_S_DDR
+1.8V_S_DDR +1.8V_S_DDR

1K 1%

1K 1%

R47

1%
R23

1K
R4

0.1uF
0.1uF
1000pF

1K 1%

1%

1000pF
C40 C42
IC600

R24

R44
IC1-*1 IC1 IC2

1%
0 . 1 u F 1000pF

1K
IC2-*1

1K

C18
C16
HY5PS1G1631CFP-S6 HYB18TC1G160C2F-2.5 LGE3369A (Saturn6 Non RM) HYB18TC512160B2F-2.5

R5
C4
H5PS5162FFR-S6C

C2
VREF J2 G8 DQ0 SDDR_D[0] DQ0 G8 J2 VREF AR1 D15 VREF J2 G8 DQ0 TDDR_D[0]
SDDR_A[5] ADDR2_A[5] A_MVREF VREF J2 G8 DQ0
G2 DQ1 SDDR_D[1] DQ1 G2 AR13 G2 DQ1 TDDR_D[1]
SDDR_A[3] ADDR2_A[3] BDDR2_A[9] TDDR_A[9] G2 DQ1
H7 DQ2 SDDR_D[2] DQ2 H7 ADDR2_A[0] BDDR2_A[0] H7 DQ2 TDDR_D[2]
A0 M8 M8 A0 SDDR_A[0] SDDR_A[1] ADDR2_A[1] C13 T26 BDDR2_A[3] TDDR_A[3] TDDR_A[0] A0 M8 H7 DQ2
HYNIX H3 DQ3 SDDR_D[3] DQ3 H3 QIMONDA ADDR2_A[1] A_DDR2_A0 B_DDR2_A0 BDDR2_A[1] H3 DQ3 TDDR_D[3] A0 M8
A1 A1 SDDR_A[1] SDDR_A[10] 56 56 ADDR2_A[10] A22 AF26 BDDR2_A[1] TDDR_A[1] TDDR_A[1] A1 DQ3
M3 DQ4 DQ4 M3 M3 DQ4 A1 H3
H1 SDDR_D[4] H1 ADDR2_A[2] A_DDR2_A1 B_DDR2_A1 BDDR2_A[2] H1 TDDR_D[4] M3
A2 A2 SDDR_A[2] B13 T25 BDDR2_A[10] 56 TDDR_A[10] TDDR_A[2] A2 DQ4

SDDR_A[0-12]
M7 M7 M7 H1

TDDR_D[0-15]
DQ5 DQ5 AR3 DQ5 A2

ADDR2_A[0-12]
H9 SDDR_D[5] H9 ADDR2_A[3] A_DDR2_A2 B_DDR2_A2 BDDR2_A[3] H9 TDDR_D[5] M7
SDDR_D[0-15]

A3 A3 C22 AF23 AR12 A3 DQ5


N2 DQ6 SDDR_D[6] DQ6 N2 SDDR_A[3] SDDR_A[9] ADDR2_A[9]
A_DDR2_A3 B_DDR2_A3
TDDR_A[3] N2 QIMONDA DQ6 TDDR_D[6] A3 HYNIX H9
A4 F1 F1 A4 ADDR2_A[4] A13 T24 BDDR2_A[4] A4 F1 N2 DQ6
N8 N8 SDDR_A[4] SDDR_A[12] ADDR2_A[12] BDDR2_A[5] TDDR_A[5] TDDR_A[4] N8 F1

TDDR_A[0-12]
DQ7 DQ7 DQ7 A4

BDDR2_A[0-12]
F9 SDDR_D[7] F9 ADDR2_A[5] A_DDR2_A4 B_DDR2_A4 BDDR2_A[5] F9 TDDR_D[7] N8
A5 N3 N3 A5 SDDR_A[5] SDDR_A[7] ADDR2_A[7] A23 AE23 TDDR_A[5] A5 N3 F9 DQ7
DQ8 SDDR_D[8] DQ8 A_DDR2_A5 B_DDR2_A5 BDDR2_A[12] TDDR_A[12] DQ8 TDDR_D[8] A5
A6 C8 C8 A6 AR2 ADDR2_A[6] C12 R26 BDDR2_A[6] A6 C8 N3 DQ8
N7 N7 SDDR_A[6] BDDR2_A[7] 56 TDDR_A[7] TDDR_A[6] N7 C8
C2 DQ9 SDDR_D[9] DQ9 C2 SDDR_A[0] ADDR2_A[0] ADDR2_A[7] A_DDR2_A6 B_DDR2_A6 BDDR2_A[7] C2 DQ9 TDDR_D[9] A6 N7
A7 P2 P2 A7 SDDR_A[7] B23 AD22 AR14 TDDR_A[7] A7 P2 C2 DQ9
D7 DQ10 SDDR_D[10] DQ10 D7 SDDR_A[2] ADDR2_A[2] ADDR2_A[8] A_DDR2_A7 B_DDR2_A7 BDDR2_A[8] BDDR2_A[0] TDDR_A[0] D7 DQ10 TDDR_D[10] A7 P2
A8 P8 P8 A8 SDDR_A[8] B12 R25 TDDR_A[8] A8 P8 D7 DQ10
D3 DQ11 SDDR_D[11] DQ11 D3 SDDR_A[4] ADDR2_A[4] ADDR2_A[9] A_DDR2_A8 B_DDR2_A8 BDDR2_A[9] BDDR2_A[2] TDDR_A[2] D3 DQ11 TDDR_D[11] A8 P8
A9 P3 P3 A9 SDDR_A[9] C23 AC22 TDDR_A[9] A9 P3 D3 DQ11
D1 DQ12 SDDR_D[12] DQ12 D1 SDDR_A[6] 56 ADDR2_A[6] ADDR2_A[10] A_DDR2_A9 B_DDR2_A9 BDDR2_A[4] TDDR_A[4] DQ12 TDDR_D[12] A9
A10/AP M2 M2 A10/AP SDDR_A[10] B22 AD23 BDDR2_A[10] TDDR_A[10] A10/AP M2
D1 P3
D1 DQ12
DQ13 SDDR_D[13] DQ13 SDDR_A[11] R21 56 ADDR2_A[11] A_DDR2_A10 B_DDR2_A10 BDDR2_A[6] 56 TDDR_A[6] DQ13 TDDR_D[13] A10/AP
A11 D9 D9 A11 ADDR2_A[11] A12 R24 BDDR2_A[11] A11 D9 M2 DQ13
P7 P7 SDDR_A[11] TDDR_A[11] P7 D9
B1 DQ14 SDDR_D[14] DQ14 B1 SDDR_A[8] R22 56 ADDR2_A[8] ADDR2_A[12] A_DDR2_A11 B_DDR2_A11 BDDR2_A[11] R27 56 TDDR_A[11] DQ14 TDDR_D[14] A11
A12 R2 R2 A12 SDDR_A[12] A24 AE22 BDDR2_A[12] TDDR_A[12] A12 R2
B1 P7
B1 DQ14
B9 DQ15 SDDR_D[15] DQ15 B9 A_DDR2_A12 B_DDR2_A12 BDDR2_A[8] R28 56 TDDR_A[8] B9 DQ15 TDDR_D[15] A12 R2
B9 DQ15
+1.8V_S_DDR ADDR2_BA[0] +1.8V_S_DDR
BA0 L2 L2 BA0 SDDR_BA[0] R6 56 C24 AC23 R29 56 TDDR_BA[0] BA0 L2
A_DDR2_BA0 B_DDR2_BA0 BA0 L2
BA1 L3 L3 BA1 SDDR_BA[1] R7 56 ADDR2_BA[1] B24 AC24 R30 56 TDDR_BA[1] BA1 L3
A1 VDD5 VDD5 A1 A_DDR2_BA1 B_DDR2_BA1 A1 VDD5 BA1 L3
BA2 L1 L1 BA2 R48 SDDR_BA[2] R1 56 ADDR2_BA[2] D24 AB22 A1 VDD5
E1 VDD4 VDD4 E1 A_DDR2_BA2 B_DDR2_BA2 E1 VDD4
0 ADDR2_MCLK B14 V25 R31 33 VDD4
VDD3 VDD3 SDDR_CK R8 33 TDDR_MCLK CK VDD3 E1
J9 J9 A_DDR2_MCLK B_DDR2_MCLK J8 J9
OPT CK J8 J9 VDD3
OPT

OPT
R45
CK VDD2 VDD2 CK CK VDD2
150

150
J8 M9 M9 J8 K8 M9
R2
CK K8 M9 VDD2
CK K8 R1 VDD1 VDD1 R1 K8 CK /SDDR_CK R9 33 A14 V24 R32 33 /TDDR_MCLK CKE K2 R1 VDD1
/A_DDR2_MCLK /B_DDR2_MCLK CKE K2 R1 VDD1
CKE K2 K2 CKE SDDR_CKE R10 56 D23 AB23 R33 56 TDDR_CKE
R49 A_DDR2_CKE B_DDR2_CKE
0 OPT +1.8V_S_DDR ODT K9 ODT
ODT VDDQ10 VDDQ10 ODT D14 U26 CS VDDQ10 K9
K9 A9 A9 K9 R50 SDDR_ODT R11 56 R34 56 L8 A9
A_DDR2_ODT B_DDR2_ODT CS L8 A9 VDDQ10
CS VDDQ9 VDDQ9 CS 0 RAS VDDQ9
L8 C1 C1 L8 OPT
K7 C1 RAS VDDQ9
RAS VDDQ8 VDDQ8 RAS D13 U25 /TDDR_RAS CAS VDDQ8 K7 C1
K7 C3 C3 K7 /SDDR_RAS R12 56 R35 56 L7 C3
/A_DDR2_RAS /B_DDR2_RAS CAS L7 C3 VDDQ8
CAS L7 C7 VDDQ7 VDDQ7 C7 L7 CAS /SDDR_CAS R13 56 D12 U24 R36 56 /TDDR_CAS WE K3 C7 VDDQ7
/A_DDR2_CAS /B_DDR2_CAS WE K3 C7 VDDQ7
WE K3 C9 VDDQ6 VDDQ6 C9 K3 WE /SDDR_WE R14 56 D22 AB24 R37 56 /TDDR_WE C9 VDDQ6
/A_DDR2_WE /B_DDR2_WE C9 VDDQ6
E9 VDDQ5 VDDQ5 E9 E9 VDDQ5
LDQS F7 E9 VDDQ5
G1 VDDQ4 VDDQ4 G1 G1 VDDQ4 LDQS F7
LDQS F7 F7 LDQS SDDR_DQS0_P R15 56 B18 AB26 R38 56 TDDR_DQS0_P UDQS B7 G1 VDDQ4
G3 VDDQ3 VDDQ3 G3 A_DDR2_DQS0 B_DDR2_DQS0 G3 VDDQ3 UDQS B7
UDQS B7 B7 UDQS SDDR_DQS1_P R16 56 C17 AA26 R39 56 TDDR_DQS1_P G3 VDDQ3
G7 VDDQ2 VDDQ2 G7 A_DDR2_DQS1 B_DDR2_DQS1 G7 VDDQ2
G7 VDDQ2
G9 VDDQ1 VDDQ1 G9 LDM F3 G9 VDDQ1
LDM F3 G9 VDDQ1
LDM F3 F3 LDM SDDR_DQM0_P R17 56 C18 AC25 R40 56 TDDR_DQM0_P UDM B3
A_DDR2_DQM0 B_DDR2_DQM0 UDM B3
UDM B3 B3 UDM SDDR_DQM1_P R18 56 A19 AC26 R41 56 TDDR_DQM1_P
A_DDR2_DQM1 B_DDR2_DQM1
A3 VSS5 VSS5 A3 LDQS E8 A3 VSS5
LDQS E8 A3 VSS5
LDQS E8 E3 VSS4 VSS4 E3 E8 LDQS SDDR_DQS0_N R19 56 A18 AB25 R42 56 TDDR_DQS0_N UDQS A8 E3 VSS4
A_DDR2_DQSB0 B_DDR2_DQSB0 UDQS A8 E3 VSS4
UDQS A8 J3 VSS3 VSS3 J3 A8 UDQS SDDR_DQS1_N R20 56 B17 AA25 R43 56 TDDR_DQS1_N J3 VSS3
A_DDR2_DQSB1 B_DDR2_DQSB1 J3 VSS3
N1 VSS2 VSS2 N1 N1 VSS2
AR4 ADDR2_D[0] BDDR2_D[0] AR10 NC4 L1 N1 VSS2
P9 VSS1 VSS1 P9 SDDR_D[11] ADDR2_D[11] B15 W25 BDDR2_D[11] TDDR_D[11] P9 VSS1 NC4 L1
NC5 R3 R3 NC4 ADDR2_D[1] A_DDR2_DQ0 B_DDR2_DQ0 BDDR2_D[1] NC5 R3 P9 VSS1
SDDR_D[12] ADDR2_D[12] A21 AE26 BDDR2_D[12] TDDR_D[12] NC5 R3
NC6 R7 R7 NC5 ADDR2_D[2] A_DDR2_DQ1 B_DDR2_DQ1 BDDR2_D[2] NC6 R7
SDDR_D[9] ADDR2_D[9] A15 W24 BDDR2_D[9] TDDR_D[9] NC6 R7
ADDR2_D[3] A_DDR2_DQ2 B_DDR2_DQ2 BDDR2_D[3]
SDDR_D[14] 56 ADDR2_D[14] B21 AF24 BDDR2_D[14] TDDR_D[14]
B2 VSSQ10 VSSQ10 B2 ADDR2_D[4] A_DDR2_DQ3 B_DDR2_DQ3 BDDR2_D[4] AR8 B2 VSSQ10
NC1 NC1 AR6 C21 AF25 56 NC1 VSSQ10
A2 VSSQ9 VSSQ9 A2 SDDR_D[4] ADDR2_D[4] BDDR2_D[4] TDDR_D[4] A2 VSSQ9 NC1 B2
B8 B8 ADDR2_D[5] A_DDR2_DQ4 B_DDR2_DQ4 BDDR2_D[5] B8 A2
NC2 NC2 C14 V26 NC2 VSSQ9

BDDR2_D[0-15]
E2 VSSQ8 VSSQ8 E2 SDDR_D[3] ADDR2_D[3] BDDR2_D[3] TDDR_D[3] E2 VSSQ8 NC2 B8
A7 A7 ADDR2_D[6] A_DDR2_DQ5 B_DDR2_DQ5 BDDR2_D[6] A7 E2
ADDR2_D[0-15]

NC3 R8 R8 NC3 C20 AE25 NC3 R8 A7 VSSQ8


VSSQ7 VSSQ7 SDDR_D[1] ADDR2_D[1] A_DDR2_DQ6 B_DDR2_DQ6 BDDR2_D[1] TDDR_D[1] VSSQ7 NC3
D2 D2 ADDR2_D[7] C15 W26 BDDR2_D[7] D2 R8 VSSQ7
VSSQ6 VSSQ6 SDDR_D[6] 56 ADDR2_D[6] BDDR2_D[6] 56 TDDR_D[6] VSSQ6 D2
D8 D8 ADDR2_D[8] A_DDR2_DQ7 B_DDR2_DQ7 BDDR2_D[8] D8
AR5 C16 Y26 AR11 D8 VSSQ6
VSSDL E7 VSSQ5 VSSQ5 E7 VSSDL SDDR_D[15] ADDR2_D[15] ADDR2_D[9] A_DDR2_DQ8 B_DDR2_DQ8 BDDR2_D[9] BDDR2_D[15] TDDR_D[15] VSSDL E7 VSSQ5
J7 J7 C19 AD25 J7 VSSDL E7 VSSQ5
F2 VSSQ4 VSSQ4 F2 SDDR_D[8] ADDR2_D[8] ADDR2_D[10] A_DDR2_DQ9 B_DDR2_DQ9 BDDR2_D[10] BDDR2_D[8] TDDR_D[8] +1.8V_S_DDR F2 VSSQ4 J7
+1.8V_S_DDR B16 Y25 F2 VSSQ4
F8 VSSQ3 VSSQ3 F8 SDDR_D[10] ADDR2_D[10] ADDR2_D[11] A_DDR2_DQ10 B_DDR2_DQ10 BDDR2_D[10] TDDR_D[10] VSSQ3
B20 AE24 BDDR2_D[11] F8
F8 VSSQ3
H2 VSSQ2 VSSQ2 H2 SDDR_D[13] 56 ADDR2_D[13] ADDR2_D[12] A_DDR2_DQ11 B_DDR2_DQ11 BDDR2_D[13] TDDR_D[13] VSSQ2
AR7 A20 AD26 BDDR2_D[12] AR9
H2
H2 VSSQ2
VDDL VSSQ1 VSSQ1 VDDL A_DDR2_DQ12 B_DDR2_DQ12 56 VDDL VSSQ1
J1 H8 H8 J1 SDDR_D[7] ADDR2_D[7] ADDR2_D[13] A16 Y24 BDDR2_D[13] BDDR2_D[7] TDDR_D[7] J1 H8 VDDL VSSQ1
J1 H8
ADDR2_D[14] A_DDR2_DQ13 B_DDR2_DQ13
SDDR_D[0] ADDR2_D[0] B19 AD24 BDDR2_D[14] BDDR2_D[0] TDDR_D[0]
ADDR2_D[15] A_DDR2_DQ14 B_DDR2_DQ14
SDDR_D[2] ADDR2_D[2] A17 AA24 BDDR2_D[15] BDDR2_D[2] TDDR_D[2]
SDDR_D[5] ADDR2_D[5] A_DDR2_DQ15 B_DDR2_DQ15 BDDR2_D[5] 56 TDDR_D[5]
56

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SL80-UX 09.02.25
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR2 6 15
CB3216PA501E
P800
12V_TCON
TF05-51S

L807
006:R37
006:R37
006:R37
006:R37
006:R36
006:R36
006:R38
006:R38
006:R38
006:R38
006:R39
006:R38

006:R34
006:R34
006:R35
006:R34
006:R34
006:R33
006:R35
006:R35
006:R35
006:R35
006:R36
006:R36
XTAL
R804 1

25V
1M 2

0.1uF

1000pF
OPT

C850

C849
C848
MEMC_RXE4-

MEMC_RXE3-

MEMC_RXE2-

MEMC_RXE1-

MEMC_RXE0-

MEMC_RXO4-

MEMC_RXO3-

MEMC_RXO2-

MEMC_RXO1-

MEMC_RXO0-
MEMC_RXEC-
MEMC_RXE4+

MEMC_RXE3+

MEMC_RXE2+

MEMC_RXE1+

MEMC_RXE0+

MEMC_RXOC-
MEMC_RXEC+

MEMC_RXO4+

MEMC_RXO3+

MEMC_RXOC+

MEMC_RXO2+

MEMC_RXO1+

MEMC_RXO0+
3

22uF
X800
008:W26M_XTALO M_XTALI008:W26 4

C800 12MHz C801 +3.3V_MEMC 5


15pF 15pF
6

M_XTALI
R812 R818

0 0 8 : J 2 8 M_XTALO
7
100 100 L805
8
R813 R819
BLM18PG121SN1D

URSA_A+[0]
+3.3V_MEMC

URSA_B-[0]

URSA_B-[1]
URSA_A-[0]

URSA_A-[1]

URSA_A-[2]

URSA_A-[3]

URSA_A-[4]

URSA_B+[0]

URSA_B+[1]
URSA_A+[1]

URSA_A+[2]

URSA_A+[3]

URSA_A+[4]
0.1uF
9

C803

C805

BLM18PG121SN1D
100 100

1uF

URSA_ACK-
URSA_ACK+
008:M28
SMD Gasket Option f o r F R C o n e - b o a r d R814 R820 10
100 100 URSA_B-[4]

L806
GAS1 GAS2 GAS3 GAS4 GAS5 GAS6 11

BLM18PG121SN1D
+1.26V_MEMC R815 R821
URSA_B+[4]
12
100 100
+3.3V_MEMC URSA_B-[3]

BLM18PG121SN1D
R816 R822 13

L803
URSA_B+[3]
100 100 14
R817 R823

L804
15
100 100 URSA_BCK-

22uF
16

16V

0.1uF
10uF
32/42/55inch(6T) 47inch(7T)

32/42/55inch(6T) 47inch(7T)

C853 0 . 1 u F
32/42/55inch(6T) 47inch(7T)

32/42/55inch(6T) 47inch(7T)

0.1uF
C854 0 . 1 u F

C855 0 . 1 u F
32/42/55inch(6T) 47inch(7T)

32/42/55inch(6T) 47inch(7T)
MDS61887703

MDS61887703

C836
MDS61887703

MDS61887703
MDS61887703

MDS61887703

C838
URSA_BCK+
C804 17
GAS1-*1

GAS4-*1
GAS3-*1

GAS6-*1
GAS2-*1

GAS5-*1

C811
10uF

10uF 10V
10V 18

0.1uF
C813

0.1uF
C830
C829
C807

C809

10uF
URSA_B-[2]
C806 10uF 19

AVDD_LVDS_1

AVDD_LVDS_2
PI Result R825 URSA_B+[2]
20

AVDD_PLL
GPIO[25]
C858

GPIO_13
GPIO_14

GPIO_12
10uF

LVACKM
URSA_B-[1]

LVACKP
MDS61887702

MDS61887702

GPIO_2
GPIO_1

GPIO_9
GPIO_8

GPIO_6
GPIO_4
820
MDS61887702

MDS61887702
MDS61887702

MDS61887702

10V 21

ROCKN

LVA0M

LVA1M

LVA2M

LVA3M

LVA4M
RECKN

LVB0M

LVB1M
ROCKP
RECKP

GND_6

GND_5

GND_2

LVA0P

LVA1P

LVA2P

LVA3P

LVA4P

LVB0P

LVB1P
SDAM
XOUT

SCLM
RO4N

RO3N

RO2N

RO1N

RO0N

REXT
GAS1-*2

GAS4-*2

RE4N

RE3N

RE2N

RE1N

RE0N

RO4P

RO3P

RO2P

RO1P

RO0P
RE4P

RE3P

RE2P

RE1P

RE0P
GAS3-*2

GAS6-*2
GAS2-*2

GAS5-*2

R835 0 C840 URSA_B+[1]

XIN
008:E10ISP_RXD_TR +3.3V_MEMC 22
+3.3V_MEMC 008:E9 ISP_TXD_TR R836 0
0.1uF URSA_B-[0]
C845 23

4.7K
F11

F10
E11
B14

C10

B10
B11

C11
C12

B12

B13

C13
C14
B1

C1
C2

B2
B3

C3
C4

B4

B5

C5
C6

B6
B7

C7
C8

B8
G11

K15
K16

A14

D13
D11

B9

C9

A10

A11

A12

A13

D12
A1

A2

A3

A4

H8

A5

A6

A7

A8

H7

D4
D3

D5
D6
N7

G8

A9

D9
D7

R857

OPT
R837 100 SDAS GPIO_5 URSA_B+[0]
R808 1K E1 D8 24
0 0 6 : AMEMC_SDA
I5 0.1uF
R838 100 SCLS GPIO_7
0 0 6 : A IMEMC_SCL
5 D1 D10 C841 R833OPT
25

0.1uF
GPIO[8] F1 E10 GPIO_11 BIT_SEL
0

R856
GPIO[9] G1 E3 GPIO_10 0.1uF 26

OPT
R809 1K +3.3V_MEMC

0
OPT GND_14 K8 [E1] D2 GPIO_3 URSA_A-[4]
GAS9 VDDC_1 LVB2P URSA_B+[2] 27
GAS7 GAS8 GAS10 GAS11 E5 [D1] C15

1KOPT
1KOPT
OPT URSA_B-[2] URSA_A+[4]
R805 C827 GPIO[10] E2 B15 LVB2M 28

R851 R850
LVDS_SEL 0

R848
GPIO12 GPIO14 GPIO[11] F2 LVBCKP URSA_BCK+
Non M+S LVDS LOW LOW A15 URSA_A-[3]
GPIO[12] F3 LVBCKM URSA_BCK- 29
M+S 42" Mini LVDS LOW HIGH A16
M+S 47" Mini LVDS HIGH LOW GPIO[13] G2 LVB3P URSA_B+[3] URSA_A+[3]
B16 30

R849

1K

1K
M+S 37" Mini LVDS HIGH HIGH URSA_B-[3]
[ Location ] GPIO[22] M4 C16 LVB3M
GPIO[23] M5 LVB4P URSA_B+[4] 31
D15
42inch +3.3V_MEMC
GPIO[14] G3 D16 LVB4M URSA_B-[4] URSA_ACK-
32
GAS1,GAS9,GAS10,GAS11
32/42/55inch(6T) 47inch(7T)

32/42/55inch(6T) 47inch(7T)

BLM18PG121SN1D
32/42/55inch(6T) 47inch(7T)
32/42/55inch(6T) 47inch(7T)

32/42/55inch(6T) 47inch(7T)

GPIO[15] E4 AVDD_33_2 C846


MDS61887703

MDS61887703
MDS61887703
MDS61887703

MDS61887703

F9 URSA_ACK+
GAS10-*1

33
GAS11-*1
GAS7-*1

GAS9-*1

47inch GPIO[16] F4 GND_4


GAS8-*1

C856 C857 G10


L802 URSA_C+[0]
C815

C816

10uF

GAS1,GAS9,GAS10,GAS11 0.1uF 0.1uF GPIO[17] G4 E15 LVC0P 34


GPIO[18] H4 LVC0M 0.1uF URSA_C-[0]
16V 16V
10uF
10V

E16 URSA_A-[2]
55inch GPIO[19] J 4 LVC1P URSA_C+[1] 35
E14
GAS1,GAS2,GAS3,GAS6 +1.8V_MEMC GPIO[20] K4 LVC1M URSA_C-[1] URSA_A+[2]
PI Result F14 36
GAS9,GAS10,GAS11 URSA_C+[2]
GPIO[21] L4 F16 LVC2P URSA_A-[1]
BLM18PG121SN1D
MDS61887702

MDS61887702
MDS61887702

37
MDS61887702

MDS61887702

C828 VDDP_2 LVC2M URSA_C-[2]


GAS10-*2

J6 F15
GAS11-*2
GAS7-*2

GAS9-*2
GAS8-*2

GND_7 LVCCKP URSA_CCK+ URSA_A+[1]


H9 G15 38
L800 URSA_CCK-
0.1uF 0.1uF GND_15K9 LVCCKM
C808

G16 URSA_A-[0]
C851
C810

C852

LVC3P URSA_C+[3] 39
G14
22uF

10uF

0.1uF

URSA_DQ[0-31]

URSA_C-[3] URSA_A+[0]
0.1uF
16V

VDDC_2 F6 H14 LVC3M 40


C825 URSA_C+[4]
URSA_DQ[20] MDATA[20] H1 H16 LVC4P 0 R846OPT
URSA_DQ[19] MDATA[19] LVC4M URSA_C-[4] OPC_OUT2 41
H2 H15
LVD0P URSA_D+[0] 0 R847
J15 OPC_EN 42
URSA_DQ[17]
URSA_DQ[22]
MDATA[17]
MDATA[22]
H3
J1
IC801 J16
J14
LVD0M
LVD1P
URSA_D-[0]
URSA_D+[1]
URSA_D-[1]
OPC_OUT1
0

0 R843
R842 OPT
43

K14 LVD1M 44
PWM_DIM
URSA_DQ[27] MDATA[27] J2 0 R845
URSA_DQ[28] 0.1uF MDATA[28] LVDS_SEL 45
J3
LGE7329A GND_3
C847 OPT
46

0
G9

0
C818 URSA_D+[2]
URSA_DQ[25] MDATA[25] K1 L14 LVD2P

OPT
URSA_D-[2] 47

R855
URSA_DQ[30] MDATA[30] LVD2M 0.1uF

R854
K2 L15
AVDD_DDR_2 LVDCKP URSA_DCK+
K6 L16 48
DQM[3] LVDCKM URSA_DCK-
009:Q13 URSA_DQM3 K3 M16
DQM[2] AVDD_33_1 49
009:Q13 URSA_DQM2 L1 F8
0.1uF GND_10 LVD3P URSA_D+[3]
C819 J8 M15 50
DQS[2] LVD3M URSA_D-[3]
009:Q13 URSA_DQS2 L2 M14
DQSB[2] LVD4P URSA_D+[4] 51
009:Q12 URSA_DQSB2 L3 N16
AVDD_DDR_4 LVD4M C844 URSA_D-[4]
L6 N15
0.1uF VDDP_3 52
L8
GND_8 H10 H6 VDDC_5
C826
DQS[3] GPIO[24] 0.1uF
009:Q13 URSA_DQS3 M1 N6
DQSB[3] GPIO[7] +3.3V_MEMC
009:Q12 URSA_DQSB3 M2 E12
AVDD_DDR_5 L7 D14 GPIO[6]
ISP Port for MEMC URSA_DQ[31] MDATA[31] GPIO[5]
M3 F12
0.1uF P801
URSA_DQ[24] MDATA[24] N1 E13 GPIO[4] TF05-41S
GND_11 J9 F13 GPIO[3]
C820
URSA_DQ[26] MDATA[26] N2 G13 GPIO[2] 1

R826

R828
1K

1K
2
URSA_DQ[29] MDATA[29] N3 H13 GPIO[1]
URSA_D-[4] 3

+5V_GENERAL AVDD_DDR_6 L10 J13 GPIO[0] URSA_D+[4] 4

URSA_DQ[23] MDATA[23] PWM0 URSA_D-[3] 5


P1 K12
URSA_D+[3]
BLM18PG121SN1D

6
URSA_DQ[16] MDATA[16] R1 [N13] L12 PWM1
+3.3V_MEMC 7
URSA_DQ[18] MDATA[18] T1 [L9] K13 CSZ URSA_DCK-

R827

R829
8
[N12]

OPT

OPT
1K

1K
R852

R853
2.2K

2.2K

P803 URSA_DQ[21] MDATA[21] SDO URSA_DCK+ 9


T2 [N5] M12
009:Q16
L801

10
SPK_R- MCLK[0] R2 [N4] M13 SDI
URSA_MCLK URSA_D-[2]
1 0.1uF MCLKZ[0] SCK
11

P2 L13 URSA_D+[2] 12
URSA_MCLKZ
009:Q15 GND_1 GPIO[30] URSA_D-[1] 13
ISP_RXD_TR C824 G7 N14 URSA_D+[1]
SPK_R+ AVDD_MEMPLL GPIO[29] 14
2 L9 N13 URSA_D-[0] 15
MVREF GPIO[28] URSA_D+[0]
0.1uF
C812

008:J23 16
C814

N5 N12
10uF

009:Q15;009:Y15
SPK_L- ODT 17

3 URSA_ODT N4 M_SPI_CZ

M11
K10

K11

H11

GPIO[27] N10
N11
R10

R11

R12

R13

R14

R15

R16
L11

T10

T11

T12

T13

T14

T15

T16
P10

P11

P12

P13

P14

P15

P16
J10

J11
18
0.1uF C821
N8

K7

GPIO[26] N9

G6
R3

R4

R5

R6

R7

R8

R9
T3

T4

T5

T6

T7

T8

T9
P3

P4

P5

P6

P7

P8

F7

P9
URSA_C-[4]

J7
M_SPI_DO 19

ISP_TXD_TR URSA_C+[4] 20
SPK_L+ M_SPI_DI URSA_C-[3]

GND_9
DQS[0]

DQS[1]
DQSB[0]

DQSB[1]
4
BADR[1]
BADR[0]

21
008:J22 0.1uF

MCLK[1]
DQM[1]
DQM[0]
MADR[11]

MADR[10]

MADR[12]

MCLKZ[1]
MADR[0]
MADR[2]
MADR[4]

MADR[6]
MADR[8]

MADR[1]

MADR[5]
MADR[9]

MADR[7]
MADR[3]

RESET
WEZ
RASZ
CASZ

MDATA[11]
MDATA[12]

MDATA[14]

MDATA[15]

MDATA[10]
MDATA[13]
GND_12

GND_16

GND_13

GND_17
MDATA[4]
MDATA[3]

MDATA[1]
MDATA[6]

MDATA[9]

VDDP_1

MDATA[8]

MDATA[7]
MDATA[0]
MDATA[2]
MDATA[5]
VDDC_3

VDDC_4
M_SPI_CK
MCLKE

URSA_C+[3]
AVDD_DDR_7

AVDD_DDR_3

AVDD_DDR_1
22

23

5 C822 URSA_CCK- 24
URSA_CCK+ 25
WAFER-STRAIGHT 26
URSA_C-[2] 27
URSA_C+[2]

0.1uF
0.1uF

C842
28
C837

GPIO8 PWM1 PWM0 URSA_C-[1] 29


URSA_C+[1] 30
URSA_C-[0] 31

0.1uF
C839
URSA_C+[0]

0.1uF
I2C HIGH LOW HIGH

C843
32
SPI FLASH 33

34
C831

C832

C833

C834
R810

C835

EEPROM HIGH 35
10K

+3.3V_MEMC HIGH LOW


36

37

38
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF SPI HIGH HIGH HIGH

R824
39

0
URSA_A[11]

URSA_A[10]

URSA_A[12]

40
URSA_A[0]
URSA_A[2]
URSA_A[4]

URSA_A[6]
URSA_A[8]

URSA_A[1]

URSA_A[5]
URSA_A[9]

URSA_A[7]
URSA_A[3]

41
0.1uF
C802

42
0.1uF

C817
R811

C823
1uF
10K

IC800
W25X20AVSNIG
+3.3V_ST
URSA_DQ[11]
URSA_DQ[12]

URSA_DQ[14]

URSA_DQ[15]

URSA_DQ[10]
URSA_DQ[13]
URSA_DQ[4]
URSA_DQ[3]

URSA_DQ[1]
URSA_DQ[6]

URSA_DQ[9]

URSA_DQ[8]

URSA_DQ[7]
URSA_DQ[0]
URSA_DQ[2]
URSA_DQ[5]
R801 56 CS
1 8
VCC
M_SPI_CZ
008:AG9 R831
R802 56 DO
2 7
HOLD
10K
M_SPI_DO
008:AG9
R803 10K WP CLK R806 56
3 6
M_SPI_CK
0 08:AG9 MEMC_RESET 006:AB20
GND
4 5
DIO R807 56
M_SPI_DI
008:AG9
URSA_DQ[0-31] 009:D21;009:AL21
URSA_A[0-12]
URSA_BA1
URSA_BA0

URSA_DQS0

URSA_DQS1
URSA_RASZ
URSA_CASZ

URSA_DQSB0

URSA_DQSB1
URSA_WEZ

URSA_DQM1
URSA_DQM0

URSA_MCLK1
URSA_MCLKZ1
URSA_MCLKE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SL80-UX 09.02.25
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS / FRC 7 14
DDR2 1.8V By CAP - Place these Caps near Memory
+1.8V_MEMC +1.8V_FRC_DDR +1.8V_FRC_DDR +1.8V_FRC_DDR

BLM18PG121SN1D
L900

10V

10V
0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
C924

C926

C928

C929

C931

C933

C934

C935

C936

C937

C938

C939

C940
10uF

0.1uF

0.1uF
C942

C943

C944

C921

C925

C927

C941
C900

C913

C923

10uF
C902

10uF

10uF
C903

C904

C905

C906

C907

C909

C911

C912

C914

C915

C916

C917

C918

C919

C920

C922
C901

10uF
10uF
PI Result

008:U3
+1.8V_FRC_DDR +1.8V_FRC_DDR

1K1%
R901

1K1%
R921
URSA_A[0-12]
009:AL21;008:AB4 URSA_DQ[0-31] URSA_DQ[0-31] 009:D21;008:AB4

1K 1%

1000pF
DDR_Qimonda512 DDR_Qimonda512

1000pF

1K1%

0.1uF
0.1uF

R922
R902

C930

C932
C910
C908
AR900 IC900 IC901 AR914
URSA_DQ[27] DDR_DQ[27] DDR_DQ[15] URSA_DQ[15]
URSA_DQ[28] DDR_DQ[28]
HYB18TC512160B2F-2.5 HYB18TC512160B2F-2.5 DDR_DQ[8] 56 URSA_DQ[8]
URSA_DQ[25] 56 DDR_DQ[25] DDR_DQ[10] URSA_DQ[10]
URSA_DQ[30] DDR_DQ[30] DDR_DQ[13] URSA_DQ[13]
DDR_DQ[16] DQ0 G8 J2 VREF VREF J2 G8 DQ0 DDR_DQ[0]
AR901 DDR_DQ[17] DQ1 G2 G2 DQ1 DDR_DQ[1] AR915
URSA_DQ[22] DDR_DQ[22] DDR_DQ[7] URSA_DQ[7]
DDR_DQ[18] DQ2 URSA_A[3] AR911 DDRA_A[3] DQ2 DDR_DQ[2]
URSA_DQ[17] DDR_DQ[17] H7 A0 DDRB_A[0] DDRA_A[0] A0 H7 DDR_DQ[0] URSA_DQ[0]
M8 DDRB_A[10] AR904 URSA_A[10] URSA_A[1] 22 DDRA_A[1] M8 56
DDR_DQ[19] DQ3 DQ3 DDR_DQ[3]
DDR_DQ[16-31]

URSA_DQ[19] 56 DDR_DQ[19] H3 A1 DDRB_A[1] DDRA_A[1] A1 H3 DDR_DQ[2] URSA_DQ[2]

DDR_DQ[0-15]
DDR_DQ[20] DQ4 M3 DDRB_A[1] 22 URSA_A[1] URSA_A[10] DDRA_A[10] M3 DQ4 DDR_DQ[4]
H1 H1

DDRB_A[0-12]
URSA_DQ[20] DDR_DQ[20] M7 A2 DDRB_A[2] DDRA_A[2] A2 M7 DDR_DQ[5] URSA_DQ[5]

DDRA_A[0-12]
DDR_DQ[21] DQ5 H9 DDRB_A[3] URSA_A[3] H9 DQ5 DDR_DQ[5]
N2 A3 DDRB_A[3] DDRA_A[3] A3 N2
AR902 DDR_DQ[22] DQ6 DDRB_A[9] URSA_A[9] URSA_A[9] DDRA_A[9] DQ6 DDR_DQ[6] AR916
URSA_DQ[31] DDR_DQ[31] F1 A4 DDRB_A[4] DDRA_A[4] A4 F1 DDR_DQ[11] URSA_DQ[11]
DDR_DQ[23] DQ7 N8 DDRB_A[12] AR905 URSA_A[12] URSA_A[12] AR912 DDRA_A[12] N8 DQ7 DDR_DQ[7]
URSA_DQ[24] DDR_DQ[24] F9 A5 DDRB_A[5] DDRA_A[5] A5 F9 DDR_DQ[12] 56 URSA_DQ[12]
DDR_DQ[24] DQ8 N3 DDRB_A[7] 22 URSA_A[7] URSA_A[7] 22 DDRA_A[7] N3 DQ8 DDR_DQ[8]
URSA_DQ[26] 56 DDR_DQ[26] C8 A6 DDRB_A[6] DDRA_A[6] A6 C8 DDR_DQ[9] URSA_DQ[9]
DDR_DQ[25] DQ9 N7 DDRB_A[5] URSA_A[5] URSA_A[5] DDRA_A[5] N7 DQ9 DDR_DQ[9]
URSA_DQ[29] DDR_DQ[29] C2 A7 DDRB_A[7] DDRA_A[7] A7 C2 DDR_DQ[14] URSA_DQ[14]
DDR_DQ[26] DQ10 P2 DDRB_A[0] URSA_A[0] URSA_A[2] DDRA_A[2] P2 DQ10 DDR_DQ[10]
D7 A8 DDRB_A[8] DDRA_A[8] A8 D7
AR903 DDR_DQ[27] DQ11 P8 DDRB_A[2] AR906 URSA_A[2] URSA_A[0] AR913 DDRA_A[0] P8 DQ11 DDR_DQ[11] AR917
URSA_DQ[23] DDR_DQ[23] D3 A9 DDRB_A[9] DDRA_A[9] A9 D3 DDR_DQ[6] URSA_DQ[6]
DDR_DQ[28] DQ12 P3 DDRB_A[4] 22 URSA_A[4] URSA_A[6] 22 DDRA_A[6] P3 DQ12 DDR_DQ[12]
URSA_DQ[16] DDR_DQ[16] D1 A10/AP DDRB_A[10] DDRA_A[10] A10/AP D1 DDR_DQ[1] 56 URSA_DQ[1]
DDR_DQ[29] DQ13 M2 DDRB_A[6] URSA_A[6] URSA_A[4] DDRA_A[4] M2 DQ13 DDR_DQ[13]
URSA_DQ[18] 56 DDR_DQ[18] D9 A11 DDRB_A[11] DDRA_A[11] A11 D9 DDR_DQ[3] URSA_DQ[3]
DDR_DQ[30] DQ14 P7 AR907 AR910 P7 DQ14 DDR_DQ[14]
URSA_DQ[21] DDR_DQ[21] B1 A12 DDRB_A[12]
009:Q14 B_URSA_RASZ URSA_RASZ
009:S1 7 ; 0 0 8 : Q 3URSA_RASZ
009:W17;008:Q3 A_URSA_RASZ 009:Y14DDRA_A[12] A12 B1 DDR_DQ[4] URSA_DQ[4]
DDR_DQ[31] DQ15 R2 R2 DQ15 DDR_DQ[15]
B9 009:Q14 B_URSA_CASZ URSA_CASZ 1 7 ; 0 0 8 : Q 3URSA_CASZ
0 0 9 : S009:W17;008:Q3 A_URSA_CASZ 009:Y14 B9
DDRB_A[11] URSA_A[11] URSA_A[8] 22 DDRA_A[8]
+1.8V_FRC_DDR BA0 DDRB_A[8] URSA_A[8] URSA_A[11] DDRA_A[11] BA0 +1.8V_FRC_DDR
L2 B_URSA_BA0 A_URSA_BA0 L2
DDR_Hynix512
009:T11 009:V10
IC900-*2
L3 BA1 22 BA1 L3
VDD5 B_URSA_BA1 009:T11 009:V10 A_URSA_BA1 VDD5
H5PS5162FFR-S6C A1 R903 22 R912 22 A1 DDR_Qimonda512_DieRevision

VDD4 URSA_MCLK 008:J10 008:AB3 URSA_MCLK1 VDD4 IC900-*1


E1 E1

R900
HYB18TC512160CF-2.5

R923
OPT
VREF DQ0

OPT
J2 G8
VDD3 CK CK VDD3

150

150
G2 DQ1 J9 J8 J8 J9
H7 DQ2
A0 M8 DQ3 VDD2 M9 K8 CK R904 22 R913 22 CK K8 M9 VDD2 VREF J2 G8 DQ0
A1 M3
H3
DQ4
URSA_MCLKZ 008:J10 008:AB3 URSA_MCLKZ1 G2 DQ1
H1
A2 M7 DQ5 VDD1 R1 K2 CKE CKE K2 R1 VDD1 H7 DQ2
A3 N2
H9
DQ6
B_URSA_MCLKE 009:T11 009:V10 A_URSA_MCLKE A0 M8
H3 DQ3
A4 F1 A1 M3
N8 DQ7 H1 DQ4
A5 F9 A2 M7
N3 DQ8 H9 DQ5
A6 C8 A3 N2
N7 DQ9 F1 DQ6
C2 A4
A7 P2 DQ10 K9 ODT R905 22 R914 22 ODT K9
N8
F9 DQ7
A8 P8
D7
DQ11
URSA_ODT 009:Y15;008:J9 0 0 9 : Q 1 5 ; 0 0 8 : J 9 URSA_ODT A5 N3
C8 DQ8
D3 A6
A9 P3
D1 DQ12 VDDQ10 A9 L8 CS CS L8 A9 VDDQ10 A7
N7
C2 DQ9
A10/AP M2 P2 DQ10
D9 DQ13 A8 D7
A11 P7 DQ14 VDDQ9 C1 K7 RAS RAS K7 C1 VDDQ9 P8
D3 DQ11
A12 R2
B1
DQ15
B_URSA_RASZ 009:R17 009:X17 A_URSA_RASZ A9 P3
D1 DQ12
B9 A10/AP
VDDQ8 C3 L7 CAS CAS L7 C3 VDDQ8 M2
D9 DQ13
BA0
B_URSA_CASZ 009:R17 009:X17 A_URSA_CASZ A11 P7
B1 DQ14
L2 A12
BA1 VDDQ7 C7 K3 WE WE K3 C7 VDDQ7 R2
B9 DQ15
L3
A1 VDD5 B_URSA_WEZ 009:T11 009:V10 A_URSA_WEZ
E1 VDD4 VDDQ6 C9 C9 VDDQ6 BA0 L2
CK J8 J9 VDD3 BA1 L3 VDD5
CK K8 M9 VDD2 VDDQ5 E9 E9 VDDQ5 A1
VDD4
CKE K2 R1 VDD1
F7 LDQS R906 56 R915 56 LDQS F7
E1
VDDQ4 URSA_DQS2 008:J14 008:X3 URSA_DQS0 VDDQ4 CK J8 J9 VDD3
G1 UDQS R907 56 R916 56 UDQS G1 CK K8 M9 VDD2
ODT K9
VDDQ3 B7 URSA_DQS3 URSA_DQS1 B7 VDDQ3 CKE VDD1
CS L8 A9 VDDQ10 G3 008:J13 008:Y3 G3
K2 R1

RAS K7 C1 VDDQ9
CAS L7 C3 VDDQ8 VDDQ2 G7 G7 VDDQ2 ODT K9
WE VDDQ7 CS L8 A9 VDDQ10
K3 C7
VDDQ6 VDDQ1 G9 F3 LDM R908 56 R917 56 LDM F3 G9 VDDQ1 RAS K7 C1 VDDQ9
C9
VDDQ5
URSA_DQM2 008:J14 008:X3 URSA_DQM0 CAS L7 C3 VDDQ8
E9
LDQS F7 VDDQ4 B3 UDM R909 56 R918 56 UDM B3 WE K3 C7 VDDQ7
UDQS B7
G1
VDDQ3
URSA_DQM3 008:J14 008:X3 URSA_DQM1 C9 VDDQ6
G3
VDDQ2 E9 VDDQ5
G7 LDQS F7
LDM VDDQ1 G1 VDDQ4
F3 G9 UDQS B7
UDM G3 VDDQ3
B3
VSS5 A3 E8 LDQS R910 56 R919 56 LDQS E8 A3 VSS5 G7 VDDQ2
URSA_DQSB2 008:J14 008:X3 URSA_DQSB0 LDM F3 G9 VDDQ1
LDQS E8 A3 VSS5 VSS4 E3 A8 UDQS R911 56 R920 56 UDQS A8 E3 VSS4 UDM B3
UDQS A8 E3 VSS4 URSA_DQSB3 008:J13 008:Y3 URSA_DQSB1
J3 VSS3 VSS3 J3 J3 VSS3 LDQS VSS5
N1 VSS2 E8 A3
NC4 L1 UDQS VSS4
NC5 R3
P9 VSS1 VSS2 N1 N1 VSS2 A8 E3
VSS3
NC6 R7 L1 NC4 AR908 NC4 L1
J3
VSS2
VSS1 P9 P9 VSS1 NC4 L1
N1
NC5 009:O16 B_URSA_BA0 URSA_BA0 009:T10;008:S3 NC5 NC5 P9 VSS1
NC1 A2
B2 VSSQ10 R3 R3 NC6
R3
VSSQ9 R7
NC2 E2
B8
NC6 009:O16 B_URSA_BA1 URSA_BA1 009:T10;008:S3 NC6
NC3 R8
A7 VSSQ8 R7 R7 VSSQ10
VSSQ7 B2
D2
VSSQ6
009:Q15 B_URSA_MCLKE URSA_MCLKE 009:T10;008:U3
NC1 A2
B8 VSSQ9
D8 NC2 E2
VSSQ5 A7 VSSQ8
VSSDL J7 E7
VSSQ10 009:Q14 B_URSA_WEZ URSA_WEZ 009:T10;008:R3 VSSQ10 NC3 R8 VSSQ7
F2 VSSQ4 B2 NC1 22 NC1 B2 D2
VSSQ6
F8 VSSQ3
VSSQ9 A2 A2 VSSQ9
D8
VSSQ5
H2 VSSQ2 B8 NC2 AR909 NC2 B8 VSSDL J7 E7
VSSQ4
VDDL J1 H8 VSSQ1
VSSQ8 E2 E2 VSSQ8
F2
VSSQ3
A7 NC3 009:V11;008:S3 URSA_BA0 A_URSA_BA0 NC3 A7 F8
R8 009:AA16 R8 H2 VSSQ2
VSSQ7 D2 +1.8V_FRC_DDR D2 VSSQ7 VDDL J1 H8 VSSQ1
+1.8V_FRC_DDR 009:V11;008:S3 URSA_BA1 A_URSA_BA1 009:AA16
VSSQ6 D8 D8 VSSQ6
009:V11;008:U3URSA_MCLKE A_URSA_MCLKE 009:Z15
VSSQ5 E7 VSSDL VSSDL E7 VSSQ5
J7 009:V11;008:R3 URSA_WEZ A_URSA_WEZ 009:Y14 J7
VSSQ4 22 VSSQ4
F2 F2
DDR_Hynix512
DDR_Qimonda256
VSSQ3 F8 F8 VSSQ3
IC901-*2 IC900-*3
HYB18TC256160BF-2.5 VSSQ2 H2 H2 VSSQ2 DDR_Qimonda256
H5PS5162FFR-S6C DDR_Qimonda512_DieRevision
VSSQ1 H8 J1 VDDL VDDL J1 H8 VSSQ1 IC901-*3
IC901-*1
VREF DQ0
VREF J2 G8 DQ0 HYB18TC256160BF-2.5
J2 G8
G2 DQ1 HYB18TC512160CF-2.5
G2 DQ1
H7 DQ2
H7 DQ2 A0 M8
A0 M8 H3 DQ3 VREF J2 G8 DQ0
H3 DQ3 A1 M3 VREF DQ0
A1 M3 H1 DQ4 G2 DQ1 J2 G8
H1 DQ4 A2 M7 DQ1
A2 M7 H9 DQ5 H7 DQ2 G2
H9 DQ5 A3 N2 A0 M8 DQ2
A3 N2 F1 DQ6 H3 DQ3 A0 H7
F1 DQ6 A4 N8 A1 M3 M8 DQ3
A4 N8 F9 DQ7 H1 DQ4 A1 H3
F9 DQ7 A5 N3 A2 M7 M3 DQ4
A5 N3 C8 DQ8 H9 DQ5 A2 H1
C8 DQ8 A6 N7 A3 N2 M7 DQ5
A6 N7 C2 DQ9 F1 DQ6 A3 H9
C2 DQ9 A7 P2 A4 N8 N2 DQ6
A7 P2 D7 DQ10 F9 DQ7 A4 F1
D7 DQ10 A8 P8 A5 N3 N8 DQ7
A8 P8 D3 DQ11 C8 DQ8 A5 F9
D3 DQ11 A9 P3 A6 N7 N3 DQ8
A9 P3 D1 DQ12 C2 DQ9 A6 C8
D1 DQ12 A10/AP M2 A7 P2 N7 DQ9
A10/AP M2 D9 DQ13 D7 DQ10 A7 C2
D9 DQ13 A11 P7 A8 P8 P2 DQ10
A11 P7 B1 DQ14 D3 DQ11 A8 D7
B1 DQ14 A12 R2 A9 P3 P8 DQ11
A12 R2 B9 DQ15 D1 DQ12 A9 D3
B9 DQ15 A10/AP M2 P3 DQ12
D9 DQ13 A10/AP D1
A11 P7 M2 DQ13
BA0 L2 B1 DQ14 A11 D9
BA0 L2 A12 R2 P7 DQ14
BA1 L3 B9 DQ15 A12 B1
BA1 L3 A1 VDD_5 R2 DQ15
A1 VDD5 B9
E1 VDD_4
E1 VDD4 BA0 L2
CK J8 J9 VDD_3 BA0
CK J8 J9 VDD3 BA1 L3 L2
CK K8 M9 VDD_2 A1 VDD_5 BA1
CK VDD2 L3
CKE
K8
K2
M9
R1 VDD1
CKE K2 R1 VDD_1
resonance Compensation CK J8
E1
J9
VDD_4
VDD_3
A1
E1
VDD5
VDD4
CK VDD_2 CK J8 J9 VDD3
ODT K8 M9
ODT K9 CKE VDD_1 CK K8 M9 VDD2
K9 CS VDDQ_10 K2 R1
CS VDDQ10 L8 A9 CKE K2 R1 VDD1
L8 A9 RAS VDDQ_9
RAS K7 C1 VDDQ9
CAS
K7 C1
VDDQ_8
+1.8V_MEMC ODT
L7 C3 K9
CAS L7 C3 VDDQ8
WE K3 C7 VDDQ_7 +1.8V_FRC_DDR CS L8 A9 VDDQ_10 ODT K9
WE K3 C7 VDDQ7 CS VDDQ10
C9 VDDQ_6 RAS K7 C1 VDDQ_9 L8 A9
C9 VDDQ6 RAS VDDQ9
E9 VDDQ_5 CAS L7 C3 VDDQ_8 K7 C1
E9 VDDQ5 LDQS F7 CAS VDDQ8
LDQS F7 G1 VDDQ_4 WE K3 C7 VDDQ_7 L7 C3
G1 VDDQ4 UDQS B7 WE VDDQ7
UDQS B7 G3 VDDQ_3 C9 VDDQ_6 K3 C7
G3 VDDQ3 VDDQ6
G7 VDDQ_2 E9 VDDQ_5 C9
G7 VDDQ2 LDQS F7 VDDQ5
LDM F3 G9 VDDQ_1 G1 VDDQ_4 LDQS E9
LDM F3 G9 VDDQ1 UDQS B7 F7 VDDQ4
UDM B3 G3 VDDQ_3 UDQS G1
UDM B3 B7 VDDQ3
0.1uF

G7 VDDQ_2 G3
0.1uF

0.1uF

VDDQ2
C945

LDM VDDQ_1 G7
0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

F3 G9
C946

C947

C948

C949

C950

C951

LDQS VSS_5
C952

LDQS VSS5 E8 A3 UDM LDM F3 G9 VDDQ1


E8 A3 UDQS VSS_4 B3
UDQS VSS4 A8 E3 UDM B3
A8 E3 VSS_3
VSS3 J3
J3 VSS_2 LDQS VSS_5
VSS2 NC_4 N1 E8 A3
NC4 N1 L1 VSS_1 UDQS VSS_4 LDQS E8 A3 VSS5
L1 VSS1 NC_5 P9 A8 E3
NC5 P9 R3 VSS_3 UDQS A8 E3 VSS4
R3 NC_6 J3
NC6 R7 VSS_2 J3 VSS3
R7 NC_4 N1
L1 VSS_1 N1 VSS2
VSSQ_10 NC_5 P9 NC4 L1
VSSQ10 NC_1 B2 R3 P9 VSS1
NC1 B2 A2 VSSQ_9 NC_6 NC5 R3
A2 VSSQ9 NC_2 B8 R7
NC2 B8 E2 VSSQ_8 NC6 R7
E2 VSSQ8 NC_3 A7
NC3 A7 R8 VSSQ_7 VSSQ_10
R8 VSSQ7 D2 NC_1 B2
D2 VSSQ_6 A2 VSSQ_9 B2 VSSQ10
VSSQ6 D8 NC_2 B8 NC1 A2
D8 VSSQ_5 E2 VSSQ_8 B8 VSSQ9
VSSQ5 VSSDL J7 E7 NC_3 A7 NC2 E2
VSSDL J7 E7 VSSQ_4 R8 VSSQ_7 A7 VSSQ8
VSSQ4 F2 D2 NC3 R8
F2 VSSQ_3 VSSQ_6 D2 VSSQ7
VSSQ3 F8 D8
F8 VSSQ_2 VSSQ_5 D8 VSSQ6
VSSQ2 H2 VSSDL J7 E7
H2 VDDL VSSQ_1 VSSQ_4 VSSDL E7 VSSQ5
VDDL VSSQ1 J1 H8 F2 J7
J1 H8 VSSQ_3 F2 VSSQ4
F8
VSSQ_2 F8 VSSQ3
H2
VDDL VSSQ_1 H2 VSSQ2
J1 H8
VDDL J1 H8 VSSQ1

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SL80-UX 09.02.25
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FRC DDR 8 14
USB JACK
[CONTROL IR & LED] USB +5V_USB_1
010:AA20
+3.3V_ST

CB3216PA501E
L1005
P1000
12507WS-12L

KJA-UB-4-0004
JK1000

1
USB DOWN STREAM
R1004
SCL 0

R1011

R1014
1

2
SCL_SUB/AMP USB_DM

4.7K

4.7K
C1012 C1014

OPT
D1001

OPT
006:AI3;003:K12 006:AR33 220uF 220uF
ADMC5M03200L_AMODIODE R1005
SDA 5.6V 0 16V 16V
2 5.6V

3
SDA_SUB/AMP USB_DP
006:AI3;003:K12 L1003 006:AR33
50V 50V BG2012B080TF R1017
GND 100pF 100pF 100 D1004
3 D1000 D1005
ADMC5M03200L_AMODIODE

4
ADMC5M03200L_AMODIODE C1002 C1004 KEY1 006:AB22 ADMC5M03200L_AMODIODE
5.6V OPT 5.6V
L1004 R1018 OPT

5
KEY1 BG2012B080TF 100
4 KEY2 006:AB22

KEY2
5 +5V_ST
L1002
CB3216PA501E
5V_ST
6
ZD1000

0.1uF

0.1uF
C1003

C1005
C1006 C1008
5.6B ZD1002 0.1uF
GND 1000pF
7 5.6B 50V 16V

WARM_ST Buzzer_PWM P i n t o P i n R e p l a c a b l e w i t h T - M I C 2 0 1 9 Y M 6 +3.3V


8 0

L1000 R1008
IR BG2012B080TF +5V_USB_1

0
OPT
9 IR 010:AH26 +5V_EXT
C1010 +3.3V_ST +3.3V R1021

R1006
C1001 006:AB22;001:L3 IC1000
ZD1001 5.6V 0.1uF MIC2009YM6-TR
4.7K
GND 100pF 16V OPT

0OPT
10 50V CDS3C05HDMI1

R1009

R1010
VOUT VIN
5.6B D1002 6 1
L1001

R1022
ILIMIT GND
CB3216PA501E 5 2
C1013
3.3V_ST

10K
USB_CTL C1011 0.1uF

R1019
11 FAULT/ ENABLE
4 3 10uF

180
10V
PWR_ON
12 For Normal LED(IR Ass’y) applied Model
C1007 C1009
1000pF
50V 0.1uF +3.3V_ST R1020
13 16V USB_OCD
47

GND +3.3V_ST

R1015 R1016
10K
10K 10K
R1000
R1002 D1003
ENKMC2838-T112 R1012
USB +5V Over Current Protection --> USB Jack
C OPT 100 A1 0 LED_MOVING/LED_R
R1007
B 0 C
C1000 Q1000 R1013 006:AB22;006:AS32
A2 0 LED_B
0.1uF 2SC3052 R1001
OPT E 4.7K R1003 OPT 006:AB21
120K
OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SL80-UX 09.02.25
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. ETC 14 14
www.s-manuals.com

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