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SCIENCES DE
TUNIS
SYSTÈME
EMBARQUÉ
PÉRIPHÈRIQUE
USB
Cha i ma KHALUAOUI
V1.0
OBJECTIFS
2
UNIVERSAL SERIAL BUS
3
CARACTÉRISTIQUES
Protocol Serial,Pooled,Host-Centric
Max length 5m
0.5A genral
0.1A from usb-powre HUB
Max Current
5A charging device
Up to 100W over USB-c power delivery
5
TIRED STAR TOPOLOGY
HOST
Device Device
HUB
6
Device Device Device
FLUX DE LA COUCHE
PHYSIQUE
USB cable
8
BIT STUFFING
0 1 0 0 1 1 1 1 1 1 0 1 1
0 1 0 0 1 1 1 1 1 0 1 0 1 1
9
NRZI(NO RETURN TO ZERO
INVERTED)
0 1 1 0 1 0 1 0 0 0 1 0 0 1 1 0
Data
NRZI J
k
10
NRZI(NO RETURN TO ZERO
INVERTED)
0 1 1 0 1 0 1 0 0 0 1 0 0 1 1 0
Data
NRZI J
k
11
ÉLECTRIQUEMENT
• USB c’est un protocol série qui comporte 4 fils (pour le USB 2.0)
*2 pour l’alimentation (VBUS et GND)
*2 pour les données (D+ et D-)
VBUS VBUS
D+ D+
D- D-
GND GND
12
USB BUS
State
2 Differetiel 0 6 Data K
D- High, D+ low low Speed :Differetiel 1 10 Connect
Full Speed :Differetiel 0
idle for more
than 2.5 us
3 Singal Ended zero 7 start of packet
D+ and D- low switching from idle to k
state 11 Reset
SE0 for more
4 Singal Ended One 8 End of packet than
D+ and D-High
SE0 for 2 bit times fellowed acceptable
by J state for 1 bit time (required >=10us) 13
USB LS/FS +3.3V
Rpu
D+ D+
USB Wire
D- D-
Rpu
Rpd Rpd
Host Device 12
+3.3V
USB LS/FS +3.3V
Rpu
D+ D+
USB Wire
Host Device 12
+3.3V
USB LS/FS +3.3V
Full Speed
Rpu
PU doit etre connecté
D+
D+ D+
USB Wire
Host Device 12
+3.3V
USB LS/FS +3.3V
Rpu
D+ D+
USB Wire
Host Device 12
+3.3V
USB LS/FS
D+ D+
USB Wire
D- D-
Rpu
+3.3V
Rpd Rpd
Host Device 13
USB LS/FS
Rpu
+3.3V
Rpd Rpd
+3.3V
Assert Signal Ended
Reciver
Rpd Rpd SE data- Reciver
+3.3V
Assert Signal Ended
Reciver
Rpd Rpd SE data- Reciver
J J
LS/FS Diffrientiel reciver D+ D+
LS/FS Diffrientiel reciver
USB Wire
LS/FS Diffrientiel Dta reciver
LS/FS Diffrientiel Dta reciver
D- D-
SE data+ Reciver 0
Rpu
+3.3V
Assert Signal Ended
Reciver
Rpd Rpd 1 SE data- Reciver
LS/FS Driver
LS/FS
LS/FS Driver
Driver +3.3V
LS/FS Driver Enable LS/FS Driver Enable
LS/FS Data LS/FS Data
J J
LS/FS Diffrientiel reciver
D+ D+
LS/FS Diffrientiel reciver
USB Wire
LS/FS Diffrientiel Dta reciver
LS/FS Diffrientiel Dta reciver
D- D-
SE data+ Reciver 1
Rpu
+3.3V
Assert Signal Ended
Reciver
Rpd Rpd 0 SE data- Reciver
ENABLE
+3.3V LS/FS Driver
LS/FS Driver Enable LS/FS Driver LS/FS Driver Enable
LS/FS Data LS/FS Data
J J
LS/FS Diffrientiel reciver
D+ D+
LS/FS Diffrientiel reciver
USB Wire
LS/FS Diffrientiel Dta reciver
LS/FS Diffrientiel Dta reciver
D- D-
SE data+ Reciver 1
Rpu
+3.3V
Assert Signal Ended
Reciver
Rpd Rpd 0 SE data- Reciver
ENABLE
+3.3V LS/FS Driver
LS/FS Driver Enable LS/FS Driver LS/FS Driver Enable
le type de
LS/FS Data K communi
cation sta LS/FS Data
with k-sa rt
Assert Signal Ended Zero tate is sop Assert Signal Ended Zero
or resume
Rpu
K K
LS/FS Diffrientiel reciver
D+ D+
LS/FS Diffrientiel reciver
USB Wire
LS/FS Diffrientiel Dta reciver
LS/FS Diffrientiel Dta reciver
D- D-
SE data+ Reciver 0
Rpu
+3.3V
Assert Signal Ended
Reciver
Rpd Rpd 0 SE data- Reciver
J J
D+ D+
LS/FS Diffrientiel reciver USB USB LS/FS Diffrientiel reciver
LS/FS Diffrientiel Dta reciver Wire Wire LS/FS Diffrientiel Dta reciver
D- D-
SE data+ Reciver 1
Rpu
+3.3V
Assert Signal Ended
Reciver
Rpd Rpd 0 SE data- Reciver
J J
LS/FS Diffrientiel reciver
D+ D+
LS/FS Diffrientiel reciver
USB Wire
LS/FS Diffrientiel Dta reciver
LS/FS Diffrientiel Dta reciver
D- D-
SE data+ Reciver 1
Host detect la connection par
la présence de 1 sur D+ Rpu
+3.3V
Assert Signal Ended
Reciver
Rpd Rpd 0 SE data- Reciver
J J
LS/FS Diffrientiel reciver
D+ D+
LS/FS Diffrientiel reciver
USB Wire
LS/FS Diffrientiel Dta reciver
LS/FS Diffrientiel Dta reciver
D- D-
SE data+ Reciver 1
Host detect la connection par
la présence de 1 sur D+ Rpu
+3.3V
Assert Signal Ended
Reciver
Rpd Rpd 0 SE data- Reciver
SE data+ Reciver 0
Rpu
+3.3V
Assert Signal Ended
Reciver
Rpd Rpd 0 SE data- Reciver
Le device prend l’etet SE0 pour
10 ms
Assert Signal Ended
Host Device 18
Reciver
RESET (FS)
SE data+ Reciver 0
Rpu
+3.3V
Assert Signal Ended
Reciver
Rpd Rpd 0 SE data- Reciver
Le device prend l’etet SE0 pour
10 ms
Assert Signal Ended
Host Device 18
Reciver
PIPES & ENDPOINTS
USB USB
Softwer Softwer
... ...
IN/OUT
EndPoint 1 EndPoint 1
Pipe 1(IN/OUT)
EndPoint 0 EndPoint 0
Default pipe(IN/OUT)
connection physique
Transmiter/Reciver Transmiter/Reciver 19
Wire
PIPES & ENDPOINTS
USB USB
Data from endpoint 1
Softwer Softwer
Host Device
EndPoint 15 EndPoint 15
Pipe 15(IN/OUT)
... ...
IN/OUT
EndPoint 1 EndPoint 1
Pipe 1(IN/OUT)
EndPoint 0 EndPoint 0
Default pipe(IN/OUT)
Transmiter/Reciver Transmiter/Reciver 19
Wire
PIPES & ENDPOINTS
USB USB
Data from endpoint 1
Softwer Softwer
Host Device
EndPoint 15 EndPoint 15
Pipe 15(IN/OUT)
... ...
IN/OUT
EndPoint 1 EndPoint 1
Pipe 1(IN/OUT)
EndPoint 0 EndPoint 0
Default pipe(IN/OUT)
Transmiter/Reciver Transmiter/Reciver 19
Wire
PIPES & ENDPOINTS
USB USB
Data from endpoint 1
Softwer Softwer
Host Device
EndPoint 15 EndPoint 15
Pipe 15(IN/OUT)
... ...
IN/OUT
EndPoint 1 EndPoint 1
Pipe 1(IN/OUT)
EndPoint 0 EndPoint 0
Default pipe(IN/OUT)
Transmiter/Reciver Transmiter/Reciver 19
Wire
PIPES & ENDPOINTS
(setup
endpoints)
La route
de contrôle
La route en mode
de transfert en bloc
20
(Bulk endpoints)
PACKETS & STRUCTURE
8 LS
32-FS/HS Bits 8 bits 11 bits 5 bits
SYN Synchronisation filed
Start of Frame Packet SYNC PID FRAME CRC EOP
C
PI Packet Identifier
8 bits 7 bits 4 bits 5 bits
D
FRAM
E
CRC Cyclic Redundancy Check
21
PACKETS & STRUCTURE
8 LS
32-FS/HS Bits 8 bits 11 bits 5 bits
SYNC Synchronisation filed
Start of Frame Packet SYNC PID FRAME CRC EOP
PI Packet Identifier
8 bits 7 bits 4 bits 5 bits
D
Token Packet SYNC PID ADDR ENDP CRC EOP FRAM
E
CRC Cyclic Redundancy Check
DATA
PIDType
Type PID Name
PID Name PID[3:0]
PID[3:0] ADD Destination or source Adress
PID
R
OUT / IN 0001 / 1001 ENDP Destination EndPoint
Token
SOF / SETUP 0101 / 1101
21
PACKETS & STRUCTURE
8 LS
32-FS/HS Bits 8 bits 11 bits 5 bits
SYNC Synchronisation filed
Start of Frame Packet SYNC PID FRAME CRC EOP
PI Packet Identifier
8 bits 7 bits 4 bits 5 bits
D
Token Packet SYNC PID ADDR ENDP CRC EOP FRAM
0 to 1024 bytes 16 bits
E
8 bits
CRC Cyclic Redundancy Check
Data Packet SYNC PID DATA CRC EOP
PIDType
Type PID Name
PID Name PID[3:0]
PID[3:0] ADD Destination or source Adress
PID
R
OUT / IN 0001 / 1001 ENDP Destination EndPoint
Token
SOF / SETUP 0101 / 1101
Data DATA0 / DATA1 0011 / 1011
0010 1010 21
ACK / NAK /
Handshake
STALL / NYET 1110 / 0110
EXEMPLE DE PROCESSUS
D'ÉNUMÉRATION
Addressed State
Default State
USB Reset Get Device descriptor USB Reset Set Device Adress
21
EXEMPLE DE PROCESSUS
D'ÉNUMÉRATION
bmRequest
Addressed
Type
bmRequest State wValue wIndex WLenght
21