1 2 3 4 5

F1 Polyfuse
USB_VBUS FUSE_PWR

USB inrush rules limit input capacitance to 10uF max.

C24
+3V3
CLKP Y1 30p
FUSE_PWR U4 JW5211 U7A 24MHz
F1C100s

3
4 3 L1 2u2
VIN SW 2 4

GND
1 5 RESET 70 52 GND GND
EN FB R4 49k9 RESET HOSCO
A 51 A

1
C5 C6 R1 HOSCI
C14 22u SPI_CLK 59 CLKN
2u2 2u2 11k PC0/SPI0_CLK/SDC1_CLK

2
SPI_CS 60 49 UART_RX 30p
PC1/SPI0_CS/SDC1_CMD PE0/CSI_HSYNC/LCD_D0/TWI2_SCK/UART0_RX/EINTE0
SPI_MISO 61 48 UART_TX C25
n.b. Actually 2V6 to make PC2/SPI0_MISO/SDC1_D0 PE1/CSI_VSYNC/LCD_D1/TWI2_SDA/UART0_TX/EINTE1
GND SPI_MOSI 62 47
+2V5 DDR1 and AVCC happy PC3/SPI0_MOSI/UART0_TX PE2/CSI_PCLK/LCD_D8/CLK_OUT/EINTE2
46
PE3/CSI_D0/LCD_D9/DA_BCLK/RSB_SCK/EINTE3
U5 JW5211 6 45
PD0/LCD_D2/TWI0_SDA/RSB_SDA/EINTD0 PE4/CSI_D1/LCD_D16/DA_LRCK/RSB_SDA/EINTE4
FUSE_PWR 4 3 L2 2u2 7 44
VIN SW PD1/LCD_D3/UART1_RTS/EINTD1 PE5/CSI_D2/LCD_D17/DA_IN/EINTE5
GND

1 5 8 43
EN FB R5 36k PD2/LCD_D4/UART1_CTS/EINTD2 PE6/CSI_D3/PWM1/DA_OUT/OWA_OUT/EINTE6
9 42
R2 PD3/LCD_D5/UART1_RX/EINTD3 PE7/CSI_D4/UART2_TX/SPI1_CS/EINTE7
C15 22u 10 41
11k PD4/LCD_D6/UART1_TX/EINTD4 PE8/CSI_D5/UART2_RX/SPI1_MOSI/EINTE8
2

11 40
PD5/LCD_D7/TWI1_SCK/EINTD5 PE9/CSI_D6/UART2_RTS/SPI1_CLK/EINTE9
12 39
PD6/LCD_D10/TWI1_SDA/EINTD6 PE10/CSI_D7/UART2_CTS/SPI1_MISO/EINTE10
GND +1V1 STATUS 13 38 SCL
PD7/LCD_D11/DA_MCLK/EINTD7 PE11/CLK_OUT/TWI0_SCK/IR_RX/EINTE11
14 37 SDA
U6 JW5211 PD8/LCD_D12/DA_BCLK/EINTD8 PE12/DA_MCLK/TWI0_SDA/PWM0/EINTE12
15
FUSE_PWR 4 3 PD9/LCD_D13/DA_LRCK/EINTD9
VIN SW L3 2u2 16 58 JTAG_TMS
GND

1 5 PD10/LCD_D14/DA_IN/EINTD10 PF0/SDC0_D1/DBG_MS/IR_RX/EINTF0
EN FB R6 8k2 17 57 JTAG_TDI
PD11/LCD_D15/DA_OUT/EINTD11 PF1/SDC0_D0/DBG_DI/EINTF1
R3 18 56
C16 22u PD12/LCD_D18/TWI0_SCK/RSB_SCK/EINTD12 PF2/SDC0_CLK/UART0_RX/EINTF2
10k
2

19 55 JTAG_TDO
PD13/LCD_D19/UART2_TX/EINTD13 PF3/SDC0_CMD/DBG_DO/EINTF3
B 21 54 B
PD14/LCD_D20/UART2_RX/EINTD14 PF4/SDC0_D3/UART0_TX/EINTF4
23 53 JTAG_TCK
GND PD15/LCD_D21/UART2_RTS/TWI2_SCK/EINTD15 PF5/SDC0_D2/DBG_CK/PWM1/EINTF5
24
PD16/LCD_D22/UART2_CTS/TWI2_SDA/EINTD16
25 81
PD17/LCD_D23/OWA_OUT/EINTD17 VRA1
26 83
PD18/LCD_CLK/SPI0_CS/EINTD18 VRA2
U7B 27 85
F1C100s +1V1 PD19/LCD_DE/SPI0_MOSI/EINTD19 FMINR
+3V3 28 84
PD20/LCD_HSYNC/SPI0_CLK/EINTD20 FMINL
5 22 29 87
C7 2u2 VCC_IO VDD_CORE C17 100n PD21/LCD_VSYNC/SPI0_MISO/EINTD21 MICIN
20 35 86 GND
C8 100n VCC_IO VDD_CORE C18 100n LINL
50 71 75 88
C9 100n VCC_IO VDD_CORE C19 100n TV_VRN HPR
67 GND 76 1
C10 100n UVCC +2V5 TV_VRP HPL
GND 73 30 77 3
C11 100n TV_VCC VCC_DRAM C20 1u TVIN1 HPCOM
31 78 2 GND
4 VCC_DRAM TVIN0 HPCOMFB
+2V5 HPVCC 32 79
VCC_DRAM LRADC0
80 34 72 66
C13 100n AVCC VCC_DRAM GND C23 1u TVOUT TPX1
36 65
VCC_DRAM R7 TPX2
TVGND

GND USB_DP 69 64
AGND
EPAD

2k2 USB-DP TPY1

33 USB_DN 68 63 GND
SVREF USB-DM TPY2
R8
82
89
74

C 2k2 C
R11 LED +3V3
R D1 +3V3
GND
R9
49k9
Q_NMOS_GSD 3 STATUS
R10
49k9
Q1 1
RESET
2

SW1
SW_Push
+3V3
GND

GND
8

J3
VCC

J1 USB_B SPI_MOSI 5 2 SPI_MISO

SI/IO0 SO/IO1
Conn_02x04_Counter_Clockwise SPI_CLK 6
1 USB_VBUS SCK
UART_TX 1 8 UART_RX VBUS SPI_CS 1 U8
CS
SPI_CS 2 7 SPI_CLK 3 AT25SF081-SSHD-X https://www.thirtythreeforty.net/posts/2019/08/my-business-card-runs-linux
D 3 USB_DP WP/IO2 D
SPI_MISO 3 6 SPI_MOSI D+ +3V3 7 Copyright © 2019 George Hilliard
HOLD/IO3
GND

2 USB_DN
RESET 4 5 D-
GND

Sheet: /
GND
+3V3 R13 File: businesscard.sch
4

3k3
4

SPI_CS Title: George Hilliard's Business Card

GND
Size: USLetter Date: 2019-08-31 Rev: 4
GND KiCad E.D.A. kicad 5.1.4 Id: 1/1
1 2 3 4 5