Quanta ZM8 - R1a

5 4 3 2 1
ZM8/Candy 01
Intel Bay Trail-M Platform Block Diagram
BQ24715 TPS51216
D D
Batery Charger PP1350
EVT
AJSR1YJUT07--CPU(1170P)N2840 2.16G SR1YJ(FCBGA)WINBSQ NB670/NB671 TLV62150ARGTR
PP3300_DSW/PP5000 PP1050_PCH
DDR3L 1333 X1 LANE

ISL95833HRTZ-T TLV62130ARGTR
DDR3L DDI 1 eDP +VCC_CORE/+VCC_GFX PP1000_PCH_S5
Memory down
PAGE 17
2 Channel 1Rx16 32.768KHz
PAGE 6
PAGE 11,12 Discharger
Intel Bay Trail-M
25 Mhz
eMMC PAGE 6
MMC
SDIN8DE2-16G
PAGE 21 Power : SDP 4.5 Watt
C
DDI 0 HDMI Conn PAGE 19 C
Package : FCBGA 1170
Size : 25 x 27 (mm) I2C Interface
SD card SDIO
Port0 Port5
PAGE 16 Track Pad Touch Screen
USB 3.0 Interface
MXT1664S
Port0 PAGE 26 PAGE 17
USB Charger In touch panel PCBA
1.8V BIOS+TXE USB3.0 Port x 1
SPI ROM(64Mb) SPI Interface Port0
TPS2546
W25Q64FWSSIG PAGE 25 PAGE 25
PAGE 6 Int PAGE 2~10 USB 2.0 Interface
Port3 Port2 Port1
I2S+I2C(PORT1)
CCD
IO Board
B PAGE 17 USB Hub B
LPC Interface PCIE Gen 2 x 1 Lane

GL852G-OHG12
Port1 Port0
TPM TI KBC Audio Codec M.2 LGA 1216-S3 NGFF M.2 2230-E
SLB9655TT1.2 TM4E1G31H6ZRB MAX98090
FW4.32GOOG USB Hub -2
Video Codec WLAN / BT Combo
NGFF M.2 3042-B
Package : BGA-157 Package : TQFN-40
PCIE CLK PORT 1 PCIE CLK PORT 0
Size : 9.1 x 9.1 (mm) Size : 5 x 5 (mm)
BOM value option:
PAGE 22 PAGE 27 PAGE 24 PAGE 20 PAGE 20 PAGE 16 LTE CHB@-==>DDR Single channel or dual channel
USB2.0 Port x 1 EDP@ =>4 Lane eDP
Thermal IC Keyboard TS@ =>Touch screen
TMP432A Speaker SX@ => S0IX
PAGE 24 NSX@=> Non S0ix
PAGE 26 PAGE 26 VC@ =>Video codec
A A
MIC SW Combo Jack LTE@ => LTE
TS3A225E Headphone + MIC GD@ =>Google debug
PAGE 24 PAGE 24
CCD Integrated Quanta Computer Inc.

DMIC
PAGE 24 PROJECT : ZM8
Size Document Number Rev
1A
Intel Block Diagram
Date: Thursday, September 25, 2014 Sheet 1 of 39
5 4 3 2 1
5 4 3 2 1
SoC (CPU) ?
M_A_DQ[63:0] 12
12 M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
K45
H47
L41
H44
H50
U16A
DRAM0_MA_00
DRAM0_MA_11
DRAM0_MA_22
DRAM0_MA_33
VLV_M_D
DRAM0_DQ_00
DRAM0_DQ_11
DRAM0_DQ_22
DRAM0_DQ_33
M36
J36
P40
M40
P36
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
2
M_A_A5 G53 DRAM0_MA_44 DRAM0_DQ_44 N36 M_A_DQ5
M_A_A6 H49 DRAM0_MA_55 DRAM0_DQ_55 K40 M_A_DQ6
M_A_A7 D50 DRAM0_MA_66 DRAM0_DQ_66 K42 M_A_DQ7
M_A_A8 G52 DRAM0_MA_77 DRAM0_DQ_77 B32 M_A_DQ8
D M_A_A9 E52 DRAM0_MA_88 DRAM0_DQ_88 C32 M_A_DQ9 D
M_A_A10 K48 DRAM0_MA_99 DRAM0_DQ09_C32 C36 M_A_DQ10
M_A_A11 E51 DRAM0_MA_1010 DRAM0_DQ_1010 A37 M_A_DQ11
M_A_A12 F47 DRAM0_MA_1111 DRAM0_DQ_1111 C33 M_A_DQ12
M_A_A13 J51 DRAM0_MA_1212 DRAM0_DQ_1212 A33 M_A_DQ13
M_A_A14 B49 DRAM0_MA_1313 DRAM0_DQ_1313 C37 M_A_DQ14
M_A_A15 B50 DRAM0_MA_1414 DRAM0_DQ_1414 B38 M_A_DQ15
DRAM0_MA_1515 DRAM0_DQ_1515 F36 M_A_DQ16
M_A_DM0 G36 DRAM0_DQ_1616 G38 M_A_DQ17
12 M_A_DM0 DRAM0_DM_00 DRAM0_DQ_1717
M_A_DM1 B36 F42 M_A_DQ18
M_A_DM2 F38 J42 M_A_DQ19
M_A_DM3 B42 G40 M_A_DQ20
M_A_DM4 P51 C38 M_A_DQ21
M_A_DM5 V42 G44 M_A_DQ22
M_A_DM6 Y50 D42 M_A_DQ23
M_A_DM7 Y52 A41 M_A_DQ24
12 M_A_DM7 DRAM0_DM_77 DRAM0_DQ_2424 C41 M_A_DQ25
M_A_RAS# M45 DRAM0_DQ_2525 A45 M_A_DQ26
12 M_A_RAS# DRAM0_RAS DRAM0_DQ_2626
12 M_A_CAS# M_A_CAS# M44 B46 M_A_DQ27
M_A_WE# H51 DRAM0_CAS DRAM0_DQ_2727 C40 M_A_DQ28
12 M_A_WE# DRAM0_WE DRAM0_DQ_2828 B40 M_A_DQ29
M_A_BS0 K47 DRAM0_DQ_2929 B48 M_A_DQ30
12 M_A_BS0 DRAM0_BS_00 DRAM0_DQ_3030
12 M_A_BS1 M_A_BS1 K44 B47 M_A_DQ31
M_A_BS2 D52 DRAM0_BS_11 DRAM0_DQ_3131 K52 M_A_DQ32
12 M_A_BS2 DRAM0_BS_22 DRAM0_DQ_3232 K51 M_A_DQ33
M_A_CS#0 P44 DRAM0_DQ_3333 T52 M_A_DQ34
12 M_A_CS#0 DRAM0_CS_0 DRAM0_DQ_3434 T51 M_A_DQ35
P45 DRAM0_DQ_3535 L51 M_A_DQ36
DRAM0_CS_2 DRAM0_DQ_3636 L53 M_A_DQ37
DRAM0_DQ_3737 R51 M_A_DQ38
C M_A_CKE0 C47 DRAM0_DQ_3838 R53 M_A_DQ39 C
12 M_A_CKE0 DRAM0_CKE_00 DRAM0_DQ_3939
D48 T47 M_A_DQ40
F44 RESERVED_D48 DRAM0_DQ_4040 T45 M_A_DQ41
E46 DRAM0_CKE_22 DRAM0_DQ_4141 Y40 M_A_DQ42
RESERVED_E46 DRAM0_DQ_4242 V41 M_A_DQ43
M_A_ODT0 T41 DRAM0_DQ_4343 T48 M_A_DQ44
12 M_A_ODT0 DRAM0_ODT_0 DRAM0_DQ_4444 T50 M_A_DQ45
P42 DRAM0_DQ_4545 Y42 M_A_DQ46
DRAM0_ODT_2 DRAM0_DQ_4646 AB40 M_A_DQ47
DRAM0_DQ_4747 V45 M_A_DQ48
M_A_CLKP0 M50 DRAM0_DQ_4848 V47 M_A_DQ49
12 M_A_CLKP0 DRAM0_CKP_0 DRAM0_DQ_4949
12 M_A_CLKN0 M_A_CLKN0 M48 AD48 M_A_DQ50
DRAM0_CKN_0 DRAM0_DQ_5050 AD50 M_A_DQ51
P50 DRAM0_DQ_5252 V50 M_A_DQ53
P48 DRAM0_CKP_2 DRAM0_DQ_5353 AB44 M_A_DQ54
DRAM0_CKN_2 DRAM0_DQ_5454 Y45 M_A_DQ55
DRAM0_DQ_5656 W51 M_A_DQ57
M_A_DRAMRST# P41 DRAM0_DQ_5757 AC53 M_A_DQ58
12 M_A_DRAMRST# DRAM0_DRAMRST DRAM0_DQ_5858 AC51 M_A_DQ59
DRAM0_DQ_5959 W53 M_A_DQ60
DRAM0_DQ_6060 Y51 M_A_DQ61
CPU_VREF AF44 DRAM0_DQ_6161 AD52 M_A_DQ62
DRAM_VREF DRAM0_DQ_6262 AD51 M_A_DQ63
DRAM0_DQ_6363
PP1350 J38 M_A_DQSP0
DRAM0_DQSP_00 M_A_DQSP0 12
GND R36 100K/F_4 ICLK_DRAM_TERMN_0 AH42 K38 M_A_DQSN0
ICLK_DRAM_TERMN DRAM0_DQSN_00 M_A_DQSN0 12
R37 100K/F_4 ICLK_DRAM_TERMN_1 AF42 C35 M_A_DQSP1
ICLK_DRAM_TERMN_AF42 DRAM0_DQSP_11 M_A_DQSP1 12
B34 M_A_DQSN1
B DRAM0_DQSN_11 M_A_DQSN1 12 B
R348 D40 M_A_DQSP2
4.7K/F_4 SOC_DRAM_PWROK AD42 +1.35V_SUS F40 M_A_DQSN2
DRAM_VDD_S4_PWROK DRAM0_DQSN_22 M_A_DQSN2 12
SOC_VCCA_PWROK AB42 +1.35V_SUS B44 M_A_DQSP3
DRAM_CORE_PWROK DRAM0_DQSP_33 M_A_DQSP3 12
C43 M_A_DQSN3
DRAM0_DQSN_33 M_A_DQSN3 12
CPU_VREF N53 M_A_DQSP4
R48 23.2/F_4 DRAM_RCOMP0 AD44 M52 M_A_DQSN4
DRAM_RCOMP_00 DRAM0_DQSN_44 M_A_DQSN4 12
GND R45 29.4/F_4 DRAM_RCOMP1 AF45 T42 M_A_DQSP5
DRAM_RCOMP_11 DRAM0_DQSP_55 M_A_DQSP5 12
R349 C217 R44 162/F_4 DRAM_RCOMP2 AD45 T44 M_A_DQSN5
DRAM_RCOMP_22 DRAM0_DQSN_55 M_A_DQSN5 12
4.7K/F_4 Y47 M_A_DQSP6
0.1U/10V_4 Y48 M_A_DQSN6
DRAM0_DQSN_66 M_A_DQSN6 12
AF40 AB52 M_A_DQSP7
RESERVED_AF40 DRAM0_DQSP_77 M_A_DQSP7 12
AF41 AA51 M_A_DQSN7
RESERVED_AF41 DRAM0_DQSN_77 M_A_DQSN7 12
AD40
GND GND AD41 RESERVED_AD40
RESERVED_AD41
1 OF 13
VLV_M_D/BGA ph
?
REV = 1.15
PP1350
PP3300_PCH_S5
PP1350
PP3300_PCH_S5
R180
R204 10K_4
4.7K_4 R174
R196 10K_4
4.7K_4
DRAM_PWROK R163 0_4 SOC_DRAM_PWROK
DRM_PWOK_C1
A SOC_VCCA_PWROK A
3
C94 DRM_PWOK_C2
SLP_S4# 5 2
6,11,14,17 SLP_S4#
3
6
1u/10V_4 C42
Q24A Q24B EC_PWROK 5 2
27 EC_PWROK
4
PJ4N3KDW PJ4N3KDW *0.1U/10V_4

Q26A Q26B
Quanta Computer Inc.
4
GND PJ4N3KDW 1 PJ4N3KDW
GND
GND R179 0_4 PP1350_PGOOD 31
PROJECT : ZM8
GND 1A
Valley 1/9 (DDRA)
5 4 3 2 1
5 4 3 2 1
SoC (CPU)
13 M_B_A[15:0]
M_B_A0 AY45
U16B
?
VLV_M_D
BG38 M_B_DQ0
M_B_DQ[63:0] 13
3
M_B_A1 BB47 DRAM1_MA_00 DRAM1_DQ_00 BC40 M_B_DQ1
M_B_A2 AW41 DRAM1_MA_11 DRAM1_DQ_11 BA42 M_B_DQ2
M_B_A3 BB44 DRAM1_MA_22 DRAM1_DQ_22 BD42 M_B_DQ3
M_B_A4 BB50 DRAM1_MA_33 DRAM1_DQ_33 BC38 M_B_DQ4
D M_B_A5 BC53 DRAM1_MA_44 DRAM1_DQ_44 BD36 M_B_DQ5 D
M_B_A6 BB49 DRAM1_MA_55 DRAM1_DQ_55 BF42 M_B_DQ6
M_B_A7 BF50 DRAM1_MA_66 DRAM1_DQ_66 BC44 M_B_DQ7
M_B_A8 BC52 DRAM1_MA_77 DRAM1_DQ_77 BH32 M_B_DQ8
M_B_A9 BE52 DRAM1_MA_88 DRAM1_DQ_88 BG32 M_B_DQ9
M_B_A10 AY48 DRAM1_MA_99 DRAM1_DQ_99 BG36 M_B_DQ10
M_B_A11 BE51 DRAM1_MA_1010 DRAM1_DQ_1010 BJ37 M_B_DQ11
M_B_A12 BD47 DRAM1_MA_1111 DRAM1_DQ_1111 BG33 M_B_DQ12
M_B_A13 BA51 DRAM1_MA_1212 DRAM1_DQ_1212 BJ33 M_B_DQ13
M_B_A14 BH49 DRAM1_MA_1313 DRAM1_DQ_1313 BG37 M_B_DQ14
M_B_A15 BH50 DRAM1_MA_1414 DRAM1_DQ_1414 BH38 M_B_DQ15
DRAM1_MA_1515 DRAM1_DQ_1515 AU36 M_B_DQ16
M_B_DM0 BD38 DRAM1_DQ_1616 AT36 M_B_DQ17
13 M_B_DM0 DRAM1_DM_00 DRAM1_DQ_1717
M_B_DM1 BH36 AV40 M_B_DQ18
M_B_DM2 BC36 AT40 M_B_DQ19
M_B_DM3 BH42 BA36 M_B_DQ20
M_B_DM4 AT51 AV36 M_B_DQ21
M_B_DM5 AM42 AY42 M_B_DQ22
M_B_DM6 AK50 AY40 M_B_DQ23
M_B_DM7 AK52 BJ41 M_B_DQ24
13 M_B_DM7 DRAM1_DM_77 DRAM1_DQ_2424 BG41 M_B_DQ25
M_B_RAS# AV45 DRAM1_DQ_2525 BJ45 M_B_DQ26
13 M_B_RAS# DRAM1_RAS DRAM1_DQ_2626
13 M_B_CAS# M_B_CAS# AV44 BH46 M_B_DQ27
M_B_WE# BB51 DRAM1_CAS DRAM1_DQ_2727 BG40 M_B_DQ28
13 M_B_WE# DRAM1_WE DRAM1_DQ_2828 BH40 M_B_DQ29
M_B_BS0 AY47 DRAM1_DQ_2929 BH48 M_B_DQ30
13 M_B_BS0 DRAM1_BS_00 DRAM1_DQ_3030
13 M_B_BS1 M_B_BS1 AY44 BH47 M_B_DQ31
M_B_BS2 BF52 DRAM1_BS_11 DRAM1_DQ_3131 AY52 M_B_DQ32
13 M_B_BS2 DRAM1_BS_22 DRAM1_DQ_3232 AY51 M_B_DQ33
M_B_CS#0 AT44 DRAM1_DQ_3333 AP52 M_B_DQ34
13 M_B_CS#0 DRAM1_CS_0 DRAM1_DQ_3434
C AP51 M_B_DQ35 C
AT45 DRAM1_DQ_3535 AW51 M_B_DQ36
DRAM1_CS_2 DRAM1_DQ_3636 AW53 M_B_DQ37
DRAM1_DQ_3737 AR51 M_B_DQ38
M_B_CKE0 BG47 DRAM1_DQ_3838 AR53 M_B_DQ39
13 M_B_CKE0 DRAM1_CKE_00 DRAM1_DQ_3939
BE46 AP47 M_B_DQ40
BD44 RESERVED_BE46 DRAM1_DQ_4040 AP45 M_B_DQ41
BF48 DRAM1_CKE_22 DRAM1_DQ_4141 AK40 M_B_DQ42
RESERVED_BF48 DRAM1_DQ_4242 AM41 M_B_DQ43
M_B_ODT0 AP41 DRAM1_DQ_4343 AP48 M_B_DQ44
13 M_B_ODT0 DRAM1_ODT_0 DRAM1_DQ_4444 AP50 M_B_DQ45
AT42 DRAM1_DQ_4545 AK42 M_B_DQ46
DRAM1_ODT_2 DRAM1_DQ_4646 AH40 M_B_DQ47
DRAM1_DQ_4747 AM45 M_B_DQ48
M_B_CLKP0 AV50 DRAM1_DQ_4848 AM47 M_B_DQ49
13 M_B_CLKP0 DRAM1_CKP_0 DRAM1_DQ_4949
13 M_B_CLKN0 M_B_CLKN0 AV48 AF48 M_B_DQ50
DRAM1_CKN_0 DRAM1_DQ_5050 AF50 M_B_DQ51
AT50 DRAM1_DQ_5353 AH44 M_B_DQ54
AT48 DRAM1_CKP_2 DRAM1_DQ_5454 AK45 M_B_DQ55
DRAM1_CKN_2 DRAM1_DQ_5555 AM52 M_B_DQ56
DRAM1_DQ_5656 AL51 M_B_DQ57
DRAM1_DQ_5757 AG53 M_B_DQ58
M_B_DRAMRST# AT41 DRAM1_DQ_5858 AG51 M_B_DQ59
13 M_B_DRAMRST# DRAM1_DRAMRST DRAM1_DQ_5959 AL53 M_B_DQ60
DRAM1_DQ_6060 AK51 M_B_DQ61
DRAM1_DQ_6161 AF52 M_B_DQ62
DRAM1_DQ_6262 AF51 M_B_DQ63
DRAM1_DQ_6363
B BF40 M_B_DQSP0 B
DRAM1_DQSP_00 M_B_DQSP0 13
BD40 M_B_DQSN0
DRAM1_DQSN_00 M_B_DQSN0 13
BG35 M_B_DQSP1
BH34 M_B_DQSN1
BA38 M_B_DQSP2
AY38 M_B_DQSN2
BH44 M_B_DQSP3
BG43 M_B_DQSN3
AU53 M_B_DQSP4
AV52 M_B_DQSN4
AP42 M_B_DQSP5
AP44 M_B_DQSN5
AK47 M_B_DQSP6
AK48 M_B_DQSN6
AH52 M_B_DQSP7
AJ51 M_B_DQSN7
2 OF 13
VLV_M_D/BGA
REV = 1.15 ?
A A

PROJECT : ZM8
1A
Valley 2/9 (DDRB)
5 4 3 2 1
5 4 3 2 1
SoC (CPU)
19 INT_HDMITX2P
INT_HDMITX2P
INT_HDMITX2N
AV3
AV2
U16C
DDI0_TXP_0 +1.0V_SX
+1.0V_SX
?
VLV_M_D
DDI1_TXP_0
AG3
AG1
EDP_TXP0
EDP_TXN0
EDP_TXP0 17
PP1800_PCH
4
19 INT_HDMITX2N DDI0_TXN_0 DDI1_TXN_0 EDP_TXN0 17
INT_HDMITX1P AT2 +1.0V_SX AF3 EDP_TXP1 TP26
19 INT_HDMITX1P DDI0_TXP_1 DDI1_TXP_1
INT_HDMITX1N AT3 +1.0V_SX AF2 EDP_TXN1 TP30
19 INT_HDMITX1N DDI0_TXN_1 DDI1_TXN_1
INT_HDMITX0P AR3 +1.0V_SX AD3 EDP_TXP2 TP32
D 19 INT_HDMITX0P DDI0_TXP_2 DDI1_TXP_2 D
INT_HDMITX0N AR1 +1.0V_SX AD2 EDP_TXN2 TP27 R46
19 INT_HDMITX0N DDI0_TXN_2 DDI1_TXN_2
INT_HDMICLK+ AP3 +1.0V_SX AC3 EDP_TXP3 TP36 10K_4
19 INT_HDMICLK+ DDI0_TXP_3 DDI1_TXP_3
INT_HDMICLK- AP2 +1.0V_SX AC1 EDP_TXN3 TP37
19 INT_HDMICLK- DDI0_TXN_3 DDI1_TXN_3
AL3 +1.0V_SX +1.0V_SX AK3 EDP_AUXP EDP_AUXP 17 EDP_HPD_L
AL1 DDI0_AUXP DDI1_AUXP AK2 EDP_AUXN
DDI0_AUXN +1.0V_SX +1.0V_SX DDI1_AUXN EDP_AUXN 17
3
INT_HDMI_HPD D27 +1.8V +1.8V K30 EDP_HPD_L HPD output high
19 INT_HDMI_HPD DDI0_HPD DDI1_HPD
HDMI_DDCDATA_SW C26 P30 DDI1_DDCDATA
SOC active Low 2 EDP_HPD
19 HDMI_DDCDATA_SW DDI0_DDCDATA +1.8V +1.8V DDI1_DDCDATA EDP_HPD 17
HDMI_DDCCLK_SW C28 +1.8V +1.8V G30 Q5
19 HDMI_DDCCLK_SW DDI0_DDCCLK DDI1_DDCCLK 2N7002K
B28 +1.8V +1.8V N30 SOC_DISP_ON_C
DDI0_VDDEN DDI1_VDDEN SOC_DISP_ON_C 15
C27 +1.8V +1.8V J30 SOC_EDP_BLON_C R52
SOC_EDP_BLON_C 15
1
B26 DDI0_BKLTEN DDI1_BKLTEN M30 SOC_DPST_PWM_C 100K/F_4
DDI0_BKLTCTL +1.8V +1.8V DDI1_BKLTCTL SOC_DPST_PWM_C 15
R437
402/F_4 SOC_DDIO_RCOMP AK13 AH14
SOC_DDIO_RCOMP_P AK12 DDI0_RCOMP RESERVED_AH14 AH13 GND GND
AM14 DDI0_RCOMP_P RESERVED_AH13 AF14
AM13 RESERVED_AM14 RESERVED_AF14 AF13
R166 0_4 SOC_PIN_AM3 AM3 RESERVED_AM13 RESERVED_AF13 AH3 SOC_PIN_AH3 R454 0_4
R165 0_4 SOC_PIN_AM2 AM2 VSS_AM3 VSS_AH3 AH2 SOC_PIN_AH2 R460 0_4
VSS_AM2 VSS_AH2
BA3 CRT_R TP25
GND VGA_RED AY2 CRT_B GND
VGA_BLUE TP35
BA1 CRT_G TP28
VGA_GREEN AW1 SOC_VGA_IREF
VGA_IREF TP29
AY3 SOC_VGA_IRTN TP33
VGA_IRTN
C BD2 CRT_HSYNC C
VGA_HSYNC TP71
BF2 CRT_VSYNC TP70
VGA_VSYNC
BC1 VGA_DDCCLK R181 0_4
VGA_DDCCLK BC2 VGA_DDCDATA R182 0_4
VGA_DDCDATA
T2 T7
T3 RESERVED_T2 RESERVED_T7 T9
AB3 RESERVED_T3 RESERVED_T9 AB13
AB2 RESERVED_AB3 RESERVED_AB13 AB12
Y3 RESERVED_AB2 RESERVED_AB12 Y12
Y2 RESERVED_Y3 RESERVED_Y12 Y13
W3 RESERVED_Y2 RESERVED_Y13 V10
W1 RESERVED_W3 RESERVED_V10 V9
V2 RESERVED_W1 RESERVED_V9 T12
V3 RESERVED_V2 RESERVED_T12 T10
R3 RESERVED_V3 RESERVED_T10 V14
R1 RESERVED_R3 RESERVED_V14 V13
AD6 RESERVED_R1 RESERVED_V13 T14
AD4 RESERVED_AD6 RESERVED_T14 T13
AB9 RESERVED_AD4 RESERVED_T13 T6
AB7 RESERVED_AB9 RESERVED_T6 T4
Y4 RESERVED_AB7 RESERVED_T4 P14
Y6 RESERVED_Y4 RESERVED_P14
V4 RESERVED_Y6
V6 RESERVED_V4 K34 XDP_GPIO_S0_NC19
RESERVED_V6 RESERVED_K34 XDP_GPIO_S0_NC19 11
GPIO_NC13 A29 D32
GPIO_NC14 C29 GPIO_S0_NC13 GPIO_S0_NC26 N32
TP10 GPIO_S0_NC14_C29 GPIO_S0_NC25
AB14 J34
INTD_DSI_TE B30 RESERVED_AB14 GPIO_S0_NC24 K28 XDP_GPIO_S0_NC23
B
TP9 GPIO_S0_NC12 GPIO_S0_NC23 XDP_GPIO_S0_NC23 11 B
C30 F28 XDP_GPIO_S0_NC22
RESERVED_C30 GPIO_S0_NC22 XDP_GPIO_S0_NC22 11
F32 XDP_GPIO_S0_NC21
GPIO_S0_NC21 XDP_GPIO_S0_NC21 11
D34 XDP_GPIO_S0_NC20
J28 XDP_GPIO_S0_NC18
D28 XDP_GPIO_S0_NC17
M32 XDP_GPIO_S0_NC16
F34 XDP_GPIO_S0_NC15
3 OF 13
VLV_M_D/BGA
REV = 1.15 ?
BTM Strapping Table
Pin Name Strap description Sampled Configuration Note
0 = Top address bit is inverted 7 GPIO_S0_SC_56 GPIO_S0_SC_56
GPIO_SO_SC_56 Top Swap (A16 Override) PWROK R438 *10K_4 R429 *10K_4
1 = Top address bit is unchanged PP1800_PCH GND
0 = LPC 5 I2S_LRCLK I2S_LRCLK

LPE_I2S2_FRM BIOS Boot Selection PWROK
1 = SPI PP1800_PCH R364 10K_4 R361 *10K_4 GND
0 = Override 5 I2S_DOUT I2S_DOUT
3
GPIO_SO_SC_65 Security Flash Descriptors PWROK Q11
1 = Normal operation
R58 0_4 SOC_OVERRIDE_NM 2
27 SOC_OVERRIDE#
2N7002K
A A
GND
1
0 = DDI0 not detected
DDI0_DDCDATA DDI0 Detect PWROK Pull up +1.8V at HDMI side
1 = DDI0 detected HDMI_DDCDATA_SW R85 *10K_4 GND
0 = DDI0 not detected DDI1_DDCDATA

DDI1_DDCDATA DDI1 Detect PWROK Quanta Computer Inc.
1 = DDI0 detected PP1800_PCH R376 2.2K_4 R378 *10K_4 GND
GPIO_NC13 PROJECT : ZM8
GPIO_SO_NC_13 Size Document Number Rev
R75 *10K_4 R80 10K_4 1A
PP1800_PCH GND Valley 3/9 (Display)
5 4 3 2 1
5 4 3 2 1
SoC (CPU)
5
PP1800_PCH
R188 *10K_4 SATA_DEVSLP_C
?
R159 *10K_4 SATA_LED_R_N U16D
VLV_M_D
TP63 SATA_TXP0_SSD BF6 AY7 PCIE_TX0+_WLAN_C C321 0.1U/10V_4
SATA_TXP_0 PCIE_TXP_0 PCIE_TX0+_WLAN 20
TP64 SATA_TXN0_SSD BG7 AY6 PCIE_TX0-_WLAN_C C318 0.1U/10V_4
SATA_TXN_0 PCIE_TXN_0 PCIE_TX0-_WLAN 20
TP60 SATA_RXP0_SSD AU16 AT14 PCIE_RX0+_WLAN
D SATA_RXP_0 PCIE_RXP_0 PCIE_RX0+_WLAN 20 D
TP62 SATA_RXN0_SSD AV16 AT13 PCIE_RX0-_WLAN
SATA_RXN_0 PCIE_RXN_0 PCIE_RX0-_WLAN 20
BD10 AV6 PCIE_TX1+_IMAGE_C C306 0.1U/10V_4
SATA_TXP1 PCIE_TXP_1 PCIE_TX1+_IMAGE 20
BF10 AV4 PCIE_TX1-_IMAGE_C C310 0.1U/10V_4
SATA_TXN_1 PCIE_TXN_1 PCIE_TX1-_IMAGE 20
AY16 AT10 PCIE_RX1+_IMAGE
SATA_RXP_1 PCIE_RXP_1 PCIE_RX1+_IMAGE 20
BA16 AT9 PCIE_RX1-_IMAGE
SATA_RXN_1 PCIE_RXN_1 PCIE_RX1-_IMAGE 20
GND R447 0_4 ICLK_SATA_TERMP BB10 AT7

R436 0_4 ICLK_SATA_TERMN BC10 ICLK_SATA_TERMP PCIE_TXP_2 AT6
ICLK_SATA_TERMN PCIE_TXN_2
14 SOC_KBC_SCI R187 0_4 SATA_GP0 BA12 +1.8V AP12

SATA_DEVSLP_C AY14 SATA_GP0 PCIE_RXP_2 AP10
SATA_GP1 +1.8V PCIE_RXN_2
SATA_LED_R_N AY12 +1.8V
SATA_LED AP6
SATA_RCOMP_DP AU18 PCIE_TXP_3 AP4
SATA_RCOMP_P_AU18 +1.0V PCIE_TXN_3
SATA_RCOMP_DN AT18 +1.0V
SATA_RCOMP_N_AT18 AP9 PP1800_PCH
R404 PCIE_RXP_3 AP7
EMMC_CLK AT22 PCIE_RXN_3
21 EMMC_CLK MMC1_CLK
402/F_4 BB7 VSS_BB7 R466 0_4 PCIE_CLKREQ_IMAGE# R147 10K_4
EMMC_D0 AV20 VSS_BB7 BB5 VSS_BB5 R465 0_4 PCIE_CLKREQ_WLAN# R176 10K_4
21 EMMC_D0 MMC1_D0 VSS_BB5
21 EMMC_D1 EMMC_D1 AU22 I2S_DOUT R68 *10K_4
EMMC_D2 AV22 MMC1_D1 BG3 PCIE_CLKREQ_WLAN# GND
21 EMMC_D2 MMC1_D2 +1.8V PCIE_CLKREQ_0 PCIE_CLKREQ_WLAN# 20
21 EMMC_D3 EMMC_D3 AT20 +1.8V BD7 PCIE_CLKREQ_IMAGE#
MMC1_D3 PCIE_CLKREQ_1 PCIE_CLKREQ_IMAGE# 20
21 EMMC_D4 EMMC_D4 AY24 +1.8V BG5 PCIE_CLKREQ_LAN# TP31
EMMC_D5 AU26 MMC1_D4 PCIE_CLKREQ_2 BE3 PCIE_CLKREQ3#
21 EMMC_D5 MMC1_D5 +1.8V PCIE_CLKREQ_3 TP34
21 EMMC_D6 EMMC_D6 AT26 +1.8V BD5 SD3_WP SD3_WP 16
EMMC_D7 AU20 MMC1_D6 SD3_WP_BD5
21 EMMC_D7 MMC1_D7 AP14 SOC_PCIE_COMP
C EMMC_CMD AV26 PCIE_RCOMP_P_AP14_AP14 AP13 SOC_PCIE_COMN C
21 EMMC_CMD MMC1_CMD PCIE_RCOMP_N_AP13_AP13
EMMC_RST# BA24 +1.8V R426
21 EMMC_RST# MMC1_RST BB4 402/F_4
R412 49.9/F_4 EMMC_RCOMP AY18 RESERVED_BB4 BB3
MMC1_RCOMP RESERVED_BB3 AV10
RESERVED_AV10 AV9
BA18 RESERVED_AV9
GND AY20 SD2_CLK
BD20 SD2_D0 BF20 HDA_RCOMP R401 49.9/F_4
SD2_D1 HDA_LPE_RCOMP GND
BA20 +1.8V/1.5V BG22 ACZ_RST# TP11
SD3_CLK BD18 SD2_D2 HDA_RST BH20 ACZ_SYNC
SD2_D3_CD +1.8V/1.5V HDA_SYNC TP20
BC18 +1.8V/1.5V BJ21 ACZ_BCLK TP15
SD2_CMD HDA_CLK BG20 ACZ_SDOUT
+1.8V/1.5V HDA_SDO TP16
C284 +1.8V/1.5V BG19 PCH_AZ_CODEC_SDIN0 TP21
*33P/50V_4 HDA_SDI0 BG21
+1.8V/1.5V HDA_SDI1
SD3_CLK AY26 BH18 DET_TRIGGER
16 SD3_CLK
SD3_D0 AT28 SD3_CLK +1.8V/+3.3V +1.8V/1.5V HDA_DOCKRST
BG18 HDA_DOCKEN# R105 0_4
DET_TRIGGER 24 0 = LPC
16 SD3_D0 SD3_D0 +1.8V/+3.3V +1.8V/1.5V HDA_DOCKEN AJACK_MICPRES_L 24
16 SD3_D1 SD3_D1 BD26
SD3_D1 +1.8V/+3.3V
1 = SPI
SD3_D2 AU28 BF28 I2S_BCLK R373 0_4 I2S_LRCLK
16 SD3_D2
SD3_D3 BA26 SD3_D2 +1.8V/+3.3V LPE_I2S2_CLK BA30 I2S_LRCLK R363 0_4
I2S_BCLK_R 24
I2S_DOUT
I2S_LRCLK 4
16 SD3_D3
SD3_CD# BC24 SD3_D3 +1.8V/+3.3V LPE_I2S2_FRM BC30 I2S_DOUT R366 0_4
I2S_LRCLK_R 24 I2S_DOUT 4
16,18 SD3_CD#
SD3_CMD AV28 SD3_CD# +1.8V +1.8V LPE_I2S2_DATAOUT BD28 I2S_DIN R372 0_4
I2S_DOUT_R 24
16 SD3_CMD SD3_CMD +1.8V/+3.3V LPE_I2S2_DATAIN I2S_DIN_R 24 Security Flash Descriptors
TP55 SDMMC3_1P8_EN BF22 +1.8V
SDIO3_PWR_EN# BD22 SD3_1P8EN P34
0 = Override
16 SDIO3_PWR_EN# SD3_PWREN +1.8V RESERVED_P34 N34 1 = Normal Operation
R392 49.9/F_4 SDIO3_RCOMP BF26 RESERVED_N34
SD3_RCOMP AK9
RESERVED_AK9 AK7 R100 71.5/F_4
RESERVED_AK7 PP1000_PCH
+1.0V C24 SOC_PROCHOT# R108 0_4 H_PROCHOT#

B PROCHOT H_PROCHOT# 18,27,33 B
R421 0_4
IMVP7_PROCHOT# 28
R60 *0_4
4 OF 13 ALERT# 23
GND
VLV_M_D/BGA
REV = 1.15 ? C62
0.1U/10V_4
GND
A A

PROJECT : ZM8
1A
Valley 4/9 (SD/PCIE/SATA)
5 4 3 2 1
5 4 3 2 1
SoC (CPU) U16E

?
PP1800_PCH_S5
6
VLV_M_D
XTAL25_IN AH12 +1.8V AU34 ALS_INT#
XTAL25_OUT AH10 ICLK_OSCIN SIO_UART1_RXD AV34 PMC_SUSPWRDNACK R410 10K_4
ICLK_OSCOUT +1.8V SIO_UART1_TXD
C96 12P/50V_4 +1.8V BA34 TOUCH_INT_L_DX TOUCH_INT_L_DX 15 SOC_PMC_WAKE# R414 10K_4
AD9 SIO_UART1_RTS AY34 ACPRESENT R387 2.2K_4
RESERVED_AD9 +1.8V SIO_UART1_CTS
XTAL25_OUT PMC_BATLOW# R388 10K_4
R443 4.02K/F_4 ICLK_ICOMP AD14 +1.8V BF34 SIO_UART2_RXD TP46
ICLK_ICOMP SIO_UART2_RXD
2
GND 1 R452 47.5/F_4 ICLK_RCOMP AD13 +1.8V BD34 SIO_UART2_TXD TP49
PP1800_PCH
Y2 R164 ICLK_RCOMP SIO_UART2_TXD BD32
+1.8V SIO_UART2_RTS
AD10 +1.8V BF32 SOC_REST_BTN# R153 10K_4
25MHZ +-10PPM 1M_4 GND AD12 RESERVED_AD10 SIO_UART2_CTS TOUCH_INT_L_DX R358 10K_4
D RESERVED_AD12 ALS_INT# R524 10K_4 D
4
3
XTAL25_IN CLK_PCIE_WLANN AF6

20 CLK_PCIE_WLANN PCIE_CLKN_00
CLK_PCIE_WLANP AF4 +1.8V_S5 PMC_SUSPWRDNACK D26 PMC_SUSPWRDNACK O_1.8VA
20 CLK_PCIE_WLANP PCIE_CLKP_00 PMC_SUSPWRDNACK 14
GND C97 12P/50V_4 +1.8V_S5 G24 PMC_SUSCLK0
PMC_SUSCLK0_G24 PMC_SUSCLK0 15
CLK_PCIE_IMAGEN AF9 +1.8V_S5 F18 SLP_S0IX#
20 CLK_PCIE_IMAGEN PCIE_CLKN_11 PMC_SLP_S0IX SLP_S0IX# 14
CLK_PCIE_IMAGEP AF7 +1.8V_S5 F22 SLP_S4#
20 CLK_PCIE_IMAGEP PCIE_CLKP_11 PMC_SLP_S4 SLP_S4# 2,11,14,17
+1.8V_S5 D22 SLP_S3#
PMC_SLP_S3 SLP_S3# 11,14
J20
AK4 GPIO_S514_J20 D20 ACPRESENT
PCIE_CLKN_22 +1.8V_S5 PMC_ACPRESENT ACPRESENT 15
AK6 +1.8V_S5 PMC_WAKE_PCIE_0 F26 SOC_PMC_WAKE#
PCIE_CLKP_22 SOC_PMC_WAKE# 15
+1.8V_S5 K26 PMC_BATLOW#
AM4 PMC_BATLOW J26 SOC_PWRBTN#
PCIE_CLKN_33 +1.8V_S5 PMC_PWRBTN SOC_PWRBTN# 11,14
AM6 +1.8V BG9 SOC_REST_BTN#
PCIE_CLKP_33 PMC_RSTBTN SOC_REST_BTN# 11,18
+1.8V_S5 F20 SOC_PLTRST#
PMC_PLTRST SOC_PLTRST# 11,14
AM10 J24
AM9 RESERVED_AM10 GPIO_S517_J24 G18 PMC_SUS_STAT# SUS STAT OUTPUT PORT
RESERVED_AM9 +1.8V_S5 PMC_SUS_STAT PMC_SUS_STAT# 14
CORE_PWROK C311 0.1U/10V_4 GND
+3V_RTC C11 SOC_RTEST# SOC_RTEST# 11

I2S_MCLK BH7 ILB_RTC_TEST
24 I2S_MCLK PMC_PLT_CLK_00 +1.8V
BH5 +1.8V
BH4 PMC_PLT_CLK_11
PP1800_PCH PMC_PLT_CLK_22 +1.8V
BH8 +1.8V +3V_RTC B10 SOC_RSMRST#
PMC_PLT_CLK_33 PMC_RSMRST SOC_RSMRST# 11,14
BH6 +1.8V +3V_RTC B7 CORE_PWROK R457 0_4
PMC_PLT_CLK_44 PMC_CORE_PWROK CORE_PWROK_R 11,27
R154 10K_4 KBD_IRQ# 27 KBD_IRQ# KBD_IRQ# BJ9 +1.8V
SRT_CRST# C12 PMC_PLT_CLK_55 PP1000_PCH
11 SRT_CRST# ILB_RTC_RST C9 RTC_X1
XDP_H_TCK D14 ILB_RTC_X1 A9 RTC_X2
11 XDP_H_TCK TAP_TCK +1.8V_S5 ILB_RTC_X2
XDP_H_TRST# G12 +1.8V_S5 B8 BRTC_EXTPAD C95 0.1U/10V_4 GND
C 11 XDP_H_TRST# TAP_TRST ILB_RTC_EXTPAD C
11 XDP_H_TMS XDP_H_TMS F14 +1.8V_S5
XDP_H_TDI F12 TAP_TMS DATA, CLK CLOSE TO VR
PP1800_PCH_S5 11 XDP_H_TDI TAP_TDI +1.8V_S5
XDP_H_TDO G16 +1.8V_S5 R79 R93 R91
11 XDP_H_TDO TAP_TDO
XDP_H_PRDY# D18 +1.8V_S5 SPEC 512177 INPUT PORT 73.2/F_4 73.2/F_4 73.2/F_4
11 XDP_H_PRDY# TAP_PRDY
11 XDP_H_PREQ#_C XDP_H_PREQ#_C F16 +1.8V_S5 +1.0V B24 SVID_ALERT#_SOC R99 20/F_4 VR_SVID_ALERT#
TAP_PREQ SVID_ALERT VR_SVID_ALERT# 33
AT34 +1.0V A25 SVID_DATA_SOC R94 16.9/F_4 VR_SVID_DATA ALERT Close to SOC
RESERVED SVID_DATA VR_SVID_DATA 33
+1.0V C25 SVID_CLK_SOC R88 0_4 VR_SVID_CLK VR_SVID_DATA
SVID_CLK VR_SVID_CLK 33
SOC_SPI_CS# C23 +1.8V_S5 VR_SVID_ALERT#
C21 PCU_SPI_CS_00 VR_SVID_CLK
PCU_SPI_CS_11 +1.8V_S5
R116 *10K_4 SOC_JTAG2_TDO SOC_SPI_MISO B22 +1.8V_S5 AU32
R107 10K_4 PCH_WAKE# SOC_SPI_MOSI A21 PCU_SPI_MISO SIO_PWM_00 AT32 SIO_PWM1
PCU_SPI_MOSI +1.8V_S5 SIO_PWM_11 TP48
R121 10K_4 TRACKPAD_INT# SOC_SPI_CLK C22 +1.8V_S5 SOC_REST_BTN# R137 0_4
PCU_SPI_CLK EC_REST_L 27
R120 10K_4 TOUCH_INT#
R106 0_4 PCH_WAKE# B18 +1.8V_S5

27 PCH_WAKE_L GPIO_S5_0
TRACKPAD_INT# B16 +1.8V_S5 +1.8V_S5 K24 XDP_GPIO_DFX0
26 TRACKPAD_INT# GPIO_S5_1 GPIO_S5_22 XDP_GPIO_DFX0 11
TOUCH_INT# C18 +1.8V_S5 +1.8V_S5 N24 XDP_GPIO_DFX1
15 TOUCH_INT# GPIO_S5_2 GPIO_S5_23 XDP_GPIO_DFX1 11
LTE_WAKE# A17 +1.8V_S5 +1.8V_S5 M20 XDP_GPIO_DFX2
15 LTE_WAKE# GPIO_S5_3 GPIO_S5_24 XDP_GPIO_DFX2 11
SOC_JTAG2_TDO C17 +1.8V_S5 +1.8V_S5 J18 XDP_GPIO_DFX3
GPIO_S5_4 GPIO_S5_25 XDP_GPIO_DFX3 11
PMC_SUSCLK1 C16 +1.8V_S5 +1.8V_S5 M18 XDP_GPIO_DFX4 LAYOUT CLOSE TO SPI ROM
15 PMC_SUSCLK1 GPIO_S5_5 GPIO_S5_26 XDP_GPIO_DFX4 11
PCH_SPI_WP_D B14 +1.8V_S5 +1.8V_S5 K18 XDP_GPIO_DFX5
R424 0_4 GPIO_S5_6 GPIO_S5_27 XDP_GPIO_DFX5 11 PP1800_PCH_ME
14 SOC_KBC_SMI SOC_GPOI7 C15 +1.8V_S5 +1.8V_S5 K20 XDP_GPIO_DFX6
GPIO_S5_7 GPIO_S5_28 XDP_GPIO_DFX6 11
+1.8V_S5 M22 XDP_GPIO_DFX7
GPIO_S5_29 XDP_GPIO_DFX7 11
+1.8V_S5 M24 XDP_GPIO_DFX8
GPIO_S5_30 XDP_GPIO_DFX8 11
C338 0.1u/10V_4
C13
GPIO_S5_8
5
MUX_AUD_INT1# A13 0206 Disconnect SPI SIO I/F
24 MUX_AUD_INT1# GPIO_S5_9
WIFI_DISABLE# C19 +1.8V AV32 SIO_SPI_CS# TP43 2
15 WIFI_DISABLE# GPIO_S5_10 SIO_SPI_CS
+1.8V BA28 SIO_SPI_MISO TP45
3.3V 4 SPI_WP_ME_ROM
SIO_SPI_MISO AY28 SIO_SPI_MOSI SPI_WP_ME R162 0_4 SPI_WP_ME_ROM_Q 1
B
+1.8V SIO_SPI_MOSI TP47 B
R391 49.9/F_4 SOC_GPIO_RCOMP N26 +1.8V AY30 SIO_SPI_CLK TP44
GPIO_RCOMP SIO_SPI_CLK PP1800_PCH_ME 74LVC1G34 U20 R496
3
GND 5 OF 13 100K_4
VLV_M_D/BGA
REV = 1.15
C339
0.1U/10V_4 U19
SPI ROM needs power in S3/S5 for the TXE (Trusted execution engine).
RTC Clock 32.768KHz Q33 PJA138K PP1800_PCH_ME
8
VCC SPI_SI
5
2
SOC_SPI_MOSI_R
SOC_SPI_MISO_R
R481
R493
22/F_4
22/F_4
SOC_SPI_MOSI
SOC_SPI_MISO
GND Default PD SPI_SO 1 SOC_SPI_CS#_R R500 22/F_4 SOC_SPI_CS#
RTC_X1 15P/50V_4 C90 R520 *0_6 1 3 R492 *3.3K/F_4 SPI_WP_ME_ROM 3 CS# 6 SOC_SPI_CLK_R R487 22/F_4 SOC_SPI_CLK
PP1800_PCH WP# SPI_SCK
1
PP1800_PCH_S5 R514 0_6

R498 3.3K/F_4 SPI_HOLD_ME 7 4
2
R146 Y1 SPI_HOLD GND
10M_4 32.768KHZ PP3300_PCH_S5 SPI_FLASH
soic8-7_9-1_27 GND
RTC_X2 15P/50V_4 C92 PP1800_PCH_S5 LAYOUT CLOSE TO SPI ROM
2
AKE5EZN0N00 R479 0_4 PCH_SPI_SI_R 18

R151 10K_4 PCH_SPI_WP_D IC FLASH (8P) W25Q64FWSSIG (SOIC) R486 0_4 PCH_SPI_SO_R 18
GND R480 0_4 PCH_SPI_CS0#_R 18
R488 0_4 PCH_SPI_CLK_R 18
RTC Circuitry(RTC) 30mils
+3V_RTC
PP1800_PCH_ME
SPI NOR FLASH
R133 near SPI ROM as possible
SOC_RTEST# SPI_WP_ME R464 0_4
Need unstuff once SEL debug
GPIO_SPI_WP 18
To debug header port is un-stuffed
20K/F_4 R499 3.3K/F_4 SOC_SPI_CS# SPI_HOLD_ME R510 0_4 SPI_HOLD#_BIOS 18
A C88 A
1u/6.3V_4
2N7002K Q17
R134 GND 1 3 PCH_SPI_WP_D
PP3300_RTC R125 0_6 SRT_CRST# To PCH
PCH_SPI_WP_D connect to GPIO58 at GRB
20K/F_4 2 Quanta Computer Inc.
SPI_WP_ME
C85 C89
SPI_WP_ME 25,27 From Screw/EC
1u/6.3V_4 1u/6.3V_4 PROJECT : ZM8
1A
GND GND
Valley 5/9 (SPI/GPIO/CLK)
5 4 3 2 1
5 4 3 2 1
RAM ID
PP1800_PCH_S5
SoC (CPU)
R170
R175
R169
R168
*1K_4
1K_4
1K_4
*1K_4
RAM_ID0
RAM_ID1
RAM_ID2
RAM_ID3
R185
R186
R184
R183
1K_4
*1K_4
*1K_4
*1K_4
7
D ? D
U16F
VLV_M_D
G2 M10
GPIO_S5_31 RESERVED_M10 M9
RESERVED_M9
M3 P7 Vender RAM_ID Q PN Mfr. PN Freq. Size Total
L1 GPIO_S5_32 RESERVED_P7 P6 Size
K2 GPIO_S5_33 RESERVED_P6
Micron 000 AKD5JGSTL02 MT41K256M16HA-125:E 1600MHz 4Gb 4GB
LTE_DISABLE# K3 GPIO_S5_34
15 LTE_DISABLE# GPIO_S5_35
M2 M7 Hynix 001 AKD5JGETW00 H5TC4G63AFR-PBA 1600MHz 4Gb 4GB
RAM_ID0 N3 GPIO_S5_36 RESERVED_M7 M12 USB3_P0_REXT
R435 1.24K/F_4
RAM_ID1 P2 GPIO_S5_37 USB3_REXT0 Samsung 010 AKD5PGST500 K4B4G1646Q-HYK0 1600MHz 4Gb 4GB
RAM_ID2 L3 GPIO_S5_38 P10
GPIO_S5_39 RESERVED_P10 P12 Samsung 011 AKD5PGST500 K4B4G1646Q-HYK0 1600MHz 4Gb 2GB
RESERVED_P12 GND
M4 Micron 100 AKD5JGSTL02 MT41K256M16HA-125:E 1600MHz 4Gb 2GB
RAM_ID3 J3 RESERVED_M4 M6
P3 GPIO_S5_40 RESERVED_M6 Hynix 101 AKD5JGETW00 H5TC4G63AFR-PBA 1600MHz 4Gb 2GB
H3 GPIO_S5_41 D4 USB3_RXP0
GPIO_S5_42 USB3_RXP0 USB3_RXP0 25
B12 E3 USB3_RXN0
GPIO_S5_43 USB3_RXN0 USB3_RXN0 25
K6 USB3_TXP0
USB3_TXP0 USB3_TXP0 25
M16 K7 USB3_TXN0
25 USBP0+ USB_DP0 USB3_TXN0 USB3_TXN0 25
MB USB3.0 K16
25 USBP0- USB_DN0
HUB PORT 1 USB2.0 23 USBP1+ J14
G14 USB_DP1
HUB1 23 USBP1- USB_DN1
HUB PORT 2 LTE K12
17 USBP2+ USB_DP2
CCD J12
C 17 USBP2- USB_DN2 C
K10 H8
20 USBP3+ USB_DP3 RESERVED_H8
BT H10 H7
20 USBP3- USB_DN3 RESERVED_H7
R431 1K/F_4 ICLK_USB_TERMN_0 D10 H5

R423 1K/F_4 ICLK_USB_TERMN_1 F10 ICLK_USB_TERMN_D10 RESERVED_H5 H4
ICLK_USB_TERMN RESERVED_H4
14,25 USB_OC0# PP1800_PCH
GND R102 10K_4 USB_OC0# C20 +1.8V_S5
R173 10K_4 USB_OC1# B20 USB_OC_00
PP1800_PCH_S5 USB_OC_11 +1.8V_S5
SIM_DET_C R427 10K_4
14,23 USB_OC1#
TRACKPAD_INT_DX R422 10K_4
R440 45.3/F_4 USB_RCOMP D6 +1.8V BD12 TRACKPAD_INT_DX

USB_RCOMPO GPIO_S0_SC_55 TRACKPAD_INT_DX 26
C7 +1.8V BC12 GPIO_S0_SC_56
USB_RCOMPI GPIO_S0_SC_56 GPIO_S0_SC_56 4
+1.8V BD14 SOC_UART_TX
GPIO_S0_SC_57 SOC_UART_TX 18
+1.8V BC14 SIM_DET_C
GPIO_S0_SC_58 SIM_DET_C 15
GND R434 *0_4 USB_PLL_MON M13 +1.8V BF14 EC_IN_RW_C
USB_PLL_MON GPIO_S0_SC_59 EC_IN_RW_C 15
+1.8V BD16
GPIO_S0_SC_60 BC16 SOC_UART_RX SOC_UART_TX R417 SOC_UART_RX
+1.8V GPIO_S0_SC_61 SOC_UART_RX 18
*0_4
GND B4
B5 USB_HSIC0_DATA BH12
USB_HSIC0_STROBE +1.8V ILB_8254_SPKR
Un-Stuff for Test Only
E2
D2 USB_HSIC1_DATA
USB_HSIC1_STROBE BH22 I2C_0_SDA_CR103 22/F_4 PP1800_PCH
+1.8V SIO_I2C0_DATA I2C_0_SDA_R 15
+1.8V BG23 I2C_0_SCL_C R101 22/F_4 I2C_0_SCL_R 15 Touch pad
B R167 45.3/F_4 USB_HSIC_RCOMP A7 SIO_I2C0_CLK B
GND USB_HSIC_RCOMP
22 PCLK_TPM I2C_0_SDA_R R110 4.7K_4
R418 49.9/F_4 +1.8V BG24 I2C_1_SDA_CR92 22/F_4 I2C_1_SDA_R 24 I2C_0_SCL_R R111 4.7K_4
SIO_I2C1_DATA BH24 I2C_1_SCL_C R98 22/F_4
+1.8V SIO_I2C1_CLK I2C_1_SCL_R 24 Audio Codec
LPC_RCOMP BF18 I2C_1_SDA_R R113 4.7K_4
LPC_LAD0 BH16 LPC_RCOMP I2C_1_SCL_R R112 4.7K_4
22,27 LPC_LAD0 ILB_LPC_AD_00 +1.8V/+3.3V
22,27 LPC_LAD1 LPC_LAD1 BJ17 +1.8V/+3.3V +1.8V BG25
R123 LPC_LAD2 BJ13 ILB_LPC_AD_11 SIO_I2C2_DATA BJ25
22,27 LPC_LAD2 ILB_LPC_AD_22 +1.8V/+3.3V +1.8V SIO_I2C2_CLK
22,27 LPC_LAD3 LPC_LAD3 BG14 +1.8V/+3.3V 9/9 unstull pull high resistor(R382, R380) of TP I2C signal
*0_4 LPC_LFRAME# BG17 ILB_LPC_AD_33 I2C_4_SDA R390 *4.7K_4_NC
22,27 LPC_LFRAME# ILB_LPC_FRAME +1.8V/+3.3V
L16 120ohm@100MHzSOC_CLKOUT_0 BG15 +1.8V/+3.3V +1.8V BG26 I2C_4_SCL R385 *4.7K_4_NC
R127 0_4 CLK_PCI_EC_R L17 120ohm@100MHzSOC_CLKOUT_1 BH14 ILB_LPC_CLK_00 SIO_I2C3_DATA BH26
27 CLK_PCI_EC ILB_LPC_CLK_11 +1.8V/+3.3V +1.8V SIO_I2C3_CLK
27 LPC_CLKRUN_L LPC_CLKRUN_L L18 120ohm@100MHzSOC_CLKRUN# BG16 +1.8V/+3.3V I2C_5_SDA R382 *4.7K_4_NC
SOC_SERIRQ BG13 ILB_LPC_CLKRUN I2C_5_SCL R380 *4.7K_4_NC
14 SOC_SERIRQ ILB_LPC_SERIRQ +1.8V
+1.8V BF27 I2C_4_SDA
SIO_I2C4_DATA BG27 I2C_4_SCL
9/15 Replaced R114/R122/R124 as bead +1.8V SIO_I2C4_CLK Light sensor
C74 12p/10V_4 PCLK_TPM
C81 12p/10V_4 CLK_PCI_EC_R +1.8V BH28 I2C_5_SDA_CR82 22/F_4 I2C_5_SDA 17 I2C_NFC_SDA R360 *4.7K_4
SMB_SOC_DATA BG12 SIO_I2C5_DATA BG28 I2C_5_SCL_C R78 22/F_4 I2C_NFC_SCL R359 *4.7K_4
C299 12p/10V_4 LPC_CLKRUN_L
11 SMB_SOC_DATA
SMB_SOC_CLK BH10 PCU_SMB_DATA +1.8V +1.8V SIO_I2C5_CLK I2C_5_SCL 17 Touch panel
11 SMB_SOC_CLK
SMB_SOC_ALERTB BG11 PCU_SMB_CLK +1.8V
PCU_SMB_ALERT+1.8V BJ29
+1.8V SIO_I2C6_DATA
GND 9/15 Populated C74, C81,C299 +1.8V BG29
SIO_I2C6_CLK
BH30 I2C_NFC_SDA
GPIO_S0_SC_092 BG30 I2C_NFC_SCL
PP1800_PCH GPIO_S0_SC_093
R128 2.2K_4 SMB_SOC_DATA
A 6 OF 13 A
R140 2.2K_4 SMB_SOC_CLK
VLV_M_D/BGA
R142 2.2K_4 SMB_SOC_ALERTB ?
REV = 1.15

R119 *0_4 SOC_CLKRUN#
GND PROJECT : ZM8
1A
Valley 6/9 (USB/LPC/I2C)
5 4 3 2 1
5 4 3 2 1
SoC (CPU)
8
D D
+VCC_GFX +VCC_CORE
R455 R367 R374 0_4 GND

33 VSS_AXG_SENSE
100/F_4 100/F_4
?
U16G PP1350
VLV_M_D
VCC_SENSE VCC_SENSE P28 BD49
33 VCC_SENSE CORE_VCC_SENSE_P28 DRAM_VDD_S4_BD49
VCC_AXG_SENSE BB8 BD52
33 VCC_AXG_SENSE UNCORE_VNN_SENSE DRAM_VDD_S4_BD52
VCC_AXG_SENSE VSS_SENSE N28 BD53
33 VSS_SENSE CORE_VSS_SENSE_N28 DRAM_VDD_S4_BD53 BF44 C221 C213 C219 C218 C211 C212
VSS_SENSE DRAM_VDD_S4_BF44 BG51 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
DRAM_VDD_S4_BG51 BJ48
R345 0_4 PP1350_VSM AD38 DRAM_VDD_S4_BJ48 C51
PP1350 DRAM_VDD_S4_AD38 DRAM_VDD_S4_C51
R375 AF38 D44
100/F_4 C207 1U/6.3V_4 A48 DRAM_VDD_S4_AF38 DRAM_VDD_S4_D44 F49 GND
C225 1U/6.3V_4 AK38 DRAM_VDD_S4 DRAM_VDD_S4_F49 F52
GND DRAM_VDD_S4_AK38 DRAM_VDD_S4_F52
C31 0.1U/10V_4 AM38 F53
AV41 DRAM_VDD_S4_AM38 DRAM_VDD_S4_F53 H46
AV42 DRAM_VDD_S4_AV41 DRAM_VDD_S4_H46 M41
GND BB46 DRAM_VDD_S4_AV42 DRAM_VDD_S4_M41 M42
PP1350 DRAM_VDD_S4_BB46 DRAM_VDD_S4_M42
C V38 C
DRAM_VDD_S4_V38 Y38
DRAM_VDD_S4_Y38
+VCC_CORE AA27
AA29 CORE_VCC_S0IX_AA27 +VCC_GFX
AA30 CORE_VCC_S0IX_AA29
AC27 CORE_VCC_S0IX_AA30
AC29 CORE_VCC_S0IX_AC27 AA24
C263 22u/6.3V_6 AC30 CORE_VCC_S0IX_AC29 UNCORE_VNN_S3_AA24 AC22
C265 10u/6.3V_4 AD27 CORE_VCC_S0IX_AC30 UNCORE_VNN_S3_AC22 AC24
C252 22u/6.3V_6 AD29 CORE_VCC_S0IX_AD27 UNCORE_VNN_S3_AC24 AD22 C60 C59 C56 C246 C275 C276 C272 C271
C255 10u/6.3V_4 AD30 CORE_VCC_S0IX_AD29 UNCORE_VNN_S3_AD22 AD24 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6
CORE_VCC_S0IX_AD30 UNCORE_VNN_S3_AD24 22u/6.3V_6 10u/6.3V_4 10u/6.3V_4 22u/6.3V_6 22u/6.3V_6
C262 22u/6.3V_6 AF27 AF22
C248 22u/6.3V_8 AF29 CORE_VCC_S0IX_AF27 UNCORE_VNN_S3_AF22 AF24
C45 22u/6.3V_8 AG27 CORE_VCC_S0IX_AF29 UNCORE_VNN_S3_AF24 AG22
9/9 C248, C237,C227 EOD change P/N from CORE_VCC_S0IX_AG27 UNCORE_VNN_S3_AG22
C237 22u/6.3V_8 AG29 AG24 GND
CH6221M9A03 to CH6221M9A00 and high is 1.25. C227 22u/6.3V_8 AG30 CORE_VCC_S0IX_AG29 UNCORE_VNN_S3_AG24 AJ22
Footprint is the same. C49 22u/6.3V_8 P26 CORE_VCC_S0IX_AG30 UNCORE_VNN_S3_AJ22 AJ24
C52 22u/6.3V_8 P27 CORE_VCC_S0IX_P26 UNCORE_VNN_S3_AJ24 AK22
C54 22u/6.3V_8 U27 CORE_VCC_S0IX_P27 UNCORE_VNN_S3_AK22 AK24
U29 CORE_VCC_S0IX_U27 UNCORE_VNN_S3_AK24 AK25
V27 CORE_VCC_S0IX_U29 UNCORE_VNN_S3_AK25 AK27 C82 C75 C76
V29 CORE_VCC_S0IX_V27 UNCORE_VNN_S3_AK27 AK29
V30 CORE_VCC_S0IX_V29 UNCORE_VNN_S3_AK29 AK30 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8
Y27 CORE_VCC_S0IX_V30 UNCORE_VNN_S3_AK30 AK32
GND Y29 CORE_VCC_S0IX_Y27 UNCORE_VNN_S3_AK32 AM22
Y30 CORE_VCC_S0IX_Y29 UNCORE_VNN_S3_AM22
CORE_VCC_S0IX_Y30
TP50 TP52
AF30 AA22
B TP_CORE_V1P05_S4 TP2_CORE_VCC_S0IX B
7 OF 13 +VCC_GFX
VLV_M_D/BGA
REV = 1.15 ?
C69
22u/6.3V_8
A A

PROJECT : ZM8
1A
Valley 7/9 (Power 1)
5 4 3 2 1
5 4 3 2 1
SoC (CPU) C245 4.7U/6.3V_4 GND

C223 4.7U/6.3V_4
C240 4.7U/6.3V_4
PP1000_PCH
PP1000_PCH_SX R368 0_4

GND C288
C312
1U/6.3V_4
4.7U/6.3V_4
DARM_V1P0_S0IX_PWR_A
C234 4.7U/6.3V_4
V32
BJ6
AD35
AF35
U16H
SVID_V1P0_S3_V32
VGA_V1P0_S3_BJ6
DRAM_V1P0_S0IX_AD35
?
VLV_M_D
DRAM_V1P35_S0IX_F1_AD36
HDA_LPE_V1P5V1P8_S3_AM32
UNCORE_V1P8_S3_AM30
AD36
AM32
AM30
AN32
UNCORE_V1P35_S0IX
UNCORE_V1P8_AN32_PWR
C222
C249
C224
R384
4.7U/6.3V_4
4.7U/6.3V_4
1U/6.3V_4
0_4
GND
PP1800_PCH
9
GND DRAM_V1P0_S0IX_AF35 UNCORE_V1P8_S3_AN32
AF36 AM27 LPC_V3P3_PWR R444 0_4 PP3300_PCH
R371 0_4 DARM_V1P0_S0IX_PWR AA36 DRAM_V1P0_S0IX_AF36 LPC_V1P8V3P3_S3_AM27 U24 V1P8_S5_PWR
PP1000_PCH_SX DRAM_V1P0_S0IX_AA36 UNCORE_V1P8_G3_U24
AJ36 N18
C235 4.7U/6.3V_4 AK35 DRAM_V1P0_S0IX_AJ36 USB_V3P3_G3_N18 P18 PCU_V3P3_G3_PWR
D C233 4.7U/6.3V_4 AK36 DRAM_V1P0_S0IX_AK35 USB_V3P3_G3_P18 U38 UNCORE_V1P8_AN32_PWR D
GND DRAM_V1P0_S0IX_AK36 UNCORE_V1P8_S3_U38
C232 4.7U/6.3V_4 Y35 AN24 LPC_V3P3_PWR R356 0_6 PP1800_PCH_S5
Y36 DRAM_V1P0_S0IX_Y35 VGA_V3P3_S3_AN24 V25 PCU_V1P8_G3_V25 R352 *0_6
DRAM_V1P0_S0IX_Y36 PCU_V1P8_G3_V25 PP1800_PCH
PP1000_PCH_SX R425 0_4 DDI_V1P0_S0IX AK19 3V_S5 PCU_V3P3_G3_N22 N22 PCU_V3P3_G3_PWR R398 0_4 PP3300_PCH_S5
AK21 DDI_V1P0_S0IX_AK19 AN27 +VSDIO R445 0_4
DDI_V1P0_S0IX_AK21 SD3_V1P8V3P3_S3_AN27 PP3300_PCH
C283 4.7U/6.3V_4 AJ18 AD16
AM16 DDI_V1P0_S0IX_AJ18 VSS_AD16 AD18 VSS_AD18_AD16_PWR R469 0_4
DDI_V1P0_S0IX_AM16 VSS_AD18 GND
GND USB3_V1P0_G3 U22 V18 USB_HSIC_V1P24_G3 R468 0_4 PP1000_PCH_S5
C296 10U/6.3V_4 V22 UNCORE_V1P0_G3_U22 USB_HSIC_V1P24_G3_V18 AA18 V1P8_AA18_PEW R458 0_4 C327 1U/6.3V_4
UNCORE_V1P0_G3_V22 UNCORE_V1P8_G3_AA18 PP1800_PCH_S5 GND
C305 10U/6.3V_4 VIS_V1P0_S0IX_PW AN29 P22 RTC_VCC_P22_PWR R118 0_4 +3V_RTC
AN30 VIS_V1P0_S0IX_AN29 RTC_VCC_P22 N20
AF16 VIS_V1P0_S0IX_AN30 USB_V1P8_G3_N20 U25 V1P8_S5_PWR R389 0_4
PP1000_PCH UNCORE_V1P0_S3_AF16 PMU_V1P8_G3_U25 PP1800_PCH_S5
GND C320 0.01U/25V_4 AF18 AF33 C251 1U/6.3V_4 GND
C297 10U/6.3V_4 Y18 UNCORE_V1P0_S3_AF18 CORE_V1P05_S3_AF33 AG33
G1 UNCORE_V1P0_S3_Y18 CORE_V1P05_S3_AG33 AG35
AM21 UNCORE_V1P0_S3_G1 CORE_V1P05_S3_AG35 U33
AN21 PCIE_V1P0_S3_AM21 CORE_V1P05_S3_U33 U35
C298 1U/6.3V_4 PCIE_V1P0_S3_AN21 CORE_V1P05_S3_U35 V33 CORE_V1P05 C247 4.7U/6.3V_4
C268 10U/6.3V_4 AN18 CORE_V1P05_S3_V33 A3 C241 4.7U/6.3V_4
GND PCIE_GBE_SATA_V1P0_S3_AN18 VSS_A3_A3
PP1000_PCH AN19 A49 C244 4.7U/6.3V_4
CORE_V1P05 AA33 SATA_V1P0_S3_AN19 VSS_A49_A49 A5 C243 0.47u/6.3V_4
CORE_V1P05_S3_AA33 VSS_A5_A5 GND
PP1000_PCH_SX R67 0_4 VIS_V1P0_S0IX_PW AF21 A51
C273 1U/6.3V_4 AG21 UNCORE_V1P0_S0IX_AF21 VSS_A51_A51 A52
C270 10U/6.3V_4 V24 UNCORE_V1P0_S0IX_AG21 VSS_A52_A52 A6
GND VIS_V1P0_S0IX_V24 VSS_A6_A6
Y22 B2
Y24 VIS_V1P0_S0IX_Y22 VSS_B2_B2 B52
M14 VIS_V1P0_S0IX_Y24 VSS_B52_B52 B53
PP1000_PCH USB_V1P0_S3_M14 VSS_B53_B53
C304 10U/6.3V_4 U18 BE1
C259 1U/6.3V_4 U19 USB_V1P0_S3_U18 VSS_BE1_BE1 BE53
GND USB_V1P0_S3_U19 VSS_BE53_BE53
AN25 BG1
C R459 0_4 USB3_V1P0_G3 Y19 GPIO_V1P0_S3_AN25 VSS_BG1_BG1 BG53 C
PP1000_PCH_S5 USB3_V1P0_G3_Y19 VSS_BG53_BG53
GND C317 1U/6.3V_4 C3 BH1
C308 1U/6.3V_4 C5 USB3_V1P0_G3_C3 VSS_BH1_BH1 BH2
B6 UNCORE_V1P0_G3_C5 VSS_BH2_BH2 BH52
R355 0_8 CORE_V1P05 AC32 UNCORE_V1P0_G3_B6 VSS_BH52_BH52 BH53
PP1050_PCH CORE_V1P05_S3_AC32 VSS_BH53_BH53
Y32 BJ2
R370 0_8 UNCORE_V1P35_S0IX U36 CORE_V1P05_S3_Y32 VSS_BJ2_BJ2 BJ3
PP1350_PCH_SX UNCORE_V1P35_S0IX_F4_U36 VSS_BJ3_BJ3
C242 4.7U/6.3V_4 AA25 BJ5
C239 4.7U/6.3V_4 AG32 UNCORE_V1P35_S0IX_F5_AA25 VSS_BJ5_BJ5 BJ49
GND UNCORE_V1P35_S0IX_F2_AG32 VSS_BJ49_BJ49
V36 BJ51
R178 0_6 VGA_V1P35_S3 BD1 UNCORE_V1P35_S0IX_F3_V36 VSS_BJ51_BJ51 BJ52
PP1350_PCH VGA_V1P35_S3_F1_BD1 VSS_BJ52_BJ52
UNCORE_V1P35_S0IX AF19 C1
C286 4.7U/6.3V_4 AG19 UNCORE_V1P35_S0IX_F6 VSS_C1_C1 C53
GND UNCORE_V1P35_S0IX_F1_AG19 VSS_C53_C53
C228 4.7U/6.3V_4 AJ19 E1
ICLK_V1P35_S3_F1_AJ19 VSS_E1_E1 E53
VSS_E53_E53 F1
AG18 RESERVED_F1 AK18 GND
PP1350_PCH ICLK_V1P35_S3_F2 PCIE_V1P0_S3_AK18 PP1000_PCH
GND C328 10U/6.3V_4 AN16 AM18 C274 1U/6.3V_4
C329 10U/6.3V_4 U16 VSSA_AN16 PCIE_V1P0_S3_AM18 C295 1U/6.3V_4
USB_VSSA_U16 GND
VLV_M_D/BGA 8 OF 13
REV = 1.15 ?
GND
B B
PP1350_PCH PP1000_PCH
USB3_V1P0_G3 V1P8_AA18_PEW +VSDIO LPC_V3P3_PWR PCU_V3P3_G3_PWR
C285 C279 C294 C289 C290 C287 C250 C319 C301 C307 C291 C302
10U/6.3V_4 1U/6.3V_4 1U/6.3V_4 0.01U/25V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 0.01U/25V_4 C316 C303 1U/6.3V_4
1U/6.3V_4 1U/6.3V_4 C277 C280
1U/6.3V_4 0.1U/10V_4
GND GND
GND GND
GND GND GND
VIS_V1P0_S0IX_PW V1P8_S5_PWR RTC_VCC_P22_PWR VSS_AD18_AD16_PWR UNCORE_V1P8_AN32_PWR
C267 C266 C254 C226

C47 C43 C48 C258 C261 C253 C256 C72 C331 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
A 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 0.01U/25V_4 *1U/6.3V_4 *1U/6.3V_4 A
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8
GND GND GND GND

GND

PROJECT : ZM8
1A
Valley 8/9 (Power 2)
5 4 3 2 1
5 4 3 2 1
SoC (CPU)
10
D D
? ? ? ? ?
U16I U16J U16K U16L U16M
VLV_M_D VLV_M_D VLV_M_D VLV_M_D VLV_M_D
A11 AC36 AG38 AH47 AT24 AY36 BF30 E8 K9 U3
A15 VSS1 VSS36 AC38 AH4 VSS71 VSS106 AH48 AT27 VSS141 VSS176 AY4 BF36 VSS211 VSS246 F19 L13 VSS281 VSS316 U30
A19 VSS2 VSS37 AD19 AH41 VSS72 VSS107 AH50 AT30 VSS142 VSS177 AY50 BF4 VSS212 VSS247 F2 L19 VSS282 VSS317 U32
A23 VSS3 VSS38 AD21 AH45 VSS73 VSS108 AH51 AT35 VSS143 VSS178 AY9 BG31 VSS213 VSS248 F24 L27 VSS283 VSS318 U40
A27 VSS4 VSS39 AD25 AH7 VSS74 VSS109 AH6 AT38 VSS144 VSS179 BA14 BG34 VSS214 VSS249 F27 L35 VSS284 VSS319 U42
A31 VSS5 VSS40 AD32 AH9 VSS75 VSS110 AM44 AT4 VSS145 VSS180 BA19 BG39 VSS215 VSS250 F30 M19 VSS285 VSS320 U43
A35 VSS6 VSS41 AD33 AJ1 VSS76 VSS111 AM51 AT47 VSS146 VSS181 BA22 BG42 VSS216 VSS251 F35 M26 VSS286 VSS321 U45
A39 VSS7 VSS42 AD47 AJ16 VSS77 VSS112 AM7 AT52 VSS147 VSS182 BA27 BG45 VSS217 VSS252 F5 M27 VSS287 VSS322 U46
A43 VSS8 VSS43 AD7 AJ21 VSS78 VSS113 AN1 AU1 VSS148 VSS183 BA32 BG49 VSS218 VSS253 F7 M34 VSS288 VSS323 U48
A47 VSS9 VSS44 AE1 AJ25 VSS79 VSS114 AN11 AU24 VSS149 VSS184 BA35 BJ11 VSS219 VSS254 G10 M35 VSS289 VSS324 U49
AA1 VSS10 VSS45 AE11 AJ27 VSS80 VSS115 AN12 AU3 VSS150 VSS185 BA40 BJ15 VSS220 VSS255 G20 M38 VSS290 VSS325 U5
AA16 VSS11 VSS46 AE12 AJ29 VSS81 VSS116 AN14 AU30 VSS151 VSS186 BA53 BJ19 VSS221 VSS256 G22 M47 VSS291 VSS326 U51
AA19 VSS12 VSS47 AE14 AJ3 VSS82 VSS117 AN22 AU38 VSS152 VSS187 BB19 BJ23 VSS222 VSS257 G26 M51 VSS292 VSS327 U53
AA21 VSS13 VSS48 AE3 AJ30 VSS83 VSS118 AN3 AU51 VSS153 VSS188 BB27 BJ27 VSS223 VSS258 G28 N1 VSS293 VSS328 U6
AA3 VSS14 VSS49 AE4 AJ32 VSS84 VSS119 AN33 AV12 VSS154 VSS189 BB35 BJ31 VSS224 VSS259 G32 N16 VSS294 VSS329 U8
AA32 VSS15 VSS50 AE40 AJ33 VSS85 VSS120 AN35 AV13 VSS155 VSS190 BC20 BJ35 VSS225 VSS260 G34 N38 VSS295 VSS330 U9
AA35 VSS16 VSS51 AE42 AJ35 VSS86 VSS121 AN36 AV14 VSS156 VSS191 BC22 BJ39 VSS226 VSS261 G42 N51 VSS296 VSS331 V12
AA38 VSS17 VSS52 AE43 AJ38 VSS87 VSS122 AN38 AV18 VSS157 VSS192 BC26 BJ43 VSS227 VSS262 H19 P13 VSS297 VSS332 V16
AA53 VSS18 VSS53 AE45 AJ53 VSS88 VSS123 AN40 AV19 VSS158 VSS193 BC28 BJ47 VSS228 VSS263 H27 P16 VSS298 VSS333 V19
AB10 VSS19 VSS54 AE46 AK10 VSS89 VSS124 AN42 AV24 VSS159 VSS194 BC32 BJ7 VSS229 VSS264 H35 P19 VSS299 VSS334 V21
AB4 VSS20 VSS55 AE48 AK14 VSS90 VSS125 AN43 AV27 VSS160 VSS195 BC34 C14 VSS230 VSS265 J1 P20 VSS300 VSS335 V35
AB41 VSS21 VSS56 AE50 AK16 VSS91 VSS126 AN45 AV30 VSS161 VSS196 BC42 C31 VSS231 VSS266 J16 P24 VSS301 VSS336 V40
AB45 VSS22 VSS57 AE51 AK33 VSS92 VSS127 AN46 AV35 VSS162 VSS197 BD19 C34 VSS232 VSS267 J19 P32 VSS302 VSS337 V44
C AB50 VSS25 VSS60 AE8 AM12 VSS95 VSS130 AN5 AV51 VSS165 VSS200 BD30 C45 VSS235 VSS270 J32 P4 VSS305 VSS340 Y10 C
AB51 VSS26 VSS61 AE9 AM19 VSS96 VSS131 AN51 AV7 VSS166 VSS201 BD35 C49 VSS236 VSS271 J35 P47 VSS306 VSS341 Y14
AB6 VSS27 VSS62 AF10 AM24 VSS97 VSS132 AN53 AW13 VSS167 VSS202 BE19 D12 VSS237 VSS272 J40 P52 VSS307 VSS342 Y16
AC16 VSS28 VSS63 AF12 AM25 VSS98 VSS133 AN6 AW19 VSS168 VSS203 BE2 D16 VSS238 VSS273 J53 P9 VSS308 VSS343 Y21
AC18 VSS29 VSS64 AF25 AM29 VSS99 VSS134 AN8 AW27 VSS169 VSS204 BE35 D24 VSS239 VSS274 K14 T40 VSS309 VSS344 Y25
AC19 VSS30 VSS65 AF32 AM33 VSS100 VSS135 AN9 AW3 VSS170 VSS205 BE8 D30 VSS240 VSS275 K22 U1 VSS310 VSS345 Y33
AC21 VSS31 VSS66 AF47 AM35 VSS101 VSS136 AP40 AW35 VSS171 VSS206 BF12 D36 VSS241 VSS276 K32 U11 VSS311 VSS346 Y41
AC25 VSS32 VSS67 AG16 AM36 VSS102 VSS137 AT12 AY10 VSS172 VSS207 BF16 D38 VSS242 VSS277 K36 U12 VSS312 VSS347 Y44
AC33 VSS33 VSS68 AG25 AM40 VSS103 VSS138 AT16 AY22 VSS173 VSS208 BF24 E19 VSS243 VSS278 K4 U14 VSS313 VSS348 Y7
AC35 VSS34 VSS69 AG36 M28 VSS104 VSS139 AT19 AY32 VSS174 VSS209 BF38 E35 VSS244 VSS279 K50 U21 VSS314 VSS349 Y9
VSS35 VSS70 VSS105 VSS140 VSS175 VSS210 VSS245 VSS280 VSS315 VSS350
9 OF 13 10 OF 13 11 OF 13 12 OF 13 13 OF 13
VLV_M_D/BGA VLV_M_D/BGA VLV_M_D/BGA VLV_M_D/BGA VLV_M_D/BGA
? ? ? ? ?
REV = 1.15 REV = 1.15 REV = 1.15 REV = 1.15 REV = 1.15
B B
A A

PROJECT : ZM8
1A
Valley 9/9 (GND)
5 4 3 2 1
5 4 3 2 1
R22 *0_6
11
PP1800_PCH_S5 PP1800_XDP_AB
INTEL Debug Port(CPU) CN1

PP1000_PCH_S5 R23 *0_6
PP1800_PCH R25 0_4 PP1800_XDP_CD

31 1 GND GND 2 30
XDP_H_PREQ# 32 31 3 OBSFN_A0 OBSFN_C0 4 30 29 XDP_GPIO_S0_NC15
32 29 XDP_GPIO_S0_NC15 4
6 XDP_H_PRDY# XDP_H_PRDY# 33 5 OBSFN_A1 OBSFN_C1 6 28 XDP_GPIO_DFX0
34 33 7 GND GND 8 28 27 XDP_GPIO_DFX0 6
D XDP_GPIO_DFX1 35 34 9 OBSDATA_A_0 OBSDATA_C_0 10 27 26 XDP_GPIO_S0_NC16 D
6 XDP_GPIO_DFX1 36 35 26 25 XDP_GPIO_S0_NC16 4
XDP_GPIO_DFX2 11 OBSDATA_A_1 OBSDATA_C_1 12 XDP_GPIO_S0_NC17
6 XDP_GPIO_DFX2 37 36 13 GND GND 14 25 24 XDP_GPIO_S0_NC17 4
XDP_GPIO_DFX3 38 37 15 OBSDATA_A_2 OBSDATA_C_2 16 24 23 XDP_GPIO_S0_NC18
6 XDP_GPIO_DFX3 39 38 23 22 XDP_GPIO_S0_NC18 4
XDP_GPIO_DFX4 17 OBSDATA_A_3 OBSDATA_C_3 18 XDP_GPIO_S0_NC19
6 XDP_GPIO_DFX4 39 22 XDP_GPIO_S0_NC19 4
40 19 GND GND 20 21
41 40 21 OBSFN_B0 OBSFN_D_0 22 21 20
42 41 23 OBSFN_B1 OBSFN_D_1 24 20 19
43 42 25 GND GND 26 19 18
XDP_GPIO_DFX5 44 43 27 OBSDATA_B_0 OBSDATA_D_0 28 18 17 XDP_GPIO_S0_NC20
XDP_GPIO_DFX6 45 29 OBSDATA_B_1 OBSDATA_D_1 30 16 XDP_GPIO_S0_NC21
6 XDP_GPIO_DFX6 46 45 31 GND GND 32 16 15 XDP_GPIO_S0_NC21 4
XDP_GPIO_DFX7 47 46 33 OBSDATA_B_2 OBSDATA_D_2 34 15 14 XDP_GPIO_S0_NC22
6 XDP_GPIO_DFX8 XDP_GPIO_DFX8 48 35 OBSDATA_B_3 OBSDATA_D_3 36 13 XDP_GPIO_S0_NC23
49 48 37 GND GND 38 13 12 XDP_GPIO_S0_NC23 4
SOC_RSMRST# R319 1K_4 XDP_RSMRST# 50 49 39 HOOK0 ITPCLK/HOOK4 40 12 11
6,14 SOC_RSMRST# 50 11
PCH_PWRBTN_L R15 0_4 XDP_PMU_PWRBTN# 51 41 HOOK1 ITPCLK#/HOOK5 42 10
14,27 PCH_PWRBTN_L 52 51 43 VCC_OBS_AB VCC_OBS_CD 44 10 9
PP1800_XDP_AB 52 9 PP1800_XDP_CD
6,27 CORE_PWROK_R CORE_PWROK_R R20 1K_4 XDP_COREPWROK 53 45 HOOK2 RESET#/HOOK6 46 8 XDP_PMU_PLTRST#R14 1K_4 SOC_PLTRST# SOC_PLTRST# 6,14
XDP_RTEST_L R7 0_4 XDP_RTEST# 54 53 47 HOOK3 DBR#/HOOK7 48 8 7 XDP_PMU_RSTBTN#R13 0_4 SOC_REST_BTN#
54 7 SOC_REST_BTN# 6,18
C14 55 49 GND GND 50 6
*0.1u/10V_4 7 SMB_SOC_DATA R6 0_4 SMB_XDP_SDA 56 55 51 SDA TDO 52 6 5 XDP_H_TDO
SMB_SOC_DATA 56 5 XDP_H_TDO 6
SMB_SOC_CLK R4 0_4 SMB_XDP_SCL 57 53 SCL TRSTn 54 4 XDP_H_TRST# C15
7 SMB_SOC_CLK 57 4 XDP_H_TRST# 6
58 55 TCK1 TDI 56 3 XDP_H_TDI *0.1u/10V_4
C
59 58 3 2 XDP_H_TDI 6 C
XDP_H_TCK 57 TCK0 TMS 58 XDP_H_TMS
6 XDP_H_TCK 59 2 XDP_H_TMS 6
60 59 GND GND_XDP_PRESENT 60 1 XDP_PRESENT_N R11 0_4
60 1
PP3300_PCH_S5
SEC_BSH-030-01-L-D-A-TR PP3300_PCH_S5
SOC_RTEST# 6
R235 GND C13 0.1u/10V_4 XDP_RTEST# R323 1K_4
3
100K_4
PLACE C6601 closed to XDP HOOK PIN 54 PP1800_XDP_AB
2
*2N7002K
3
PLACE R295 WITHIN 0.25" FROM XDP PIN

Q39 XDP_H_TDO R8 51/F_4
1
XDP_RTEST_L 2
*2N7002K
Q38 PLACE R273,R286,R318 WITHIN 1" FROM SoC PIN
1
XDP_H_TMS R407 51/F_4

XDP_H_TDI R415 51/F_4
B B
XDP_H_TCK R413 51/F_4
PP1800_PCH_S5
XDP_H_TRST# R12 51/F_4

XDP_PMU_PWRBTN# R26 *30K/F_4
APS PLACE R6866 closed to XDP
PP3300_PCH_S5 C198
CN6 0.1u/10V_4 GND
1 APS1 R242 *0_6
1 2 PMC_SLP_S3# R236 *0_4 SLP_S3# PP1800_PCH_S5
2 SLP_S3# 6,14
5
3 PLACE R323 WITHIN 1.1" OF BUFFER PIN
3 4 2 XDP_H_PREQ# R327 200/F_4
4 5 PMC_SLP_S4# R237 *0_4 SLP_S4# XDP_H_PREQ#_C 4
5 SLP_S4# 2,6,14,17 6 XDP_H_PREQ#_C
6 1 XDP_H_PREQ#
6 7 PP1800_PCH
7 8 U28 C179
3
8 9 ILB_RTC_RST# R238 *0_4 SRT_CRST# 74AUP1G34GW C18 0.1u/10V_4 XDP_PMU_RSTBTN# R24 *1K_4
9 SRT_CRST# 6 GND
10 *0.1u/10V_4
10 11 PMC_PWRBTN#R239 *0_4 SOC_PWRBTN# PLACE C6866 closed to XDP HOOK PIN48
A 11 12 SOC_PWRBTN# 6,14 A
12 13 PMC_RSTBTN# R240 *0_4 SOC_REST_BTN#
13 14
14 15
15
16
16
17 R328 *0_4
17 18
18 PROJECT : ZM8
*ACES_88511-180N Size Document Number Rev
1A
CPU/PCH XDP
5 4 3 2 1
1 2 3 4 5 6 7 8
BYTE2_16-23 BYTE5_40-47
On board memory (OBM)
+SMDDR_VREF_DIMM M8
U1
E3
BYTE1_8-15
M_A_DQ18 M_A_DQ18 2 +SMDDR_VREF_DIMM M8
U2
E3
BYTE0_0-7
BYTE3_24-31
U3
E3
BYTE6_48-55
BYTE4_32-39
U4
E3
BYTE7_56-63
M_A_DQ43 M_A_DQ43 2
12
+SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ16 +SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ5 +SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ49 +SMDDR_VREF_DQ0 H1 VREFCA DQL0 F7 M_A_DQ44
VREFDQ DQL1 M_A_DQ16 2 VREFDQ DQL1 M_A_DQ5 2 VREFDQ DQL1 M_A_DQ49 2 VREFDQ DQL1 M_A_DQ44 2
F2 M_A_DQ19 F2 M_A_DQ2 F2 M_A_DQ54 F2 M_A_DQ42
2 M_A_A[15:0] DQL2 M_A_DQ19 2 DQL2 M_A_DQ2 2 DQL2 M_A_DQ54 2 DQL2 M_A_DQ42 2
M_A_A0 N3 F8 M_A_DQ21 M_A_DQ21 2 M_A_A0 N3 F8 M_A_DQ0 M_A_DQ0 2 M_A_A0 N3 F8 M_A_DQ52 M_A_DQ52 2 M_A_A0 N3 F8 M_A_DQ40 M_A_DQ40 2
M_A_A1 P7 A0 DQL3 H3 M_A_DQ22 M_A_A1 P7 A0 DQL3 H3 M_A_DQ7 M_A_A1 P7 A0 DQL3 H3 M_A_DQ50 M_A_A1 P7 A0 DQL3 H3 M_A_DQ47
A1 DQL4 M_A_DQ22 2 A1 DQL4 M_A_DQ7 2 A1 DQL4 M_A_DQ50 2 A1 DQL4 M_A_DQ47 2
M_A_A2 P3 H8 M_A_DQ17 M_A_A2 P3 H8 M_A_DQ4 M_A_A2 P3 H8 M_A_DQ48 M_A_A2 P3 H8 M_A_DQ45
M_A_A3 N2 G2 M_A_DQ23 M_A_A3 N2 G2 M_A_DQ6 M_A_A3 N2 G2 M_A_DQ51 M_A_A3 N2 G2 M_A_DQ46
M_A_A4 P8 H7 M_A_DQ20 M_A_A4 P8 H7 M_A_DQ1 M_A_A4 P8 H7 M_A_DQ53 M_A_A4 P8 H7 M_A_DQ41
M_A_A5 P2 M_A_A5 P2 M_A_A5 P2 M_A_A5 P2
M_A_A6 R8 A5 M_A_A6 R8 A5 M_A_A6 R8 A5 M_A_A6 R8 A5
M_A_A7 R2 A6 D7 M_A_DQ13 M_A_A7 R2 A6 D7 M_A_DQ29 M_A_A7 R2 A6 D7 M_A_DQ32 M_A_A7 R2 A6 D7 M_A_DQ56
A7 DQU0 M_A_DQ13 2 A7 DQU0 M_A_DQ29 2 A7 DQU0 M_A_DQ32 2 A7 DQU0 M_A_DQ56 2
M_A_A8 T8 C3 M_A_DQ11 M_A_DQ11 2 M_A_A8 T8 C3 M_A_DQ27 M_A_DQ27 2 M_A_A8 T8 C3 M_A_DQ39 M_A_DQ39 2 M_A_A8 T8 C3 M_A_DQ59 M_A_DQ59 2
M_A_A9 R3 A8 DQU1 C8 M_A_DQ9 M_A_A9 R3 A8 DQU1 C8 M_A_DQ28 M_A_A9 R3 A8 DQU1 C8 M_A_DQ33 M_A_A9 R3 A8 DQU1 C8 M_A_DQ57
A A9 DQU2 M_A_DQ9 2 A9 DQU2 M_A_DQ28 2 A9 DQU2 M_A_DQ33 2 A9 DQU2 M_A_DQ57 2 A
M_A_A10 L7 C2 M_A_DQ10 M_A_DQ10 2 M_A_A10 L7 C2 M_A_DQ26 M_A_DQ26 2 M_A_A10 L7 C2 M_A_DQ35 M_A_DQ35 2 M_A_A10 L7 C2 M_A_DQ58 M_A_DQ58 2
M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ12 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ25 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ37 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ61
M_A_A12 N7 A2 M_A_DQ15 M_A_DQ15 2 M_A_A12 N7 A2 M_A_DQ30 M_A_DQ30 2 M_A_A12 N7 A2 M_A_DQ34 M_A_DQ34 2 M_A_A12 N7 A2 M_A_DQ63 M_A_DQ63 2
M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ8 M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ24 M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ36 M_A_A13 T3 A12/BC DQU5 B8 M_A_DQ60
M_A_A14 T7 A3 M_A_DQ14 M_A_A14 T7 A3 M_A_DQ31 M_A_A14 T7 A3 M_A_DQ38 M_A_A14 T7 A3 M_A_DQ62
M_A_A15 M7 M_A_A15 M7 M_A_A15 M7 M_A_A15 M7
A15 PP1350 A15 PP1350 A15 PP1350 A15 PP1350
2 M_A_BS[2:0]
M_A_BS0 M2 B2 M_A_BS0 M2 B2 M_A_BS0 M2 B2 M_A_BS0 M2 B2
M_A_BS1 N8 BA0 VDD#B2 D9 M_A_BS1 N8 BA0 VDD#B2 D9 M_A_BS1 N8 BA0 VDD#B2 D9 M_A_BS1 N8 BA0 VDD#B2 D9
M_A_BS2 M3 BA1 VDD#D9 G7 M_A_BS2 M3 BA1 VDD#D9 G7 M_A_BS2 M3 BA1 VDD#D9 G7 M_A_BS2 M3 BA1 VDD#D9 G7
BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
M_A_CLKP0 J7 VDD#N1 N9 M_A_CLKP0 J7 VDD#N1 N9 M_A_CLKP0 J7 VDD#N1 N9 M_A_CLKP0 J7 VDD#N1 N9
2 M_A_CLKP0 CK VDD#N9 CK VDD#N9 CK VDD#N9 CK VDD#N9
M_A_CLKN0 K7 R1 M_A_CLKN0 K7 R1 M_A_CLKN0 K7 R1 M_A_CLKN0 K7 R1
2 M_A_CLKN0 CK VDD#R1 CK VDD#R1 CK VDD#R1 CK VDD#R1
M_A_CKE0 K9 R9 M_A_CKE0 K9 R9 M_A_CKE0 K9 R9 M_A_CKE0 K9 R9
2 M_A_CKE0 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9
M_A_ODT0 K1 A1 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1

2 M_A_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1
M_A_CS#0 L2 A8 M_A_CS#0 L2 A8 M_A_CS#0 L2 A8 M_A_CS#0 L2 A8
2 M_A_CS#0 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8
M_A_RAS# J3 C1 M_A_RAS# J3 C1 M_A_RAS# J3 C1 M_A_RAS# J3 C1
2 M_A_RAS# RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
M_A_CAS# K3 C9 M_A_CAS# K3 C9 M_A_CAS# K3 C9 M_A_CAS# K3 C9
2 M_A_CAS# CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
M_A_WE# L3 D2 M_A_WE# L3 D2 M_A_WE# L3 D2 M_A_WE# L3 D2
2 M_A_WE# WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
M_A_DQSP2 F3 VDDQ#F1 H2 M_A_DQSP0 F3 VDDQ#F1 H2 M_A_DQSP6 F3 VDDQ#F1 H2 M_A_DQSP5 F3 VDDQ#F1 H2
2 M_A_DQSP2 DQSL VDDQ#H2 2 M_A_DQSP0 DQSL VDDQ#H2 2 M_A_DQSP6 DQSL VDDQ#H2 2 M_A_DQSP5 DQSL VDDQ#H2
M_A_DQSP1 C7 H9 M_A_DQSP3 C7 H9 M_A_DQSP4 C7 H9 M_A_DQSP7 C7 H9
2 M_A_DQSP1 DQSU VDDQ#H9 2 M_A_DQSP3 DQSU VDDQ#H9 2 M_A_DQSP4 DQSU VDDQ#H9 2 M_A_DQSP7 DQSU VDDQ#H9
M_A_DM2 E7 A9 M_A_DM0 E7 A9 M_A_DM6 E7 A9 M_A_DM5 E7 A9

2 M_A_DM2 DML VSS#A9 2 M_A_DM0 DML VSS#A9 2 M_A_DM6 DML VSS#A9 2 M_A_DM5 DML VSS#A9
M_A_DM1 D3 B3 M_A_DM3 D3 B3 M_A_DM4 D3 B3 M_A_DM7 D3 B3
2 M_A_DM1 DMU VSS#B3 2 M_A_DM3 DMU VSS#B3 2 M_A_DM4 DMU VSS#B3 2 M_A_DM7 DMU VSS#B3
E1 E1 E1 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
M_A_DQSN2 G3 VSS#G8 J2 M_A_DQSN0 G3 VSS#G8 J2 M_A_DQSN6 G3 VSS#G8 J2 M_A_DQSN5 G3 VSS#G8 J2
2 M_A_DQSN2 DQSL VSS#J2 2 M_A_DQSN0 DQSL VSS#J2 2 M_A_DQSN6 DQSL VSS#J2 2 M_A_DQSN5 DQSL VSS#J2
M_A_DQSN1 B7 J8 M_A_DQSN3 B7 J8 M_A_DQSN4 B7 J8 M_A_DQSN7 B7 J8
2 M_A_DQSN1 DQSU VSS#J8 2 M_A_DQSN3 DQSU VSS#J8 2 M_A_DQSN4 DQSU VSS#J8 2 M_A_DQSN7 DQSU VSS#J8
M1 M1 M1 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
M_A_DRAMRST# T2 VSS#P1 P9 M_A_DRAMRST# T2 VSS#P1 P9 M_A_DRAMRST# T2 VSS#P1 P9 M_A_DRAMRST# T2 VSS#P1 P9
2 M_A_DRAMRST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
M_A_ZQ1 L8 VSS#T1 T9 M_A_ZQ2 L8 VSS#T1 T9 M_A_ZQ3 L8 VSS#T1 T9 M_A_ZQ4 L8 VSS#T1 T9
B ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 B
B1 B1 B1 B1
2
2
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R311 VSSQ#B9 D1 R308 VSSQ#B9 D1 R9 VSSQ#B9 D1 R306 VSSQ#B9 D1
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8
240/F_4 240/F_4 240/F_4 240/F_4
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
1
1
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
RAM _DDR3L RAM _DDR3L RAM _DDR3L RAM _DDR3L
Vendor P/N Mfr. P/N
Hynix AKD5JGETW00--H5TC4G63AFR-PBA
Hynix AKD5JGETW15 ( WIN BSQ ) H5TC4G63AFR-PBA
Micron AKD5JGSTL15 ( WIN BSQ ) MT41K256M16HA-125:E

+DDR_VTT_RUN +DDR_VTT_RUN
Samsung AKD5PGST516 (WIN BSQ ) K4B4G1646Q-HYK0
M_A_RAS# R305 36/F_4 M_A_ODT0 R304 36/F_4
M_A_CAS# R303 36/F_4
M_A_WE# R288 36/F_4
M_A_BS0 R286 36/F_4
M_A_BS1 R267 36/F_4
PP1350 M_A_BS2 R298 36/F_4
Distributed around all DRAM devices (CHA and CHB) M_A_CKE0 R310 36/F_4
M_A_CS#0 R296 36/F_4 +DDR_VTT_RUN
M_A_A0 R274 36/F_4
M_A_A1 R273 36/F_4
C7 C5 C6 C4 C10 C9 M_A_A2 R265 36/F_4
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 M_A_A3 R272 36/F_4 C168
M_A_A4 R289 36/F_4 0.1u/10V_4
M_A_A5 R281 36/F_4
M_A_A6 R266 36/F_4 M_A_CLKP0 R317 39/F_4 +DDR_VTT_RUN_A
M_A_A7 R256 36/F_4 M_A_CLKN0 R318 39/F_4
C M_A_A8 R259 36/F_4 C
M_A_A9 R268 36/F_4
Place these Caps near each X16 Memory Down M_A_A10 R294 36/F_4
M_A_A11 R269 36/F_4
M_A_A12 R279 36/F_4
M_A_A13 R257 36/F_4
C126 C160 C180 C132 C127 C152 C161 C188 C201 C150 M_A_A14 R264 36/F_4 M_A_CLKP0 C199 3.3p/50V_4 M_A_CLKN0
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 0.1u/10V_4 0.1u/10V_4 M_A_A15 R292 36/F_4
C181 C133 C153 C189 C141 C162 C182

1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
M1 solution
M1 solution PP1350
C134 C128 C154 C163 C190 C183 C135 PP1350
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
Vref_DQ
Vref_CA R322
R313 4.7K/F_4 +SMDDR_VREF_DQ0
4.7K/F_4 +SMDDR_VREF_DIMM
C155 C191
1
1u/6.3V_4 1u/6.3V_4
1
C178
C151 R314 0.047u/25V_4
2
R301 0.047u/25V_4 4.7K/F_4
2
4.7K/F_4
+SMDDR_VREF_DIMM
+DDR_VTT_RUN
D D
1
C143 C11 C146 C144

0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4
2
C121 C124 C117 C122 C148 C2

1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 10U/6.3V_6
+SMDDR_VREF_DQ0 Place these Caps near Memory Down CA & DQ pin

1
C171 C170 C175 C174

0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4
PROJECT : ZM8
2

1A
DDR3L MEMORY DOWNx16 A
1 2 3 4 5 6 7 8
5 4 3 2 1
BYTE2_16-23 BYTE0_0-7
On board memory (OBM)
+SMDDR_VREF_DIMM
+SMDDR_VREF_DIMM M8
U7
E3
BYTE3_24-31
M_B_DQ20 M_B_DQ20 3 +SMDDR_VREF_DIMM M8
U8
E3
BYTE1_8-15
U6
E3
BYTE6_48-55
BYTE4_32-39
U5
E3
BYTE5_40-47
BYTE7_56-63
M_B_DQ41 M_B_DQ41 3
13
+SMDDR_VREF_DQ1 H1 VREFCA DQL0 F7 M_B_DQ19 +SMDDR_VREF_DQ1 H1 VREFCA DQL0 F7 M_B_DQ2 +SMDDR_VREF_DQ1 H1 VREFCA DQL0 F7 M_B_DQ55 +SMDDR_VREF_DQ1 H1 VREFCA DQL0 F7 M_B_DQ46
VREFDQ DQL1 M_B_DQ19 3 VREFDQ DQL1 M_B_DQ2 3 VREFDQ DQL1 M_B_DQ55 3 VREFDQ DQL1 M_B_DQ46 3
F2 M_B_DQ21 F2 M_B_DQ5 F2 M_B_DQ49 F2 M_B_DQ44
3 M_B_A[15:0] DQL2 M_B_DQ21 3 DQL2 M_B_DQ5 3 DQL2 M_B_DQ49 3 DQL2 M_B_DQ44 3
M_B_A0 N3 F8 M_B_DQ18 M_B_DQ18 3 M_B_A0 N3 F8 M_B_DQ3 M_B_DQ3 3 M_B_A0 N3 F8 M_B_DQ54 M_B_DQ54 3 M_B_A0 N3 F8 M_B_DQ42 M_B_DQ42 3
M_B_A1 P7 A0 DQL3 H3 M_B_DQ17 M_B_A1 P7 A0 DQL3 H3 M_B_DQ1 M_B_A1 P7 A0 DQL3 H3 M_B_DQ52 M_B_A1 P7 A0 DQL3 H3 M_B_DQ40
A1 DQL4 M_B_DQ17 3 A1 DQL4 M_B_DQ1 3 A1 DQL4 M_B_DQ52 3 A1 DQL4 M_B_DQ40 3
M_B_A2 P3 H8 M_B_DQ22 M_B_A2 P3 H8 M_B_DQ7 M_B_A2 P3 H8 M_B_DQ50 M_B_A2 P3 H8 M_B_DQ47
M_B_A3 N2 G2 M_B_DQ16 M_B_A3 N2 G2 M_B_DQ4 M_B_A3 N2 G2 M_B_DQ48 M_B_A3 N2 G2 M_B_DQ45
M_B_A4 P8 H7 M_B_DQ23 M_B_A4 P8 H7 M_B_DQ6 M_B_A4 P8 H7 M_B_DQ51 M_B_A4 P8 H7 M_B_DQ43
M_B_A5 P2 M_B_A5 P2 M_B_A5 P2 M_B_A5 P2
M_B_A6 R8 A5 M_B_A6 R8 A5 M_B_A6 R8 A5 M_B_A6 R8 A5
M_B_A7 R2 A6 D7 M_B_DQ27 M_B_A7 R2 A6 D7 M_B_DQ15 M_B_A7 R2 A6 D7 M_B_DQ35 M_B_A7 R2 A6 D7 M_B_DQ59
A7 DQU0 M_B_DQ27 3 A7 DQU0 M_B_DQ15 3 A7 DQU0 M_B_DQ35 3 A7 DQU0 M_B_DQ59 3
M_B_A8 T8 C3 M_B_DQ24 M_B_DQ24 3 M_B_A8 T8 C3 M_B_DQ12 M_B_DQ12 3 M_B_A8 T8 C3 M_B_DQ32 M_B_DQ32 3 M_B_A8 T8 C3 M_B_DQ61 M_B_DQ61 3
M_B_A9 R3 A8 DQU1 C8 M_B_DQ30 M_B_A9 R3 A8 DQU1 C8 M_B_DQ14 M_B_A9 R3 A8 DQU1 C8 M_B_DQ39 M_B_A9 R3 A8 DQU1 C8 M_B_DQ63
D A9 DQU2 M_B_DQ30 3 A9 DQU2 M_B_DQ14 3 A9 DQU2 M_B_DQ39 3 A9 DQU2 M_B_DQ63 3 D
M_B_A10 L7 C2 M_B_DQ25 M_B_DQ25 3 M_B_A10 L7 C2 M_B_DQ13 M_B_DQ13 3 M_B_A10 L7 C2 M_B_DQ33 M_B_DQ33 3 M_B_A10 L7 C2 M_B_DQ60 M_B_DQ60 3
M_B_A11 R7 A10/AP DQU3 A7 M_B_DQ26 M_B_A11 R7 A10/AP DQU3 A7 M_B_DQ10 M_B_A11 R7 A10/AP DQU3 A7 M_B_DQ38 M_B_A11 R7 A10/AP DQU3 A7 M_B_DQ58
M_B_A12 N7 A2 M_B_DQ29 M_B_DQ29 3 M_B_A12 N7 A2 M_B_DQ9 M_B_DQ9 3 M_B_A12 N7 A2 M_B_DQ37 M_B_DQ37 3 M_B_A12 N7 A2 M_B_DQ56 M_B_DQ56 3
M_B_A13 T3 A12/BC DQU5 B8 M_B_DQ31 M_B_A13 T3 A12/BC DQU5 B8 M_B_DQ11 M_B_A13 T3 A12/BC DQU5 B8 M_B_DQ34 M_B_A13 T3 A12/BC DQU5 B8 M_B_DQ62
M_B_A14 T7 A3 M_B_DQ28 M_B_A14 T7 A3 M_B_DQ8 M_B_A14 T7 A3 M_B_DQ36 M_B_A14 T7 A3 M_B_DQ57
M_B_A15 M7 M_B_A15 M7 M_B_A15 M7 M_B_A15 M7
A15 PP1350 A15 PP1350 A15 PP1350 A15 PP1350
3 M_B_BS[2:0]
M_B_BS0 M2 B2 M_B_BS0 M2 B2 M_B_BS0 M2 B2 M_B_BS0 M2 B2
M_B_BS1 N8 BA0 VDD#B2 D9 M_B_BS1 N8 BA0 VDD#B2 D9 M_B_BS1 N8 BA0 VDD#B2 D9 M_B_BS1 N8 BA0 VDD#B2 D9
M_B_BS2 M3 BA1 VDD#D9 G7 M_B_BS2 M3 BA1 VDD#D9 G7 M_B_BS2 M3 BA1 VDD#D9 G7 M_B_BS2 M3 BA1 VDD#D9 G7
BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
M_B_CLKP0 J7 VDD#N1 N9 M_B_CLKP0 J7 VDD#N1 N9 M_B_CLKP0 J7 VDD#N1 N9 M_B_CLKP0 J7 VDD#N1 N9
3 M_B_CLKP0 CK VDD#N9 CK VDD#N9 CK VDD#N9 CK VDD#N9
M_B_CLKN0 K7 R1 M_B_CLKN0 K7 R1 M_B_CLKN0 K7 R1 M_B_CLKN0 K7 R1
3 M_B_CLKN0 CK VDD#R1 CK VDD#R1 CK VDD#R1 CK VDD#R1
M_B_CKE0 K9 R9 M_B_CKE0 K9 R9 M_B_CKE0 K9 R9 M_B_CKE0 K9 R9
3 M_B_CKE0 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9
M_B_ODT0 K1 A1 M_B_ODT0 K1 A1 M_B_ODT0 K1 A1 M_B_ODT0 K1 A1

3 M_B_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1 ODT VDDQ#A1
M_B_CS#0 L2 A8 M_B_CS#0 L2 A8 M_B_CS#0 L2 A8 M_B_CS#0 L2 A8
3 M_B_CS#0 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8
M_B_RAS# J3 C1 M_B_RAS# J3 C1 M_B_RAS# J3 C1 M_B_RAS# J3 C1
3 M_B_RAS# RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
M_B_CAS# K3 C9 M_B_CAS# K3 C9 M_B_CAS# K3 C9 M_B_CAS# K3 C9
3 M_B_CAS# CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
M_B_WE# L3 D2 M_B_WE# L3 D2 M_B_WE# L3 D2 M_B_WE# L3 D2
3 M_B_WE# WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
M_B_DQSP2 F3 VDDQ#F1 H2 M_B_DQSP0 F3 VDDQ#F1 H2 M_B_DQSP6 F3 VDDQ#F1 H2 M_B_DQSP5 F3 VDDQ#F1 H2
3 M_B_DQSP2 DQSL VDDQ#H2 3 M_B_DQSP0 DQSL VDDQ#H2 3 M_B_DQSP6 DQSL VDDQ#H2 3 M_B_DQSP5 DQSL VDDQ#H2
M_B_DQSP3 C7 H9 M_B_DQSP1 C7 H9 M_B_DQSP4 C7 H9 M_B_DQSP7 C7 H9
3 M_B_DQSP3 DQSU VDDQ#H9 3 M_B_DQSP1 DQSU VDDQ#H9 3 M_B_DQSP4 DQSU VDDQ#H9 3 M_B_DQSP7 DQSU VDDQ#H9
M_B_DM2 E7 A9 M_B_DM0 E7 A9 M_B_DM6 E7 A9 M_B_DM5 E7 A9

3 M_B_DM2 DML VSS#A9 3 M_B_DM0 DML VSS#A9 3 M_B_DM6 DML VSS#A9 3 M_B_DM5 DML VSS#A9
M_B_DM3 D3 B3 M_B_DM1 D3 B3 M_B_DM4 D3 B3 M_B_DM7 D3 B3
3 M_B_DM3 DMU VSS#B3 3 M_B_DM1 DMU VSS#B3 3 M_B_DM4 DMU VSS#B3 3 M_B_DM7 DMU VSS#B3
E1 E1 E1 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
M_B_DQSN2 G3 VSS#G8 J2 M_B_DQSN0 G3 VSS#G8 J2 M_B_DQSN6 G3 VSS#G8 J2 M_B_DQSN5 G3 VSS#G8 J2
3 M_B_DQSN2 DQSL VSS#J2 3 M_B_DQSN0 DQSL VSS#J2 3 M_B_DQSN6 DQSL VSS#J2 3 M_B_DQSN5 DQSL VSS#J2
M_B_DQSN3 B7 J8 M_B_DQSN1 B7 J8 M_B_DQSN4 B7 J8 M_B_DQSN7 B7 J8
3 M_B_DQSN3 DQSU VSS#J8 3 M_B_DQSN1 DQSU VSS#J8 3 M_B_DQSN4 DQSU VSS#J8 3 M_B_DQSN7 DQSU VSS#J8
M1 M1 M1 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
M_B_DRAMRST# T2 VSS#P1 P9 M_B_DRAMRST# T2 VSS#P1 P9 M_B_DRAMRST# T2 VSS#P1 P9 M_B_DRAMRST# T2 VSS#P1 P9
3 M_B_DRAMRST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
M_B_ZQ1 L8 VSS#T1 T9 M_B_ZQ2 L8 VSS#T1 T9 M_B_ZQ3 L8 VSS#T1 T9 M_B_ZQ4 L8 VSS#T1 T9
C ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 C
B1 B1 B1 B1
2
2
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R10 VSSQ#B9 D1 R307 VSSQ#B9 D1 R309 VSSQ#B9 D1 R312 VSSQ#B9 D1
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8
240/F_4 240/F_4 240/F_4 240/F_4
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
1
1
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
CHB@RAM _DDR3L CHB@RAM _DDR3L CHB@RAM _DDR3L CHB@RAM _DDR3L
Vendor P/N Mfr. P/N
Hynix AKD5JGETW00--H5TC4G63AFR-PBA
Hynix AKD5JGETW15 ( WIN BSQ ) H5TC4G63AFR-PBA
Micron AKD5JGSTL15 ( WIN BSQ ) MT41K256M16HA-125:E

+DDR_VTT_RUN +DDR_VTT_RUN
Samsung AKD5PGST516 (WIN BSQ ) K4B4G1646Q-HYK0
M_B_RAS# R290 36/F_4 M_B_ODT0 R302 36/F_4
M_B_CAS# R295 36/F_4
M_B_WE# R291 36/F_4
M_B_BS0 R284 36/F_4
M_B_BS1 R271 36/F_4
M_B_BS2 R282 36/F_4
M_B_CKE0 R300 36/F_4
M_B_CS#0 R283 36/F_4 +DDR_VTT_RUN
M_B_A0 R280 36/F_4
M_B_A1 R275 36/F_4
M_B_A2 R277 36/F_4
PP1350 M_B_A3 R278 36/F_4 C149
M_B_A4 R293 36/F_4 0.1u/10V_4
M_B_A5 R285 36/F_4
M_B_A6 R258 36/F_4 M_B_CLKP0 R315 39/F_4 +DDR_VTT_RUN_B
Place these Caps near each X16 Memory Down M_B_A7 R255 36/F_4 M_B_CLKN0 R316 39/F_4
B M_B_A8 R262 36/F_4 B
C131 C139 C159 C167 C187 C137 M_B_A9 R270 36/F_4
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 M_B_A10 R297 36/F_4
M_B_A11 R260 36/F_4
M_B_A12 R276 36/F_4
M_B_A13 R263 36/F_4
M_B_A14 R261 36/F_4
M_B_A15 R287 36/F_4 M_B_CLKP0 C197 3.3p/50V_4 M_B_CLKN0
C157 C158 C195 C194 C136

1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
C193 C138 C166 C165 C129 C164 C140 C185

1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
M1 solution
PP1350
C130 C192 C156 C186 C184 Vref_DQ

1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 R321
4.7K/F_4 +SMDDR_VREF_DQ1
1
C177
R320 0.047u/25V_4
2
4.7K/F_4
+DDR_VTT_RUN
+SMDDR_VREF_DIMM
1
C125 C120 C118 C119

A 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 C123 C1 C142 C145 C12 C147 A
1u/6.3V_4 10U/6.3V_6 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4
2
+SMDDR_VREF_DQ1 Place these Caps near Memory Down CA & DQ pin

1
C172 C176 C169 C173

0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4
2
PROJECT : ZM8
1A
DDR3L MEMORY DOWNx16 B
5 4 3 2 1
5 4 3 2 1
PWRON SEQUENCE(CPU) PWRON SEQUENCE(CPU) PP1800_PCH_S5
PP1800_PCH_S5 R483 10K_4
14
2
R200 *30K/F_4 PP3300_PCH_S5
SOC_PWRBTN# 1 3
6,11 SOC_PWRBTN# PCH_PWRBTN_L 11,27
Q22 PJA138K
6,11 SOC_RSMRST# SOC_RSMRST# 0_4 R441

PCH_RSMRST_L 27
D PP1800_PCH_S5 PP3300_PCH_S5 D
R433
100K/F_4
U17
1 6
VCCA VCCB
GND
7 SOC_SERIRQ SOC_SERIRQ 3 4 IRQ_SERIRQ
A B IRQ_SERIRQ 22,27
2 5 SWITCH_EN R136 *10K_4 PP1800_PCH_S5

GND OE PP1800_PCH_S5
2
*G2129TL1U R156 *10K_4 PP3300_EC
GND
PMC_SUSPWRDNACK 1 3
6 PMC_SUSPWRDNACK PCH_SUSPWRDNACK 27
R149 0_4
PP1800_PCH R148 10K_4
U18 Q46 PJA138K
6 1
5 SOC_KBC_SCI Y1 A1 EC_SCI_L 27
5 2
PP3300_EC VCC GND GND
4 3 Q48A PJ4N3KDW
6 SOC_KBC_SMI Y2 A2 EC_SMI_L 27
SLP_S3# 4 3 PCH_SLP_S3_L
6,11 SLP_S3# PCH_SLP_S3_L 27
PP1800_PCH_S5 R130 10K_4 *74LVC2G07GW
R131 0_4
5
R171 *10K_4
PP1800_PCH_S5
PP1800_PCH_S5 PP3300_EC
R497 *10K_4
C C
2
2
R403 *10K_4 PP3300_EC

SLP_S4# 1 6 PCH_SLP_S4_L
2,6,11,17 SLP_S4# PCH_SLP_S4_L 27
PMC_SUS_STAT# 1 3 PCH_SUS_STAT_L
6 PMC_SUS_STAT# PCH_SUS_STAT_L 27
Q48B PJ4N3KDW
Q13 *PJA138K
PP1800_PCH_S5
2
R155 *10K_4 PP3300_EC
SLP_S0IX# 1 3
6 SLP_S0IX# PCH_SLP_SX_L 27
USB3 OC(UB3) PP1800_PCH_S5 Q47 PJA138K

2
R461 10K_4 PP3300_EC

USB_OC0# 1 3
7,25 USB_OC0# USB_OC0_L 27
Q14 PJA138K
B B
USB2 OC(UB2)
PP1800_PCH_S5
2
R501 10K_4 PP3300_EC

USB_OC1# 1 3
7,23 USB_OC1# USB_OC1_L 27
Q21 PJA138K
Stuffing for notifying EC PP1800_PCH_S5
2
R135 10K_4 PP3300_PCH
SOC_PLTRST# 1 3
6,11 SOC_PLTRST# PLTRST# 20,22,27
Q15 PJA138K R144

A *100K_4 A

PROJECT :ZM8
Level Shfiter (SOC_EC) 1A

5 4 3 2 1
5 4 3 2 1
PP3300_DSW
LTE(MNC) HW RESET(CPU) PP1800_PCH
S5 Power Good(+3V_S5)(KBC)
PP1800_PCH R160 10K_4
15
2
R482 R489
EC_IN_RW_C 1 3 EC_IN_RW 4.7K_4 4.7K_4
7 EC_IN_RW_C EC_IN_RW 26
PP1800_PCH_S5
U33 +3V_LTE Q25 *PJA138K PP3300_PCH_S5_PG
PP3300_PCH_S5_PG 27
3
R518 10K_4 1 5
PP1800_PCH_S5 NC VCC
1
R177 0_4 Q20
D
C341 R228 D
2 0.1u/10V_4 10K_4 2
2
6 PMC_SUSCLK1 A
3
LTE SUSCLK
3
GND Y
4
LTE_SUSCLK 23 Touch Screen(TSN) Q16 2N7002K
1
2
PP3300_PCH_S5
74AUP1G07GW LTE SUSCLK is must required for bruce modem S0
6 TOUCH_INT_L_DX TOUCH_INT_L_DX D4 TS_INT# 2N7002K
+3V_LTE +3V_LTE TS_INT# 17
RB501V-40
1
D31
6 TOUCH_INT#
RB501V-40
R217 10K_4 R197 R227 9/24 Add diode for leakage
PP1800_PCH_S5
10K_4 10K_4 S5
7 LTE_DISABLE# PP1800_PCH S0iX Power Good(KBC) PP3300_DX
LTE_DISABLE_L 23
Track Pad(TPD)
2
LTE_DISABLE for proto type only, can remove at MP stage if S0ix is not needed
2
1 6 5 Q32 FDV301N
Q29A 7 I2C_0_SDA_R I2C_0_SDA_R 1 3 I2C_0_SDA I2C_0_SDA 26 R224
4
Q29B 3G@PJ4N3KDW 4.7K_4
3G@PJ4N3KDW
PP1800_PCH_S5 +3V_LTE R509 *0_4 R515 2.2K_4 R189

PP1000_PCH_SX_PG 27
4.7K_4
PP1800_PCH
TP_PWR
3
R519 2.2K_4
C R216 R195 R229 *10K_4 +3V_LTE
C
2
10K_4 *10K_4 1VS0IX_PG_2 2
I2C_0_SCL_R 1 3 I2C_0_SCL
LTE_WAKE_L 23 7 I2C_0_SCL_R I2C_0_SCL 26
3
Q34
1
6 LTE_WAKE#
2
PP1000_PCH_SX R241 4.7K_4 1VS0IX_PG_12 C102 SX@DTC144EUA

3
Q35 FDV301N Q40 1000P/50V_4

LTE_WAKE(OD) 5 6 1 SX@MMBT3904-7-F
1
C108
Q30A R517 *0_4 *1000P/50V_4
4
*3G@PJ4N3KDW Q30B
*3G@PJ4N3KDW
LTE_WAKE# R244 0_4 LTE_WAKE_L

PP3300_DX
PP1800_PCH There is internal pulled up in QRI module to
R219 10K_4
3.3V, but for more modules , keep stuffing
+3V_LTE pulled up R219
eDP control pin(LDS)
2
PP1800_PCH R330 *10K_4 R221

SIM_DET_C 1 3 SIM_DET Q41A PJ4N3KDW 4.7K_4
7 SIM_DET_C SIM_DET 23 4 3
SOC_DISP_ON_C SOC_DISP_ON 17
4 SOC_DISP_ON_C
LTE_SIM DET Q27 PJA138K reserve R232 0 ohm on SIM_DET line for difference R199
PP1350_PCH_SX_PG 35
R232 *0_4 design of various cards 4.7K_4
5
R326 10K_4
3
WIFI(NGF) PP1800_PCH
R331 10K_4
PP3300_DX
1.35VS0IX_PG_2 2
2
U11 PP1800_PCH_S5 +WL_VDD R329 *10K_4
PP1800_PCH
3
B R35 10K_4 1 5 SOC_DPST_PWM_C 1 6 Q31 B
PP1800_PCH_S5
1
NC VCC 4 SOC_DPST_PWM_C SOC_DPST_PWM 17
PP1350_PCH_SX R231 4.7K_4 1.35VS0IX_PG_1 2 C113 SX@DTC144EUA
1
R43 Q41B PJ4N3KDW Q37 1000P/50V_4

2 C25 10K_4 SX@MMBT3904-7-F
1
6 PMC_SUSCLK0 A 0.1u/10V_4 C109
2
*1000P/50V_4
3 4
GND Y WIFI_SUSCLK 20
WIFI SUSCLK 74AUP1G07GW PP3300_DX
+WL_VDD
0219 for layout smoothly, change
+WL_VDD pulled up power rail of level shifter
of WiFi from PP3300_WLAN to AC Detect(CPU)
PP1800_PCH_S5 R49 10K_4 R33 +WL_VDD R40
PP1800_PCH_S5
R42 10K_4 4.7K_4
10K_4 R39
6 WIFI_DISABLE#
RF_EN 20 4.7K_4 SOC_EDP_BLON 17
2
2
3
3
1 6 5 Q4 ACPRESENT 1 3 ACIN
6 ACPRESENT ACIN 26,27,28
Q7A SOC_EDP_BLON_C_Q 2
4
WIFI_DISABLE Q7B PJ4N3KDW Q23 PJA138K

3
PJ4N3KDW
Q3 2N7002K
PJA138K
1
2
+WL_VDD 4 SOC_EDP_BLON_C
A
R3 *10K_4 +WL_VDD R30 A
R1
1
WLAN_WAKE_L 20
*10K_4 100K_4
6 SOC_PMC_WAKE#
2
3
5 6 1
Q1A Quanta Computer Inc.

4
*PJ4N3KDW Q1B
WIFI WAKE(OD) *PJ4N3KDW
PROJECT : ZM8
SOC_PMC_WAKE# R2 0_4 WLAN_WAKE_L Size Document Number Rev
1A
Level Shfiter (SOC_DEV)
5 4 3 2 1
5 4 3 2 1
SD/MMC CARD READER CONNECTOR (CRD)

16
This is full size SD card VCC_SD
CN7 30mils
D D
SD_WP_R 11
SD3_D3 R534 0_4 SD_DAT3 SD_CD#_R 10 WP 16 C363 C362 C358
5 SD3_D3 CD NC
5 SD3_CMD SD3_CMD R253 0_4 SD_CMD_R SD_DAT2 9 17 C359
SD3_CLK R247 0_4 SD_CLK_R SD_DAT1 8 DATA2 NC 10U/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
5 SD3_CLK DATA1
5 SD3_D0 SD3_D0 R246 0_4 SD_DAT0 SD_DAT0 7
SD3_D1 R234 0_4 SD_DAT1 6 DATA0
5 SD3_D1 VSS2
5 SD3_D2 SD3_D2 R537 0_4 SD_DAT2 SD_CLK_R 5
SD3_CD# R226 1K_4 SD_CD#_R VCC_SD 4 CLK
5,18 SD3_CD# VDD
SD3_WP R203 0_4 SD_WP_R 3 for EMI issue
5 SD3_WP VSS1
SD_CMD_R 2
GND
GND
GND
GND
R198 10K_4 SD_DAT3 1 CMD SD_WP_R SD_CLK_R
PP1800_PCH CD/DATA3
TAS_5-251301001000-6
12
13
14
15
C107 C111
*33P/50V_4 12P/50V_4
PP3300_DX
PP1800_PCH PP3300_DX
VCC_SD
C361
C U35 C
1u/6.3V_4
R535 R532 5 1
IN OUT
*4.7K_4 4.7K_4
4
IN
SDIO3_PWR_EN 3 2
ON/OFF GND
G5243AT11U C364
3
C365
Q51 4.7U/6.3V_4
PJA138K 0.1U/10V_4
2
5 SDIO3_PWR_EN#
1
B B
VCC_SD
R252 *47K_4 SD_CMD_R

R245 *47K_4 SD_DAT0
R233 *47K_4 SD_DAT1
R536 *47K_4 SD_DAT2
R533 *47K_4 SD_DAT3
A A

PROJECT : ZM8
1A
SDIO CardReader
5 4 3 2 1
1 2 3 4 5 6 7 8
eDP Power(LDS) PP3300_DX eDP(LDS)

C24
Touch
C17 U10 LCDVCC
100P/50V_4
1u/6.3V_4 5 1
G_1
IN OUT C22 D3 RB500V-40 SOC3V3_RSTOUT_L
27 TOUCH_RST_L 40
A 4 C21 C20 C28 15 TS_INT# TS_INT# A
IN 0.1u/10V_4 C23 I2C_5_SCL 39
7 I2C_5_SCL 38
R325 0_4 EDP_ON 3 2 *0.1u/10V_4 *2.2u/6.3V_6 22u/6.3V_8 I2C_5_SDA
15 SOC_DISP_ON ON/OFF GND 7 I2C_5_SDA 37
0.01u/16V_4 27 TS_EN TS_EN
R19 0_6 PP3300_TS_CN 36
PP3300_TS 35
R324 G5243AT11U sot23-5
C366 *0.1u/10V_4_NC 34
9/23 Reserved a 0402 capacitor for PP3300_TS_CN 33
LCD_VIN F1 KMC5S150RY24
100K_4 eDP 1 2 LCD_VIN 32
Max 1.5A VIN 31
30
9/10 swapping pin define between LCD_self_Test and LCDVCC power. 29
C30 C26
28
4.7u/25V_8 1000p/50V_4
Max 1.5A LCDVCC 27
26
eDP panel control(LDS) 15 SOC_DPST_PWM R344 0_4 EC_BL_PWM_CONN
9/17 Replaced R332/R341 & R346/R347 as EXC24CG900U
EC_BL_PWM_CONN
EC_BL_EN_CONN
25
24
R338 0_4 EDP_HPD_CONN 23
4 EDP_HPD EXC24CG900U 22
R333
C206 1 2 EDP_AUXN_R C202 0.1u/10V_4 EDP_AUXN_C 21
4 EDP_AUXN 1 2 20
4 3 EDP_AUXP_R C205 0.1u/10V_4 EDP_AUXP_C
4 EDP_AUXP EXC24CG900U 4 3 19
*100K_4 *0.1u/10V_4
1 2 L19 EDP_TXP0_R C204 0.1u/10V_4 EDP_TXP0_C 18
4 EDP_TXP0
B
4 EDP_TXN0
4 1 2 3 EDP_TXN0_R C203 0.1u/10V_4 EDP_TXN0_C 17 B
4 3 16
L20 R549 0_4 15
CCD PP1800_PCH 14
R334 2.2K_4 EC_BL_EN_CONN C367 *0.1u/10V_4_NC 13
15 SOC_EDP_BLON 150mA CCD_PWR 12
R336 USBP2+_R 11
9/10 Add 1.8 Run power for DMIC 10
USBP2-_R
EC_BL_DISABLE#
9/23 Add a 0ohm and reserve a 0402 capacitor for PP1800_PCH 9
27 EC_BL_DISABLE_L D8 RB500V-40 R335 0_4 *100K_4
DMIC(FCM) R340 600,0.3A DMIC_CLK 8
24 DMIC_CLK_L 7
R339 600,0.3A DMIC_DAT
24 DMIC_DAT_L 6
LED_R 5
23,27 LED_R 4
C209 C208 LED_G
7-Color LED
Touch Screen(TSN) *150p/50V_4 *150p/50V_4
23,27
23,27
LED_G
LED_B LED_B
3
2
1
G_0
CN8
R546 R547 R548
U9 *10K_4_NC *10K_4_NC *10K_4_NC
50203-04001-V01
PP3300_DSW A2 A1 PP3300_TS
IN OUT
C C
TS_EN TS_EN_R B2 B1
R16 *TS@0_4_NC EN GND
C19 2,6,11,14 SLP_S4# TPS22930 9/16 Reserved 10k ohm for LED_R/G/B signal
1u/10V_4 R550 TS@0_4
9/23 For touch screen sequence request, used S4# to enable PP3300_TS
CCD USB(FCM)
CCD power(FCM) R342 0_4
*DLW21HN900SQ2L
4 3
4 3 USBP2-_R
7 USBP2-
USBP2+_R
CCD_PWR 7 USBP2+
1 2
1 2
PP3300_DX L11
R337 0_6
R343 0_4
D D
C210 C214 C215 0.5A
1U/6.3V_4 *10p/50V_4 1000p/50V_4
PROJECT : ZM8
1A
LVDS/CCD/DMIC/TS
1 2 3 4 5 6 7 8
5 4 3 2 1
PIN7 OD PIN39 OD PIN49 OD
GOOGLE Debug Port(OTH)

50 pin BTB is MUST, don't use 42 pin
PIN14 OD
PIN19 OD
PIN22 OD
PIN28 OD
PIN30 OD
PIN37 OD
PIN38 OD
PIN41
PIN43
PIN44
PIN45
PIN46
PIN47
PIN48
OD
OD
OD
OD
OD
OD
OD
PIN50 OD
18
D Socket part number AXK750147G D
SOC SPI
CN10
1 2 PCH_SPI_CLK_R PCH_SPI_CLK_R 6
PCH_SPI_CS0#_R 3 1 2 4 PCH_SPI_SI_R
6 PCH_SPI_CS0#_R 3 4 PCH_SPI_SI_R 6
6 PCH_SPI_SO_R PCH_SPI_SO_R 5 6 PP1800_PCH_ME
SPI_HOLD#_BIOS 7 5 6 8
6 SPI_HOLD#_BIOS 7 8
9 10
11 9 10 12 0828 A13
11 12 SOC UART
13 14 GPIO_EC_RST# R212 10_4 EC_RST# 26,27
15 13 14 16 SOC_UART_RX_R
SOC_UART_TX_R 17 15 16 18 SOC_UART_PWR
R218 0_4 GPIO_SD_DECT 19 17 18 20
C 5,16 SD3_CD# C
EC_JTAG_TCK 21 19 20 22 GPIO_PWR_BTN# R210 10_4
27 EC_JTAG_TCK 21 22 PWR_BTN_L 26,27
27 EC_JTAG_TMS EC_JTAG_TMS 23 24 EC_JTAG_TDI EC_JTAG_TDI 27
EC_JTAG_TDO 25 23 24 26 EC_JTAG_RTCK R209 *0_4 EC_JTAG_TCK
27 EC_JTAG_TDO 25 26
EC JTAG 27 28 SYS_RESET# R193 0_4
27 28 SOC_REST_BTN# 6,11
PP3300_EC 29 30
31 29 30 32 EC_UART_RXD R208 0_4
EC UART 31 32 EC_UART0_RX 27
27 EC_UART0_TX R213 0_4 EC_UART_TXD 33 34 PP3300_EC
R214 0_4 PP3300_INA_R 35 33 34 36
PP3300_INA 35 36
29,31,32 I2C_SDA_INA_R R215 0_4 I2C_SDA_INA 37 38 I2C_SCL_INA R223 0_4 I2C_SCL_INA_R 29,31,32
R250 10_4 GPO_HPD 39 37 38 40 GPIO_SPI_WP
19 HDMI_MB_HP 39 40 GPIO_SPI_WP 6
5,27,33 H_PROCHOT# R254 *10_4 GPIO_PROC_HOT# 41 42
43 41 42 44
43 44 LID_OPEN_L 23,27
45 46
47 45 46 48
49 47 48 50
49 50
GD@AXK750147G
B B
7 SOC_UART_TX R206 0_4 SOC_UART_TX_R

PP3300_INA R205 4.7K_4 I2C_SCL_INA_R
27 PCH_UART_TXD R207 *0_4
R201 4.7K_4 I2C_SDA_INA_R
7 SOC_UART_RX R194 0_4 SOC_UART_RX_R
27 PCH_UART_RXD R211 *0_4
SOC_UART_PWR R192 *0_4 PP3300_EC

A R191 0_4 A
PP1800_PCH
PROJECT : ZM8
1A
Google Debug
5 4 3 2 1
5 4 3 2 1
HDMI Cost Reduced level shift (HDM) HDMI connector (HDM)

CN4
20
C51 0.1u/10V_4 INT_HDMITX2N_C R70 *0_4_NC INT_HDMITX2P_CONN 1 SHELL1 21
4 INT_HDMITX2N D2+ SHELL2
C53 0.1u/10V_4 INT_HDMITX2P_C INT_HDMITX2N_CONN 3 22
4 INT_HDMITX2P D2- SHELL3
INT_HDMITX1P_CONN 4 23
C55 0.1u/10V_4 INT_HDMITX1N_C L2 INT_HDMITX1N_CONN 6 D1+ SHELL4
4 INT_HDMITX1N D1-
C57 0.1u/10V_4 INT_HDMITX1P_C INT_HDMICLK-_C 4 3 INT_HDMICLK-_CONN INT_HDMITX0P_CONN 7
4 INT_HDMITX1P 4 3 D0+
INT_HDMICLK+_C 1 2 INT_HDMICLK+_CONN INT_HDMITX0N_CONN 9
C46 0.1u/10V_4 INT_HDMITX0N_C 1 2 D0- 2
4 INT_HDMITX0N D2 Shield
D C50 0.1u/10V_4 INT_HDMITX0P_C EXC24CG900U 5 D
4 INT_HDMITX0P D1 Shield 8
C44 0.1u/10V_4 INT_HDMICLK+_C R71 *0_4_NC INT_HDMICLK+_CONN 10 D0 Shield 11
4 INT_HDMICLK+ CK+ CK Shield
C41 0.1u/10V_4 INT_HDMICLK-_C INT_HDMICLK-_CONN 12 17
4 INT_HDMICLK- CK- GND
R84 *0_4_NC
R76 R73 R96 R89 R86 R81

Layout Notes: 620/F_4 620/F_4 620/F_4 620/F_4 620/F_4 620/F_4 L4 HDMI_DDCCLK_MB 15 13
DDC CLK CE Remote
Place decoupling CAPs INT_HDMITX2N_C 4
4 3
3 INT_HDMITX2N_CONN HDMI_DDCDATA_MB 16
DDC DATA NC
14
INT_HDMITX2P_C 1 2 INT_HDMITX2P_CONN
close to Connector 1 2 C236
C231
EXC24CG900U
HDMI_5V 18 *1000p/50V_4_NC *1000p/50V_4_NC
+5V
3
R87 *0_4_NC
Q12 R72 620/F_4 INT_HDMICLK+_C R90 *0_4_NC

PP3300_DX R83 *SHORT_4 PP3300_HDMI 2 HDMI_MB_HP 19
HP DET
2N7002K
1
R69 620/F_4 INT_HDMICLK-_C L5
INT_HDMITX1N_C 4 3 INT_HDMITX1N_CONN RV1 HDMI CONN
INT_HDMITX1P_C 1 4 3 2 INT_HDMITX1P_CONN 0127 change HDMI footprint
1
1 2 *5V/0.2p_4_NC
2
0806 Change the net name from EXC24CG900U
INT_HDMICLK+/-_CONN to INT_HDMICLK+/-_C R97 *0_4_NC
C C
R74 *0_4_NC
19
PP5000
HDMI DDC (HDM) PP1800_PCH L3 3
Q6
1 HDMI_5V
INT_HDMITX0N_C 4 3 INT_HDMITX0N_CONN IN OUT 2
INT_HDMITX0P_C 1 4 3 2 INT_HDMITX0P_CONN GND
1 2 AP2331SA-7
EXC24CG900U C39 D13
*220p/50V_4_NC *14V/38V/100P_4_NC
D26 R77 *0_4_NC
PP1800_PCH R55 4.7K_4 R63 4.7K_4 RB500V-40 HDMI_5V
2
0725 Reserve common choke for HDMI

HDMI_DDCCLK_SW 1 3 HDMI_DDCCLK_MB 0730 Stuff common choke for HDMI
4 HDMI_DDCCLK_SW
Q9 FDV301N
D27
R56 4.7K_4 R66 4.7K_4 RB500V-40 HDMI_5V
PP1800_PCH
HDMI-detect (HDM)
2
PP1800_PCH
HDMI_DDCDATA_SW 1 3 HDMI_DDCDATA_MB
4 HDMI_DDCDATA_SW
B B
Q10 FDV301N R351

10K_4
For ESD 4 INT_HDMI_HPD
3
PP5000
ESD1
HDMI_DDCCLK_MB 1 6 HDMI_DDCDATA_MB 2HDMI_MB_HP
1 6 HDMI_MB_HP 18
2 5
HDMI_MB_HP 3 2 5 4 Q42 R350
3 4 2N7002K 100K/F_4
*TVL ST23 04 AD0
1
EU2 *AZ1045-04F.R7G
EU1 *AZ1045-04F.R7G
INT_HDMITX1P_CONN 1 10 INT_HDMITX1P_CONN
INT_HDMICLK-_CONN 1 10 INT_HDMICLK-_CONN 1- NC
1- NC INT_HDMITX1N_CONN 2 9 INT_HDMITX1N_CONN
A
INT_HDMICLK+_CONN 2 9 INT_HDMICLK+_CONN 1+ NC A
1+ NC 3
3 GND
GND INT_HDMITX2P_CONN 4 7 INT_HDMITX2P_CONN
INT_HDMITX0N_CONN 4
2- NC
7 INT_HDMITX0N_CONN
INT_HDMITX2N_CONN 5
2- NC
6 INT_HDMITX2N_CONN
INT_HDMITX0P_CONN 5 6 INT_HDMITX0P_CONN 2+ NC
2+ NC PROJECT : ZM8
1A
HDMI
5 4 3 2 1
1 2 3 4 5 6 7 8
WIFI/BT COMBO (NGFF E KEY)(NGF)

PP3300_WLAN
+WL_VDD
20
R54 0_8
USI module
WLAN_OFF_L -->POWER DOWN LAN CHIP from EC C32 C33 C8 C3
WIFI_DISABLE_L(RF_EN) -->disable PCIe I/F from PCH 10u/6.3V_6 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
Intel module
WLAN_OFF_L -->Disable BT
WIFI_DISABLE_L(RF_EN) -->Disable WiFi or all wireless A20
CN2
A +WL_VDD A
NGFF 75
74 GND 73 NFC_NOT_ALLOWED
3.3Vaux RESERVED TP41
72 71
70 3.3Vaux RESERVED 69
NFC_ANT_N 68 NC GND 67 +WL_VDD
TP8 NFC_ANT_N PETn1
NFC_ANT_P 66 65
TP7 NFC_ANT_P PETp1
TP6 NFC_VDDANT 64 63
62 NFC_VDDANT GND 61
ALERT PERn1 PP1800_PCH
60 59 R5
2
58 I2C_CLK PERp1 57 *10K_4 Q2 *PJA138K WAKE/REQ 53, 55 OD
PIN56: disable PCIe I/F RF_EN 56 I2C_DATA GND 55 WLAN_WAKE_L
PIN54: power down CHIP 15 RF_EN
R31 0_4 PDN# 54 W_DISABLE# PEWake0# 53 PCIE_CLKREQ_WLAN#_Q
WLAN_WAKE_L 15
3 1PCIE_CLKREQ_WLAN#
27 WLAN_OFF_L 52 PDN# CLKREQ0# 51 PCIE_CLKREQ_WLAN# 5
R32 0_4 WLAN_RST
14,22,27 PLTRST# PERST0# GND
50 49
15 WIFI_SUSCLK SUSCLK_32KHz REFCLKN0 CLK_PCIE_WLANN 6
LTE_SOUT 48 47
23 LTE_SOUT 46 LTE_SOUT REFCLKP0 45 CLK_PCIE_WLANP 6
LTE_SIN
23 LTE_SIN LTE_SIN GND
NFC Security 44 43 R28 0_4
42 NC PETn0 41 PCIE_RX0-_WLAN 5
TP5 NFC_WI_IN
NFC_WI_IN PETp0 PCIE_RX0+_WLAN 5
TP4 NFC_SWP2_IO 40 39
NFC_ACTIVE 38 NFC_SWP2_IO GND 37
TP3 NC PERn0 PCIE_TX0-_WLAN 5
36 35
UART_CTS PERp0 PCIE_TX0+_WLAN 5
34 33
WIFI_UART_RX 32 UART_RTS GND
TP2 UART_Rx
31
R27 *10K_4 PDN# 30
SLOT A-SD KEY 29
+WL_VDD KEY KEY
28 27
26 KEY KEY 25
24 KEY KEY
KEY
23
WIFI_UART_TX 22 SDIO_RESET 21
TP1 UART_Tx SDIO_WAKE
20 19
18 UART_Wake SDIO_DAT3 17
LED#2 16 GND SDIO_DAT2 15
TP40 LED#2 SDIO_DAT1
B 14 13 B
12 PCM_IN SDIO_DAT0 11
10 PCM_OUT SDIO_CMD 9
8 PCM_SYNC
PCM_CLK
SDIO_CLK
GND
7 BT
LED#1 6 5
TP39 LED#1 USB_D- USBP3- 7
+WL_VDD 4 3
2 3.3Vaux GND USB_D+ 1 USBP3+ 7
3.3Vaux GND GND
NFC pin list
1.pin68-->NFC_ANT_N
76
77
WLAN_NGFF CONN(Type 2230)_80152-2181

2.pin66-->NFC_ANT_P
3.pin42-->NFC_WI_IN (1.8V)
4.pin40-->NFC_SWP2_IO (1.8V)
5.pin38-->NFC_ACTIVE (3.3V)
5.pin73-->NFC_NOT_ALLOWED (3.3V)
LTE Coexistence pin list (based on V0.2 spec 0811 CN2 DFHS75FR108 was EOD so use DFHS75FR105 for substitute.
1.pin48-->LTE_SOUT (3.3V)
2.pin46-->LTE_SIN (3.3V)
Video Codec (M.2 LGA 1216-S3) (VGA) , NOT USE 74

75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
U14
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PP3300_DX
1 39
+IMAGE_VDD +IMAGE_VDD 2 UIM_Power_In PETn0 40 PCIE_RX1-_IMAGE 5
UIM_Power_Out PETp0 PCIE_RX1+_IMAGE 5
3 41
R357 *0_8_NC 4 UIM_SWP GND 42
5 3.3V Reserved 43
C
6 3.3V Reserved 44 C
C220 C35 C37 C216 7 GND Reserved

*10u/6.3V_6_NC *0.1u/10V_4_NC *0.1u/10V_4 *0.1u/10V_4 Reserved
8 W/L 802.11A/B/G/N BT/FM 45MODULE AW-AM691N
9 ALERT# SDIO Reset 46
10 I2C_CLK SDIO Wake 47
I2C_DATA SDIO DAT3 48
11 SDIO DAT2 49
12 COEX1 SDIO DAT1 50
13 COEX2 SDIO DAT0 51
COEX3 SDIO CMD 52
14 SDIO CLK
15 SYSCLK
16 TX_Blanking 53
17 Reserved UART_WAKE 54
18 GND UART_RTS 55
19 Reserved UART_Rx 56
20 Reserved UART_Tx 57
21 GND UART_CTS
22 Reserved 58
23 Reserved PCMFR1 59
24 GND PCMOUT 60
+IMAGE_VDD 25 Reserved BT_PCMIN 61
26 Reserved PCMCLK 62
GND GND
63
27 W_DISABLE#2 64
R381 SUSCLK (32KHz) LED#2 65
28 LED#1 66
PP1800_PCH W_DISABLE#1 Reserved
*10K_4
2
29 67
PEWake# Reserved 68
PCIE_CLKREQ_IMAGE# 1 3 PCIE_CLKREQ_IMAGE#_Q 30 GND
5 PCIE_CLKREQ_IMAGE# CLKREQ# 69
Q44 *PJA138K
PLTRST# R95 *0_4_NC IMAGE_RST 31 USB_D- 70
32 PERST# USB_D+ +IMAGE_VDD
R362 *0_4_NC GND 71
33 GND 72
D D
6 CLK_PCIE_IMAGEN 34 REFCLKN0 3.3V 73
6 CLK_PCIE_IMAGEP REFCLKP0 3.3V
35
GND
36
5 PCIE_TX1-_IMAGE PERn0
37
5 PCIE_TX1+_IMAGE 38 PERp0
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108

PROJECT : ZM8
*VC@M.2 LGA 1216-S3 Size Document Number Rev
1A
WIFI / BT / Image Codec
1 2 3 4 5 6 7 8
5 4 3 2 1
D D
EMMC (MMC)
push-pull mode U15

EMMC_D0 H3 K6 PP1800_PCH
5 EMMC_D0
5 EMMC_D1 EMMC_D1 H4 DAT0 VCCQ1 AA5 for host interface
EMMC_D2 H5 DAT1 VCCQ2 W4 VCCQ_EMMC R369 0_6
5 EMMC_D2
5 EMMC_D3 EMMC_D3 J2 DAT2 VCCQ3 Y4
EMMC_D4 J3 DAT3 VCCQ4 AA3
5 EMMC_D4
EMMC_D5 J4 DAT4 VCCQ5 C238 C229 C230
5 EMMC_D5
5 EMMC_D6 EMMC_D6 J5 DAT5 0.1U/10V_4 0.1U/10V_4 4.7U/6.3V_4
EMMC_D7 J6 DAT6 T10
5 EMMC_D7 DAT7 VCC1 PP3300_PCH
U9
EMMC_CMD W5 VCC2 M6 for internal flash memory, 250mA
5 EMMC_CMD CMD VCC3
EMMC_CLK W6 N5 VCC_EMMC R411 0_6
5 EMMC_CLK CLK VCC4
C C
EMMC_RST# U5 K2 EMMC_VDDI
5 EMMC_RST# RST_n VDDI iNAND's internal power node C257 C264
0.1U/10V_4 4.7U/6.3V_4
M7
VSS1 P5
VSS2 R10 C260
VSS3 U8 0.1U/10V_4
VSS4
K4
VSSQ1 Y2
VSSQ2 Y5
VSSQ3 AA4
VSSQ4 AA6
VSSQ5
SDIN8DE2-16G-859
PP1800_PCH
B R409 *47K_4 EMMC_D0 B

R402 *47K_4 EMMC_D1 1st source Hynix: AKE3FG-TW03 ( Quanta buy ) H26M52103FMR
R393 *47K_4 EMMC_D2
R420 *47K_4 EMMC_D3
R395 *47K_4 EMMC_D4 2nd source Samsung: AKE2RF-T502 ( Quanta buy ) KLMAG2GEAC-B031
R386 *47K_4 EMMC_D5
R394 *47K_4 EMMC_D6
R419 *47K_4 EMMC_D7 3rd source Sandisk: AKE3RZ-T115 SDIN8DE2-16G-859
R377 *47K_4 EMMC_CMD
9/25 Update new Sandisk EMMC QP/N: AKE3RZ-T115
A A

PROJECT : ZM8
1A
EMMC
5 4 3 2 1
1 2 3 4
TPM (TPM)
22
4 x100nF (place close to device VDD/GND pins) PP3300_DX
R474
TPM_VDD 2.2_6
A A
TPM_VDD
1
C332 C333 C281 C278
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
R472
*20K_4 If stuff ST TPM,C250
change to 10uF
2
pin5,6,9,19,25,28 are difference between both (CH6101M9B02)

U30
TPM_GPIO 6 10
2 GPIO/NC6 VDD[4] 5 R473 0_4
NC2 VDD[3]/NC5 24
VDD[2]
near pin 21 as possible
R471 0_4 TPM_PP 7 19 R405 0_4
PP VDD[1]/NC19 C282 *10p/50V_4
B R475 *4.7K_4 13 B
TPM_VDD NC13 21
LCLK PCLK_TPM 7
22
LFRAME# LPC_LFRAME# 7,27
0411 FAE : install R342 value is 4K7, 14
NC14 17
and PIN7 wo an internal PD LAD3 LPC_LAD3 7,27
20
LAD2 LPC_LAD2 7,27
TPM SLB9655 23
LAD1 LPC_LAD1 7,27
26
LAD0 LPC_LAD0 7,27
8 28
NC8 NC28/LPCPD#
0411 FAE : a 0ohm between pin9 to LRESET signals
16 PLTRST# 14,20,27
LRESET#[1] 9 TPM_RST_R R470 0_4
LRESET#[2]/NC9
GND[4]/NC25
12
NC12 27
3 SERIRQ 15 R399 10K_4
GND[1]
GND[2]
GND[3]
NC3 NC15 TPM_VDD
1
NC1 SERIRQ_R R406 *0_4
C IRQ_SERIRQ 14,27 C
4
11
18
25
PROG IC OTHER(28P)SLB9655TT1.2FW4.32GOOG
R117 0_4
1211 co-layout ST and Infineon TPM, if change to ST,

R56,R57,R60,R72,R38, ST PN is ST33ZP24AR28PVSM
D D
PROJECT : ZM8
1A
TPM SLB9655
1 2 3 4
A B C D E
Thermal Sensor(THM) LTE power switch(MNC)

PP3300_THM
C36 0.1u/10V_4
Place oo PCB TOP
Remote Temp.
Base: PIN 1
C99 0.1u/10V_4
U21
PP5000_DSW
+3V_LTE
23
Emitter: PIN 2 3G@TPS22965DSGR
Collector: PIN 3
MAX 2.5A
PP3300_DSW 1 8
U12 TMP432ADGSR VIN_01 VOUT_02
3
10 1 Q36 C105 2 7
4 27
27
EC_SMB2_CLK
EC_SMB2_DATA 9
SCLK VCC
2
H_THRMDA 1
1U/6.3V_4 LTE_PWREN_R 3
VIN_02 VOUT_01
6 C104
USB/B connector(UB2) 4
SDA DP1 C38 MMBT3904LP-7 ON CT 0.1u/10V_4
2
ALERT# 8 3 2200p/50V_4 H_THRMDC PP5000_DSW 4 5
5 ALERT#
PAD
ALERT# DN1 VBIAS GND
OVERT# 7 4 H_THRMDA2 C101 0725 change IO board 40
OVERT# DP2 C100 470p/50V_4
pin connector footprint to
9
6 5 C40
GND DN2
3
2200p/50V_4 H_THRMDC2 Q43 2200p/50V_4 "50501-04001-001-40p-l"
ADDR=0x4C 1
MMBT3904LP-7
2
R202 0_4 LTE_PWREN_R
Place oo PCB BOT 27 PP3300_LTE_EN
Local Temp.
1
C103
Place oo PCB ? PP5000 DB CONN
Remote Temp. R190 *3G@0.047u/25V_4 2A
2
100K_4 40 41
39 42
38
37
LED_B 36
17,27 LED_B
PP3300_THM R383 *0_4 PP3300_DX USB2_PWR_EN 35
27 USB2_PWR_EN
LED_G 34
17,27 LED_G
R225 0_4 PP3300_DSW LED_R 33
17,27 LED_R
USB_OC1# 32
7,14 USB_OC1#
31
0916 Used pin33, pin34 and pin36 for LED_R/G/B signal USBP1- 30
7 USBP1-
USBP1+ 29
7 USBP1+
3 28 3
0730 Use pin27 for BAT_LED1 27
27 BAT_LED1
PP3300_DSW 26
0730 Remove power PP3300_RTC on pin25 25
PP3300_DX
24
23
+3V_LTE 22
21
2.5A 20
19
EC_RST#_R R365 0_4 OVERT# 18
27 EC_RST#_R
LTE_SOUT 17
20 LTE_SOUT
LTE_SIN 16
20 LTE_SIN
SIM_DET 15
15 SIM_DET
LTE_SUSCLK 14
15 LTE_SUSCLK
13
12
USB Switch Current Control(UBC) 0730 use pin12 for BAT_LED0
27 BAT_LED0
11
10
PP3300_PCH_S5 9
8
7
15 LTE_DISABLE_L LTE_DISABLE_L 6
25,27 USB_ILIM_SEL LTE_WAKE_L 5
15 LTE_WAKE_L
4
R220 10K_4 PP3300_DSW
3
2
2
1
1 3 USB2_ILIM_SEL R222 0_4 CN9
USB3_STATUS_L 25
2 2
Q28 *2N7002K_NC
Lid Switch (HSR)
PP3300_RTC R21 *100K_4

LID_OPEN_L 18,27
R18 R17
0_6 1K_4
D1 *5V/0.2p_4 D2 *5V/0.2p_4
1 2 1 2 LID_OPEN# 1 2
3
MR1
C16 YB8251ST23
1U/6.3V_4
1 1
0725 Add Lid Switch (HSR) schematic in MB from IO Board

PROJECT : ZM8
1A
DB/ALS/Thermal sensor/LID
A B C D E
5 4 3 2 1
PP1800_PCH
AUDIO CODEC (ADO) SOC DET(ADO)

PP1800_PCH
BOM Change to 0_4 due to material shortage
L14 60ohm@100MHz_4 PP1800_CODEC_AVDD R523

330K_4
C342
1U/6.3V_4
24 PP1800_PCH
R502 0_6 +5VA
5 DET_TRIGGER DET_TRIGGER
Close to PIN26 Close to PIN38
3
5 AJACK_MICPRES_L AJACK_MICPRES_L R109 10K_4
1
C323 C322 C324
C356 1U/16V_4 0.1U/10V_4 10U/6.3V_4 D30
C345 C344 C343 C330 C346 14V/38V/100P_4 2 HP_JD_L
D 0.1U/10V_4 1U/16V_4 1U/16V_4 1U/16V_4 0.1U/10V_4 10u/6.3V_4 D
2
9/15 Add D30 to protect against Q49
2N7002K
28
27
26
38
14
13
U31
excessive transient voltages.
1
DVDD
AVDD
HPVDD
SPKLVDD
SPKRVDD
DVDDIO
6 I2S_MCLK R478 0_4 CODEC_CLK_IN 35
MCLK SPKLP
16
15
L_SPK+
L_SPK-
HEADPHONE/Mic combo(ADO) combo jack
33 SPKLN 12 R_SPK+
5 I2S_BCLK_R BCLK SPKRP
5
5
5
I2S_LRCLK_R
I2S_DOUT_R
I2S_DIN_R
32
30
31
LRCLK
SDIN
SPKRN
11 R_SPK-
Normal Open
SDOUT
P/N: DFTJ06FR652
Normal open
37
7 I2C_1_SDA_R SDA
7 I2C_1_SCL_R 36 22 R521 0_4 MICBIAS SLEEVE R538 0_4 SLEEVE_R PIN1 --> L?
SCL MICBIAS SLEEVE_SENSE R129 0_4 PIN2 --> R?
C348 PIN3 --> GND/MIC?
R491 0_4 CODEC_INT_OD_L 34 1U/10V_4 PIN4 --> MIC/GND?
6 MUX_AUD_INT1# IRQ_L
PP1800_CODEC_AVDD R484 10K_4 RING2 R539 0_4 RING2_R PIN5 --> JD?
RING2_SENSE R126 0_4
19
PIN6 --> GND?
17 DMIC_DAT_L IN1/DMD
17 DMIC_CLK_L 18 8
RCVP C340 1U/10V_4 CODEC_MIC_L_P 20 IN2/DMC RCVP/LOUTL
RCVN C349 1U/10V_4 CODEC_MIC_L_N 21 IN3 9
IN4 RCVN/LOUTR 9/15 Replaced L6, L7 as 0ohm
39
MAX98090AETL+T 5
CODEC_C1P RCVN
C1P HPSNS
7 MIC_DET CN5
C
C313 JACKSNS SLEEVE_R 4 C
1U/16V_4 HPR L9 0_6 HPR_SYS 2

4 HPOUT-L R449 5.6_4 HPL HP_JD_L 6
CODEC_C1N 40 HPL 5
C1N 6 HPOUT-R R450 5.6_4 HPR
HPR HPL L8 0_6 HPL_SYS 1
RING2_R 3
23
REF C91 C98 COMBOJACK_2SJ3080-022111F
3
CPVDD 24 10P/50V_4 10P/50V_4
2 BIAS C83 C80
CPVSS
*100P/50V_4 *100P/50V_4
SPKRGND
SPKLGND
R451 R448
HPGND
*4.7K_4 *4.7K_4
DGND
AGND
C315 C314
1U/10V_4 1U/10V_4 SLEEVE_R D15 1 2 14V/38V/100P_4
HPR_SYS D20 1 2 14V/38V/100P_4

29
25
1
10
17
HPL_SYS D18 1 2 14V/38V/100P_4

C347 C355
1U/10V_4 2.2U/6.3V_4 RING2_R D14 1 2 14V/38V/100P_4
B
Audio Headset Switch
PP3300_RTC
Codec PWR 5V(ADO) B
10mils
AVDD1
PP5000
DIGITAL ANALOG
L15 100ohm@100MHz PP3300_ADO_SW +5VA
SLEEVE_SENSE L13 PBY160808T-181Y-N_2A_6
C360 RING2_SENSE
0.1U/10V_4
SLEEVE
RING2 C300 C335 C334
MICBIAS C293 0.1u/10V_4 10u/6.3V_4

*0.1u/10V_4 *10U/6.3V_6
13
16
15
14
R528 U34
2.2K_4
VDD1
VDD2
RING2
SLEEVE_SENSE
RING2_SENSE
SLEEVE
PP3300_RTC PP3300_RTC
MIC_DET R522 *0_4 RCVP 11
RCVN 12
MICP
TIP_SENSE
9 HPL
R526 330K_4 Internal Speaker(ADO)
MICN
R531 10K_4 5 DET_TRIGGER_SW R527 0_4 HP_JD R525 0210 Based on PDC request to
DET_TRIGGER
TS3A225E 330K_4 40mil for each signal change STD part
/MIC_PRESENT
PP3300_RTC follow 0c1 pin define CN12

L_SPK+ R506 0_6 L_SPK+_1
ADDR_SEL
R529 10K_4 I2C_MIC_SW_SDA 2 L_SPK- R505 0_6 L_SPK-_1 1

SDA 2 HP_JD_L R_SPK+ R504 0_6 R_SPK+_1 2
3 5
PGND
GND1
GND2
R530 10K_4 I2C_MIC_SW_SCL 1 R_SPK- R503 0_6 R_SPK-_1

A SCL C357 Q50 4 6 A
1U/6.3V_4 2N7002K C353 C352 C351 C350

TS3A225ERTER (QFN)
4
3
10
17
10P/50V_4 10P/50V_4 10P/50V_4 10P/50V_4 SPK_CONN_4P_50281-00401-001
AJACK_MICPRES_L
PROJECT : ZM8
1A
MAX98090/HP/SPK
5 4 3 2 1
5 4 3 2 1
USB3.0(UB3))
USB3PWR USB Charger(UBC)
D5 for modem dongle
80 mils (Iout=2A)
USB3PWR
USB3PWR insertion issue D25 for modem dongle USB3PWR insertion issue
PP5000
80 mils (Iout=2A) USB3PWR
25
1
C196 D5
C200
1000p/50V_4 TVM0G5R5M261R_4
220U/6.3V/ESR35_3528 D25 U13
80 mils (Iout=2A)
2
C34 BZT52-B5V6S(5.6V) 1 12 USB3PWR
IN OUT
0.1U/10V_4
R47 *0_4 15 ILIM_LO
ILIM_LO 16 ILIM_HI
D ILIM_HI (RILIM_LO 1.07A) D
(RILIM_HI 1.96A)
9 R59 R62
DLW21HN900SQ2L 23 USB3_STATUS_L STATUS 17 25.5K/F_4 47K_4
4 3 USB_OC0# 13 GND_PAD
4 3 7,14 USB_OC0# 4 FAULT 14
USBP0-_L USB3_ILIM_SEL
USBP0+_L ILIM_SEL GND
1 2
1 2 USB3_PWR_EN 5 11 USBP0-_L
L1 27 USB3_PWR_EN EN DM_IN 10 USBP0+_L
6 DP_IN
CN3 27 USB_CTL1 USB3_CTL2 7 CTL1 2 USBP0-
PP3300_EC R64 10K_4 CTL2 DM_OUT USBP0- 7
R50 *0_4 USB3.0 CONN USB3_CTL3 8 3 USBP0+
R65 10K_4 CTL3 DP_OUT USBP0+ 7
1
2 1 VBUS
USBP0-_C TPS2546RTER/GL887T-OCGO
3 2 D-
R53 *0_4_NC USBP0+_C
EL2 4 3 D+ R61
USB3_RXN0 1 2 USB3_RXN0_R 5 4 GND
7 USB3_RXN0 5 SSRX- 100K_4
USB3_RXP0 4 3 USB3_RXP0_R 6
7 USB3_RXP0 6 SSRX+
7
7 GND 23,27 USB_ILIM_SEL
DLP11SN900HL2L USB3_TXN0_R 8
R51 *0_4_NC USB3_TXP0_R 9 8 SSTX-
9 SSTX+
2
13
12
11
10
R41 *0_4_NC 1 3 USB3_ILIM_SEL R57 10K_4 PP3300_EC
13
12
11
10
EL1
C29 0.1u/10V_4 USB3_TXN0_C 1 2
7 USB3_TXN0
C27 0.1u/10V_4 USB3_TXP0_C 4 3 Q8 2N7002K
7 USB3_TXP0
DLP11SN900HL2L
R38 *0_4_NC
C C
D9 1
USBP0-_C 2 5V/0.2p_4
D10 1
RILIM_LO is optional and the ILIM_LO pin may be left unconnected if the following conditions are met:
USBP0+_C 2 5V/0.2p_4 1. ILIM_SEL is always set high
D12 1 2. Load Detection - Port Power Management is not used
USB3_RXN0_R 2 5V/0.2p_4 3. Mouse / Keyboard wake function is not used
D11 5V/0.2p_4 If conditions 1 and 2 are met but the mouse / keyboard wake function is also desired, it is recommended to use
USB3_RXP0_R 1 2
RILIM_LO < 80.6 kΩ.
D7 1
USB3_TXN0_R 2 5V/0.2p_4 The following equation programs the typical current limit:
(1)
USB3_TXP0_R
D6
1 2
5V/0.2p_4 RILIM_XX corresponds to either RILIM_HI or RILIM_LO as appropriate. IOS_typ(mA) = 50,250/{RILIM_XX(KΩ)+0.1}
HOLE(OTH) HOLE1 HOLE3 HOLE4 EMI(EMC)

*H-C217D98P2 *H-C217I138D98P2 *H-C217D98P2
VIN PP1000_PCH
1
HOLE10
B *H-C217I138D98P2 B
C115 C58 C106 C292

HOLE9 HOLE6 HOLE11 *100P/50V_4_NC
*H-C217D98P2 *H-C217I98D98P2 *H-C98D98N *1000p/50V_4_NC *1000p/50V_4_NC 0.1U/25V_4_NC
1
HOLE5 HOLE8 0916 Remove Hole2

*H-C217D98G *H-C217D118G
7 6 7 6
8 5 8 5
9 4 9 4
HOLE7
1
2
3
1
2
3
PAD1 *O-ZM8-1
PAD2
PAD3
ROM WP#
1
2
3
4
5
PAD4
PAD5
A PAD6 SPI_WP_R R299 1K_4 A

SPI_WP_ME 6,27
PAD7 9/16 pin1 NC and pin2 connect to SPI_WP_R

PAD8

PROJECT : ZM8
USB3/Charger/Hole 1A

5 4 3 2 1
5 4 3 2 1
K/B (KBC) Track PAD BOARD CONN (TPD)
CN13
K/B ESD (EMC)
KB_ROW08 1
2
U25
I/O 1 I/O 4
6
5
KB_ROW09
PP5000_DSW
I2C_0_SDA
I2C_0_SCL
D22 1
D23 1
2 *5V/0.2p_4
2 *5V/0.2p_4
26
GND VDD
KB_ROW12 1 32 KB_ROW12 3 4 KB_ROW11
27 KB_ROW12 KB_ROW08 2 31 I/O 2 I/O 3
27 KB_ROW08 KB_ROW09 3 AZC099
27 KB_ROW09 KB_ROW11 4
D 27 KB_ROW11 KB_ROW10 5 CN11 D
27 KB_ROW10 6
TP_PWR L10 0_6 30mil +TPVDD 6 7
7 U23 I2C_0_SDA 5 6 G1 8
15 I2C_0_SDA 5 G2
KB_ROW05 8 KB_ROW03 1 6 KB_ROW05 I2C_0_SCL 4
27 KB_ROW05 I/O 1 I/O 4 15 I2C_0_SCL 4
KB_ROW06 9 3
27 KB_ROW06 10 2 5 C112 TRACKPAD_INT_L_CONN 2 3
GND VDD PP5000_DSW 2
KB_ROW03 11 0.1u/10V_4 1
27 KB_ROW03 KB_ROW02_SW 12 KB_ROW10 3 4 KB_ROW06 1
KB_COL00 13 I/O 2 I/O 3 TRACK_PAD_6P
27 KB_COL00 14
KB_ROW01 AZC099
27 KB_ROW01 KB_ROW04 15
27 KB_ROW04 KB_COL03 16 U26
27 KB_COL03
KB_COL02_SW 17 KB_ROW02_SW 1 6 KB_ROW01 TP_PWR 0721 Change footprint to
KB_ROW00 18 I/O 1 I/O 4 50506-00641-v01-6p-l
27 KB_ROW00 KB_COL05 19 2 5
27 KB_COL05 GND VDD PP5000_DSW
KB_COL04 20
27 KB_COL04 21 3 4
KB_ROW07 KB_COL00 KB_ROW04
27 KB_ROW07 KB_COL06 22 I/O 2 I/O 3 R230
27 KB_COL06 23
KB_COL07 AZC099 Track Pad interrupt *10K_4_NC
27 KB_COL07 24
KB_COL01
27 KB_COL01 KB_PWR_ON_L 25
R511 0_4 26 U24 DSW
18,27 PWR_BTN_L 27 1 6
KB_COL02_SW KB_COL05 6 TRACKPAD_INT# D24 R243 0_4
28 I/O 1 I/O 4 RB501V-40
29 2 5
GND VDD PP5000_DSW
30 D21
7 TRACKPAD_INT_DX
KB_COL03 3 4 KB_ROW00 RB501V-40
I/O 2 I/O 3
11KB_CONN_30P AZC099 VF = 0.34V
C DX C
TP_PWR
U22 U27
PP3300_DSW 0.5A
KB_ROW07 1 6 KB_COL07 A2 A1 R248 0_6
I/O 1 I/O 4 IN OUT
2 5 C110 TOUCHPANEL_PWR_R B2 B1 C116 C114
GND VDD PP5000_DSW EN GND
KB_COL04 3 4 KB_COL06 1U/6.3V_4 *10p/50V_4 1000p/50V_4
I/O 2 I/O 3
TPS22930
AZC099
KB_PWR_ON_L D28 1 2 5V/0.2p_4

27 TP_SHDN_L R249 0_4 TOUCHPANEL_PWR_R
KB_COL01 D29 1 2 5V/0.2p_4
R251
0220 Add and stuff ESD components on KB nets 100K_4
0221 swap pin of U1002~U1006 for layout
HOLELESS RESET
B
2-CHIP(KBC) PP3300_RTC B
5/15 modify,PU already at EC side
R516 C354
0.1u/10V_4
10K_4
1
U32
VDD
0725 Unused pin3 of U17 and change Connect to EC reset pin
PWR_BTN_L 2 12 EC_RST#
pin3 to test point(TP78) PW R_BTN_L EC_RST_L EC_RST# 18,27
Connect to GPIO on CPU
BATT_ENABLE 3 11 EC_IN_RW with PU to GPIO power
TP38 BATT_ENABLE EC_IN_RW EC_IN_RW 15
R507 0_4 ACPRESENT_4137 4 10 EC_ENTERING_RW
well
15,27,28 ACIN AC_PRESENT EC_ENTERING_RW EC_ENTERING_RW 27
Connect to EC pin C5 (must
KB_ROW02_SW 5 9 KB_ROW02 be low when EC IN RESET)
R513 KSO_SW KSO_INV KB_ROW02 27
KB_COL02_SW 6 8 KB_COL02
PAD_GND
*100K/F_4 KSI_SW KSI KB_COL02 27

GND
if not use ACIN, should tied to GND co-layout 4K4108 and 4K4137
7
13
SLG4K4213VTR(TDFN-12) SLG4K4108 (AL004108000)

A A
PP3300_RTC SLG4K4137 (AL004137000)
Pin 3,5,8,11 Open Drain 4K4137 PIN3 is BATT_ENABLE
4K4137 PIN4 is AC_PRESENT
R495 4.7K_4 KB_ROW02_SW
R508 *4.7K_4 KB_COL02
R512 *4.7K_4 EC_IN_RW
PROJECT : ZM8
KB/TP/FAN/HW Reset 1A

5 4 3 2 1
5 4 3 2 1
EC(KBC)
27
PP3300_EC_ANA PP3300_EC
PP3300_EC
PP3300_EC
9/9 CX18AG12019 EOD, change to CX5AG121002 and F/P change to rc0402
C71 C269 C77 C73 C79 C70 C64 C78
L12 2 1 PP3300_DSW
1u/6.3V_4 1u/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1000p/50V_4 1000p/50V_4 BLM15AG121SN1D/0.5A/120ohm_6 2.2_6 R397
C84 C86 C87
EC_ACIN R161 10K_4
2.2U/6.3V_4 10u/6.3V_4 0.1U/10V_4 PP3300_EC_ANA TOUCH_RST_L R463 10K_4
EC_RST# R432 10K_4
K13
F10
J10
D7
D3
D6
EC_LPCPD#
E6
E8
E9
R416 10K_4
J7
J9
J1
J6
U29 LID_OPEN_R R143 10K_4
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDC1
VDDC2
VDDC3
VDDC4
VDDA
C63 Add diode for leakage issue
C68 C67 PP3300_RTC
C66 1u/6.3V_4 0.1U/10V_4 0.01U/16V_4 LID_OPEN_R RB500V-40 D17 LID_OPEN_L R490 10K_4
D2 C65 C61
D VREFA_P D1 1u/6.3V_4 0.1U/10V_4 0.01U/16V_4
D
VREFA_M 18,23 LID_OPEN_L
B13
7,22 LPC_LAD0 PL3/LPC0AD0/T1CCP1/WT1CCP1 ECGND
A13 ECGND
7,22 LPC_LAD1 C12 PL2/LPC0AD1/T1CCP0/WT1CCP0 E10 EC_SMB0_CLK
7,22 LPC_LAD2 PL1/LPC0AD2/T0CCP1/WT0CCP1 PB2/I2C0SCL/T3CCP0 EC_SMB0_CLK 28
D11 D13 EC_SMB0_DATA EC_SMB0_DATA 28
7,22 LPC_LAD3 PL0/LPC0AD3/T0CCP0/WT0CCP0 PB3/I2C0SDA/T3CCP1
H12 LPC
7 CLK_PCI_EC D12 PM5/LPC0CLK M4
SMBUS INTF EC_PA6
7,22 LPC_LFRAME# PL4/LPC0FRAME_L/T2CCP0/WT2CCP0 PA6/I2C1SCL TP72
PCH_SUS_STAT_L R408 *0_4 EC_LPCPD# EC_LPCPD# F13 N2 EC_PA7 15,26,28 ACIN ACIN D19 RB500V-40 EC_ACIN
C13 PM0/LPC0PD_L/T4CCP0/WT4CCP0 PA7/I2C1SDA TP66
14,20,22 PLTRST# PL5/LPC0RESET_L/T2CCP1/WT2CCP1
F12 F4 EC_SMB2_CLK EC_SMB2_CLK 23
14 EC_SCI_L PM1/LPC0SCI_L/T4CCP1/WT4CCP1 PB6/I2C5SCL/SSI2RX/T0CCP0
H13 F3 EC_SMB2_DATA C93
PP3300_EC 14,22 IRQ_SERIRQ PM4/LPC0SERIRQ PB7/I2C5SDA/SSI2TX/T0CCP1 EC_SMB2_DATA 23
M9 PCH_WAKE_L 0.1U/10V_4
G2 PF0/NMI/SSI1RX/T0CCP0/TRD2 N9 PCH_WAKE_L 6
KB_COL00 PCH_RSMRST_L
26 KB_COL00 PK0/AIN16/SSI3CLK PF1/SSI1TX/T0CCP1/TRD1 PCH_RSMRST_L 14
RP1 10K_10P8R KB_COL01 G1 L10 EC_PF2
26 KB_COL01 PK1/AIN17/SSI3FSS PF2/NMI/SSI1CLK/T1CCP0/TRD0 TP24
10 1 KB_COL01 KB_COL02 H1 K10 EC_REST_L
9 2 KB_COL02 26 KB_COL02 H2 PK2/AIN18/SSI3RX PF3/SSI1FSS/T1CCP1/TRCLK L9 EC_REST_L 6
KB_COL07 KB_COL03 EC_SMI_L
26 KB_COL03 PK3/AIN19/SSI3TX PF4/T2CCP0/TRD3 EC_SMI_L 14
KB_COL06 8 3 KB_COL00 KB_COL04 B11 K9 CORE_PWROK_R
7 4 KB_COL03 26 KB_COL04 B12 PK4/RTCCLK/U7RX PF5/T2CCP1 N8 CORE_PWROK_R 6,11
KB_COL04 KB_COL05 EC_PF6
26 KB_COL05 PK5/U7TX PF6/I2C2SCL/T3CCP0 TP68
KB_COL05 6 5 KB_COL06 C11 M8 EC_PF7
26 KB_COL06 PK6/FAN0PWM1/WT1CCP0 PF7/I2C2SDA/T3CCP1 TP67
KB_COL07 A12 TO PCH L8 HWPG_S5
26 KB_COL07 PK7/FAN0TACH1/WT1CCP1 PG0/I2C3SCL/T4CCP0 K8 SOC_OVERRIDE#
26 KB_ROW00
KB_ROW00
KB_ROW01
M13
L12 PP0/T4CCP0
PG1/I2C3SDA/T4CCP1
PG2/I2C4SCL/T5CCP0
N7
M7
PCH_SUSPWRDNACK
PCH_SLP_SX_L
SOC_OVERRIDE#
PCH_SUSPWRDNACK
4
14
SM BUS/I2C PU(KBC)
26 KB_ROW01 PP1/T4CCP1 PG3/I2C4SDA/T3CCP1 PCH_SLP_SX_L 14
KB_ROW02 M5 K7 PCH_UART_RXD PCH_UART_RXD 18 BATT and CHARGER / LCD BL PP3300_EC
26 KB_ROW02 PP2/T5CCP0 PG4/I2C1SCL/U2RX/WT0CCP0
KB_ROW03 J12 L7 PCH_UART_TXD
26 KB_ROW03 PP3/T5CCP1 PG5/I2C1SDA/U2TX/WT0CCP1 PCH_UART_TXD 18
KB_ROW04 J13 KB N4 PCH_SUS_STAT_L EC_SMB0_CLK R400 4.7K_4
26 KB_ROW04 PP4/WT0CCP0 PG6/I2C5SCL/WT1CCP0 PCH_SUS_STAT_L 14
KB_ROW05 L5 N3 PCH_SLP_S3_L EC_SMB0_DATA R396 4.7K_4
26 KB_ROW05 D8 PP5/WT0CCP1 PG7/I2C5SDA/U2TX/WT1CCP0 K3 PCH_SLP_S3_L 14
KB_ROW06 PCH_PWRBTN_L
PP3300_EC 26 KB_ROW06 PP6/WT1CCP0 PH0/SSI3CLK/WT2CCP0 PCH_PWRBTN_L 11,14
KB_ROW07 K6 K4 PCH_SLP_S4_L
26 KB_ROW07 PP7/WT1CCP1 PH1/SSI3FSS/WT2CCP1 PCH_SLP_S4_L 14
KB_ROW08 D4 J4 LED_EC_B R544 *0_4_NC
26 KB_ROW08 E4 PQ0/WT2CCP0 PH2/FAN0PWM5/SSI3RX/WT5CCP0 J2 LED_B 17,23
KB_ROW09 EC_ACIN
26 KB_ROW09 PQ1/WT2CCP1 PH3/FAN0TACH5/SSI3TX/WT5CCP1
KB_ROW10 F5 G11 LPC_CLKRUN_L
26 KB_ROW10 N5 PQ2/WT3CCP0 PM2/LPC0CLKRUN_L/T5CCP0/WT5CCP0 E12 LPC_CLKRUN_L 7
KB_ROW11 EC_SLP_SX_L
26 KB_ROW11 PQ3/WT3CCP1 PL6/T3CCP0/WT3CCP0 EC_SLP_SX_L 34
R150 KB_ROW12 N6 E13 EC_PL7 0830
26 KB_ROW12 PQ4/WT4CCP0 PL7/T3CCP1/WT3CCP1 TP56 PP3300_THM
100K_4 THERMAL SENSOR
C R467 1K_4 PWR_BTN_L_R M2 G3 LED_EC_R R545 *0_4_NC EC_SMB2_CLK R353 4.7K_4 C
18,26 PWR_BTN_L M3 PA2/SSI0CLK PN2/FAN0PWM2/WT2CCP0 D10 EC_PN3 LED_R 17,23
LID_OPEN_R EC_SMB2_DATA R354 4.7K_4
PA3/SSI0FSS PN3/FAN0TACH2/WT2CCP1 TP14
6,25 SPI_WP_ME 100K_4 R145 EC_SPI_WP_D L4 FAN L11
PA4/SSI0RX PN4/FAN0PWM3/WT3CCP0 BAT_LED1 23
EC_PA5 N1 N12 PMU_BATLOW_L
TP69 F11 PA5/SSI0TX PN5/FAN0TACH3/WT3CCP1 TP65
EC_PB0 PERIPHERAL INTF
TP23 PB0/T2CCP0/U1RX
0725 Use pinB6 for PBAT_TEMP signal EC_PB1 E11
TP22 B6 PB1/T2CCP1/U1TX C4 H_PROCHOT# 5,18,33
PBAT_TEMP EC_PECI_RX 0915 Reserved 0ohm at LED_R/G/B for LED function selection
28 PBAT_TEMP PB4/AIN10/SSI2CLK/T1CCP0 PJ7/PECI0RX TP51
3
PROCHOT_EC A6 PECI C6 EC_PECI_TX
PB5/AIN11/SSI2FSS/T1CCP1 PJ6/PECI0TX TP17
SIO_SPI_MOSI_EC C2 Q45
TP54 C1 PD2/AIN13/SSI1RX/SSI3RX/WT3CCP0
SIO_SPI_MISO_EC
TP13 PD3/AIN12/SSI1TX/SSI3TX/WT3CCP1 H10 KBD_IRQ# PROCHOT_EC 2
B8 PM3/T5CCP1/WT5CCP1 H11 KBD_IRQ# 6
TP_SHDN_L LED_EC_G R543 *0_4_NC
26 TP_SHDN_L PN1/AIN22 PM6/FAN0PWM0/WT0CCP0 LED_G 17,23
BAT_LED0 N11 L13 EC_BL_DISABLE_L
23 BAT_LED0 PN6/FAN0PWM4/WT4CCP0 PM7/FAN0TACH0/WT0CCP1 EC_BL_DISABLE_L 17
PP3300_DX_EN A9 LOAD SW UNUSED M11 TS_EN R379 2N7002K
30 PP3300_DX_EN C8 PJ2/T2CCP0/U5RX PN7/FAN0TACH4/WT4CCP1 C9 TS_EN 17
PJ3_T2CCP1_U5TX PP3300_WLAN_EN
TP18 PP3300_WLAN_EN 30
1
WLAN_OFF_L D5 PJ3/T2CCP1/U5TX PJ0/T1CCP0/U4RX B9 EC_PWROK 100K_4
20 WLAN_OFF_L PJ4/C2_P/T3CCP0/U6RX PJ1/T1CCP1/U4TX C5 EC_PWROK 2
TOUCH_RST_L
PJ5/C2_M/T3CCP1/U6TX TOUCH_RST_L 17
PP3300_PCH_PG L2
35 PP3300_PCH_PG PC4/C1_M/U1RX/U4RX/WT0CCP0
R453 0_4 VCORE_EN_R L1
33 VCORE_EN K1 PC5/C1_P/U1TX/U4TX/WT0CCP1 L3
R446 0_4 IMVP_PWRGD_3V_R EC_UART0_RX EC_UART0_RX 18
32,33,35 IMVP_PWRGD_3V PC6/C0_P/U3RX/WT1CCP0 PA0/U0RX
SUSP_VR_EN K2 UART M1 EC_UART0_TX EC_UART0_TX 18
32 SUSP_VR_EN J3 PC7/C0_M/U3TX/WT1CCP1 PA1/U0TX
PP1050_PCH_PG
32,34 PP1050_PCH_PG PH4/SSI2CLK/WT3CCP0
PP1350_EN H4 VR CTRL
15
31 PP1350_EN
PP1000_PCH_SX_PG
R439 0_4 PP1000_PCH_SX_PG_R
PP5000_EN
H3
G4
PH5/SSI2FSS/WT3CCP1
PH6/SSI2RX/WT4CCP0 PC0/SWCLK/T4CCP0/TCK
C10
A10
EC_JTAG_TCK
EC_JTAG_TMS
EC_JTAG_TCK 18 EC HIB WAKE SOURCES
29 PP5000_EN PH7/SSI2TX/WT4CCP1 PC1/SWDIO/T4CCP1/TMS EC_JTAG_TMS 18 PP3300_RTC
PP5000_PGOOD A8 JTAG A11 EC_JTAG_TDO EC_JTAG_TDO 18
29 PP5000_PGOOD M12 PN0/AIN23 PC3/SWO/T5CCP0/TDO B10
PP3300_DSW_EN EC_JTAG_TDI EC_JTAG_TDI 18
29 PP3300_DSW_EN HIB_L PC2/T5CCP1/TDI
SIO_SPI_CLK_EC B2 A2
TP12 B1 PD0/AIN15/I2C3SCL/SSI1CLK/SSI3CLK/WT2CCP0 NC K12 PP3300_RTC
SIO_SPI_CS_L PP3300_RTC R141
TP53 PD1/AIN14/I2C3SDA/SSI1FSS/SSI3FSS/WT2CCP1 VBAT
PP3300_LTE_EN A4 N13 EC_WAKE_L 1K_4
23 PP3300_LTE_EN B4 PD4/AIN7/U6RX/WT4CCP0 WAKE_L
USB2_PWR_EN EC32K_X1 C326 18p/50V_4
23 USB2_PWR_EN PD5/AIN6/U6TX/WT4CCP1
1
EC_ENTERING_RW A3 N10 PWR_BTN_L D16 RB500V-40
26 EC_ENTERING_RW PD6/AIN5/U2RX/WT5CCP0 XOSC1
EC_PD7 B3 M10
0721 USB2_PWR_EN active high, check with EC TP19
USB_OC1_L F1 PD7/AIN4/NMI/U2TX/WT5CCP1 USB CHARGE CTRL XOSC0 K11
14 USB_OC1_L PE0/AIN3/U7RX GNDX TP73
EC_PE1 F2 R485 Y3 EC_WAKE_L
TP58 E1 PE1/AIN2/U7TX C3
EC_PE2 20M_4 32.768KHZ
TP57 PE2/AIN1 GNDA1
ICMNT E2 E3 R115 0_4
B 28 ICMNT PE3/AIN0 GNDA2 B
USB3_PWR_EN A5 EC32K_X2 C325 18p/50V_4
25 USB3_PWR_EN
3
USB_ILIM_SEL B5 PE4/AIN9/I2CSCL/U5RX A1
23,25 USB_ILIM_SEL PE5/AIN8/I2CSDA/U5TX GND1
USB_CTL1 A7 C7 ECGND Q18
25 USB_CTL1
3
USB_OC0_L B7 PE6/AIN21 GND2 D9 ECGND
14 USB_OC0_L PE7/AIN20 GND3 PJA138K
E5 Q19LID_OPEN_L C336 0.01U/16V_4 2
EC_BRD_ID1 K5 GND4 F9
PQ5/WT4CCP1 GND5 PJA138K
EC_BRD_ID2 M6 BRD ID H5 ACIN C337 0.1U/10V_4 2
EC_BRD_ID3 L6 PQ6/WT5CCP0 GND6 H9 R476
PQ7/WT5CCP1 GND7 J11 47K_4
1
GND8 J5 R477
G12 GND9 J8
TP61 47K_4
1
G13 OSC0 GND10
TP59 OSC1
R442 0_4 EC_RST#_R G10
18,26 EC_RST# RST_L
23 EC_RST#_R
C309 0.1U/10V_4 TM4E1G31H6ZRBI
SM BUS ARRANGEMENT TABLE

SM Bus 0 BATT and CHARGER
SM Bus 1 NA
HWPG(KBC)
SM Bus 2 THERMAL SENSOR
R494 0_4 HWPG_S5
15 PP3300_PCH_S5_PG
PP3300_EC
OD pin list
R172 R157 R158
A
EC_SLP_SX_L
EC_REST_L A
Stage EC_ID3 EC_ID2 EC_ID1
*100K_4 *100K_4 *100K_4 SUSP_VR_EN BAT_LED0
VCORE_EN
EC_BRD_ID1 EVT 0 0 0 PP1350_EN BAT_LED1
EC_BRD_ID2 PP5000_EN
EC_BRD_ID3 DVT1 0 0 1 PP3300_DSW_EN PCH_RSMRST_L
R152 R138 R139

SMBUS
DVT2 0 1 0
R462 R428 R430 R456 R132 R104 IRQ_SERIRQ
100K_4 100K_4 100K_4
100K_4 100K_4 100K_4 100K_4 100K_4 100K_4 Quanta Computer Inc.
EC_BL_DISABLE_L
0806 use 000 for Board ID of EVT PROJECT : ZM8
1A
KBC TI TM4E1G31H6ZRBI
5 4 3 2 1
5 4 3 2 1
Battery Charger (CRG)

28
+DC_IN_SS
PJ1 VA PR188
PQ33 PQ36 0.01/F_0612
5 RQ3E070BNFU7TB RQ3E070BNFU7TB
Adapter2+ 1 1
4 5 2 2 5 1 2 VCHGR_IN
Adapter1+ 3 3
3
PSID
2200P/50V_4
2
0.1U/25V_4
4
4
Adapter2-
PC192
PC194
1 PD5 PC198 PC197
Adapter1- P4SMAFJ20A *0.01U/25V_4 *0.1U/25V_4
D PC189 PC186 PC185 PC188 D
2
2
50278-0050N-001 1000P/50V_4 0.1U/25V_4 470p/50V_4 4700p/25V_4

PR186 PR187
2
SPR1 0_6 0_6

1
*SJ0402_NC
1
0724 Change DC IN
connector pin define
PR170 PR173 PC180

4.02K/F_6 4.02K/F_6 0.1U/25V_4
0.1U/25V_4
0.1U/25V_4
24715ACN
24715ACP
PC94
PC97
2200P/50V_4
10U/25V_8
10U/25V_8
*10U/25V_8
*10U/25V_8
24715LDO
*0.1U/25V_4
VA
PC195
PC196
PC111
PC110
PC112
PC113
PD6 PR180
DA2J10100L 10_12 PC182
1U/25V_6
1
2 1
ACN
ACP
2
5
PD8
PD4 3 16 24715LDO RB500V-40 PD7 *SS3040HE
DA2J10100L CMSRC REGN
PR178 0_6 PQ25 1 2
4 17 24715BST 4 RQ3E070BNFU7TB
1
ACDRV BTST
PC184 PC183
PR166 1U/25V_6 0.047U/50V_6
3
2
1
412K/F_4 20 18 24715DHI VIN PR73 PR85
VCC HIDRV 0.01/F_0612 PQ21 0.01/F_0612
PL8 AOL1413
6 2.2uH_7X7X1.8 1
ACDET 19 24715LX 1 2 2 5 1 2
PHASE 3
BAT-V
C C
5
PC175
PR64 *0.01U/25V_4 PC92 PC99 PC101 PC98 PC103 PC88
64.9K/F_4 PR185
10U/25V_8
IN- IN+
4
15 24715DLO *4.7_6
10U/25V_8
10U/25V_8
+ + + + +
*10U/25V_8
*10U/25V_8
0.1U/25V_6
LODRV 4
PR163 0_4 PC191

EC_SMB0_DATA 8 PU20 14 PQ22 *1000P/50V_4
3
2
1
SDA BQ24715RGRR GND RQ3E100BNFU7TB
PR164 0_4
EC_SMB0_CLK 9 PC181 PC178
SCL 13 24715SRP 0.1U/25V_4 0.1U/25V_4
PR70 100K/F_4 SRP
0731 Stuff PR170
PR68 10K/F_4 10 PC179
24715LDO CELL 0.1U/25V_4
12 24715SRN
5 SRN
15,26,27 ACIN ACOK
11 24715BATDRV
IOUT 7 BATDRV# PR167 4.02K/F_6
GND
GND
GND
GND
GND
PR72 IOUT
12.4K/F_4
21
22
23
24
25
PR162 0_6
27 ICMNT
PR65 0_4
PC176
100P/50V_4
PC114
0.1U/25V_4 BAT-V
PC107
B 10ms one-shot circuit 1000P/50V_4 B
JBAT1
2 B9
PP5000_CHG IN+ 1 A9 BAT-V
B8
PP5000 PP5000_DSW A8
PP5000_CHG IN- B7
A7
B6
PR58 PR49 PR51 PR52 A6 MBCLK
B5
100K/F_4 1.5M/F_4 0_4 *0_4 A5
PC66 PC63 MBDATA
0.01U/16V_4 *100P/50V_4 B4
PR61 PR63 A4 PBAT_TEMP
B3 PBAT_TEMP 27
0_4 0_4 A3 PR175
B2
8
PP5000_CHG
100_4
PC77 3 A2 PR176 PR172
0.01U/16V_4 + 1 B1 100_4 100_4
IOUT 2 A1 PR168
- PU11A 51202-00901-V01 1M_4
BA10393F-GE2 DFHD09MR104
EC_SMB0_DATA 27
PP3300_EC
4
PC68 PC69 PC81

0.01U/16V_4 *100P/50V_4 PC73 PC83
*0.1U/25V_4
*0.1U/25V_4 *0.1U/25V_4 PR174 EC_SMB0_CLK 27
*0_4 PC177
PR59 0.1U/10V_4
34K/F_4 PP5000_CHG PP5000_CHG
PC76 BA10393F-GE2
BZT52-B5V6S(5.6V)
BZT52-B5V6S(5.6V)
1
1
*100P/50V_4 PU11B - 6
7
PD10
PD9
+ 5
PP5000_CHG
PR57 PR53
2
6
4
100K_4 PR60 100K/F_4
1.5M/F_4 0729 change BATTconnector pin define as
IN+
OUT
IN-
PC72
0.01U/16V_4 PD1 same as ZM7 connector
PU10 DA2J10100L
5 IMVP7_PROCHOT#
8
NL27WZ00USG INA199B1DCKR 0724 Update BATT connector schematic

3
2 1 PC78 PC82 PU12

100P/50V_4 100P/50V_4 PR66 0627 change BATTconnector
1 412K/F_4
GND
REF
PQ12 2 7 for S3 leakage

V+
A 2N7002K 2 2 1 A
1
PC67
DA2J10100L PD2
0.1U/25V_4
1
6 PD3 PR165 0_6

3 PP5000_CHG
5
RB500V-40
PR50
221K/F_4 PC79
0.1U/25V_4
4

PROJECT :
1A
Charger(BQ24715)
5 4 3 2 1
5 4 3 2 1
JP8
0.001/F_3720
System power 3V/5V (SYP)
3VPCU_VIN 1 2 VIN
2200p/50V_6
4.7u/25V_8
4.7u/25V_8
10U/25V_8
10U/25V_8
10U/25V_8
PR83
PR82 0_4 *499K/F_4 PR71
1/F_6
27 PP3300_DSW_EN
670_BST 670_BST1
PP3300_DSW
PC108
PC106
PC104
PC102
PC105
PC109
D D
PC86
10
1
PR78 0.1u/50V_6 PP3300_DSW
*100K/F_4 PL7
VIN
BST
2.2uH_7X7X1.8
670_EN 13 8 670_SW 1 2
EN SW1
4 9
PG SW2
0.1u/50V_6
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
3 15 JP11
LP# PU14 SW3 PR55 0.001/F_3720
670_ENLDO 12 NB670GQ-Z 16 *4.7_6
ENLDO SW4
PP3300_RTC 6 7 3.3 Volt +/- 5% PP3300_INA

LDO VOUT
PR76
*0_4 14 2
TDC : 6A PC116
AGND PGND PEAK : 8A
PC54
PC57
PC58
PC56
PC55
PC93 PC64 0.1u/25V_4
VCC
CLK
PC90 *680p/50V_6
10u/6.3V_6
*0.1u/16V_4
Width : 240mil 1 2
11
4
PP5000_DSW
Vs
3VPCU_VIN 2
VIN- 5
PC95 SCL I2C_SCL_INA_R 18,31,32
1u/6.3V_4 VIN 1 6
VIN+ SDA I2C_SDA_INA_R 18,31,32
PC119
0.1U/25V_4 PU16
PR81 7
3
A0
8
Address: 0x42
GND A1
C
0_6
(1000010) C
INA219AIDCNR
GND GND
0212 unstuff PU22
0225 stufff PU22 back for Rambi EVT3
JP12
0.001/F_3720
PR157 0_4 5VPCU_VIN 1 2 VIN

PP5000_EN
27 PP5000_EN
10U/25V_8
10U/25V_8
10U/25V_8
10U/25V_8
10U/25V_8
0.1u/50V_6
PR161 PR39
*499K/F_4 1/F_6 0725 Remove PCN2
671_BST 671_BST1
NB671_VCC
PC62
PC65
PC80
PC85
PC71
PC173
10/11 modify
10
1
PC49 PP5000
PR42 0.1u/50V_6 PL5
VIN
BST
B B
100K/F_4 3.3uH_7X7X1.8
13 8 671_SW 1 2
EN SW1
4 9
27 PP5000_PGOOD PG SW2
0.1u/50V_6
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
3 15 JP5
PR45 LP# PU8 SW3 PR149 0.001/F_3720
200K/F_4 5 NB671LGQ-Z 16 *4.7_6
NC1 SW4
6 7 PP3300_INA
PR155 PR47 NC2 VOUT 5 Volt +/- 5%
*0_4 0_4 14
AGND PGND
2
PC165
TDC : 3A PC75
0.1u/25V_4
PC19
PC21
PC22
PC23
PC20
PEAK : 4A
VCC
PC52 *680p/50V_6
FB
0.1u/16V_4 1 2
Width : 120mil
11
12
NB671_VCC
4
PC53 671_FB
IMAX= 10mA
Vs
1u/6.3V_4
VREF=0.604V PR48 5VPCU_VIN 2
PR44 82K/F_4 VIN- 5 I2C_SCL_INA_R
11K/F_4 SCL
1 6 I2C_SDA_INA_R
VIN VIN+ SDA
PC74
0.1U/25V_4 PU9
7
A0 PP3300_INA
PR43 3 8
GND A1
0_6
Address: 0x41
A INA219AIDCNR
(1000001) A
GND GND
0212 unstuff PU11
0225 stufff PU11 back for Rambi EVT3 Quanta Computer Inc.
PROJECT :
1A
SYSTEM 5V/3V (MPS670/671)
5 4 3 2 1
5 4 3 2 1
30
PP1800_PCH_S5_PG
35 PP1800_PCH_S5_PG PP3300_DX_EN
27 PP3300_DX_EN
D Other power system (DCD) PR104 *0_8

D
PP3300_DSW
PR116 0_8
PU18
PR115 *0_8 PP3300_WLAN_R A2 A1
PP3300_DX IN OUT PP3300_WLAN
PP3300_WLAN_EN PP3300_WLAN_EN_R B2 B1
27 PP3300_WLAN_EN EN GND
PC135 PR114 0_4 PC129
1u/10V_4 PR113 *0.1u/50V_6
100K/F_4 TPS22930
Close to output
PC134
*0.1u/50V_6
C C
PU17 PU6
PP3300_DSW
A2 A1 A2 A1
PP3300_DSW IN OUT PP3300_PCH_S5 IN1 OUT1 PP3300_DX
PP1800_PCH_S5_PG B2 B1 B2 B1
PC124 PR90 0_4 EN GND PC174 PC34 IN2 OUT2 PC146
1u/10V_4 PR89 *0.1u/50V_6 1u/10V_4 PP3300_DX_EN PP3300_DX_EN_R C2 C1 *0.1u/50V_6
B *100K/F_4 PR28 0_4 EN GND B
TPS22930
PC117 Close to output PR25 TPS22964CYZPR Close to output
*0.1u/50V_6 100K/F_4
A
Quanta Computer Inc. A
PROJECT :
1A
Load Switch
5 4 3 2 1
5 4 3 2 1
Memory core power (MCP) PEAK : 1A

TDC : 0.75A
Width : 40mil
+DDR_VTT_RUN
31
PC7 PC2
10u/6.3V_6 10u/6.3V_6
TDC : 0.38A
PEAK : 0.5A PP1350_VREF
Width : 20mil
D D
Greater than or equal 40mil

PC13
0.22u/10V_4
PP5000_DSW PP5000
0916 Changed to CS+0107FA00 for layout placement
PR3 PR4
PP3300_EC 0_4 *0_4 JP2
0.01/F_0805
PC4
22
21
10u/6.3V_6
10U/25V_8
10U/25V_8
10U/25V_8
PR1 51216_VIN 1 2
VIN
*100K/F_4 PQ1
VTTREF
VTT
VTTSNS
PAD
PAD
VTTGND
VLDOIN
PC8 RQ3E070BNFU7TB
1u/10V_4
5
PC3
20 12
2 PP1350_PGOOD PGOOD V5IN 2200p/50V_4
PC9
PC128
PC132
0830 51216_S3 17 14 51216_DRVH 4
S3 DRVH PR2 PC5
2/F_6 0.1u/50V_6
PR98 0_4 51216_S5 16 15 51216_VBST JP1
3
2
1
27 PP1350_EN S5 VBST
PU2 PL1 0.001/F_3720
TPS51216RUKR 1uH_7X7X1.8
PR96 51216_MODE 19 13 51216_SW 51216_SW +1.35VSUS_SRC 1 2 PP1350
100K/F_4 MODE SW
1
PR97 51216_TRIP 18 11 51216_DRVL
48.7K/F_4 TRIP DRVL
1.35 Volt +/- 5%
VDDQSNS
C PR94 C
26 10 4 2.2_8 TDC : 3.55A
REFIN
PAD PGND
GND
PEAK : 4.73A
PAD
PAD
PAD
REF
1 2
+
PC10
OCP : 6A
3
2
1
VREF=1.8V PQ2 PC125 10u/6.3V_6 PC6
6
25
24
23
7 RQ3E100BNFU7TB 1000P/50V_4 330u/2.5V_3528 Width : 160mil
2
51216_REF
51216_REFIN
PC133 PR109
0.1u/10V_4 0_6
Close to output cap

PR110
10K/F_4
VSFR_EN PR99 0_4 51216_S3

34 VSFR_EN
51216_S5 PR95 *0_4
OCP=6A PR106 PC138 S3 S5 +1.35VSUS REF VTT

30.1K/F_4 0.01u/25V_4 Mode Frequency Discharge mode
L ripple current
=(19-1.35)*1.35/(2.2u*400k*19) S0 1 1 ON ON ON
=1.425A 200K 400K Tracking Discharge
Vtrip=[6-(1.425/2)]*14mohm
=0.07402V S3 (mainon off) 0 1 ON ON OFF
100K 300K Tracking Discharge
Rlimit=0.07402/10uA*8=59.22Kohm
B B
S4/S5 0 0 OFF OFF OFF
PP3300_INA
PC1
0.1u/25V_4
1 2
4
Vs
51216_VIN 2
VIN- 5
SCL I2C_SCL_INA_R 18,29,32
1 6
VIN VIN+ SDA I2C_SDA_INA_R 18,29,32
PC127
0.1U/25V_4 PU1
7
A0 PP3300_INA
3 8
A
GND A1
Address: 0x49 A
(1001001)
INA219AIDCNR

GND PROJECT :
1A
DDR 1.35V(TPS51216)
5 4 3 2 1
5 4 3 2 1
Other power system (DCD)

JP4
VIN
1
0.001/F_3720
2 PP1050_PCH_VIN
PP1050_PCH
1.05Volt +/- 5%
TDC : 0.75A
PEAK : 1A
Width : 40mil PC27
PP3300_INA
32
IMVP_PWRGD_3V 0.1u/25V_4
27,33,35 IMVP_PWRGD_3V
1 2
2
PP3300_DX + PC12 PC11
10U/25V_8 0.1u/25V_6 JP9
4
PU3 TLV62150ARGTR 0.001/F_3720
Vs
11 1 PL2
PR11 PVIN SW 2.2uH_7X7X1.8 PP1050_PCH_VIN 2
1
10K/F_4 12 2 PP1050_PCH_SRC VIN- 5
D PVIN SW SCL I2C_SCL_INA_R 18,29,31 D
10 3 1 6
22u/6.3V_6
22u/6.3V_6
AVIN SW VIN VIN+ SDA I2C_SDA_INA_R 18,29,31
4 14 PC18
27,34 PP1050_PCH_PG PG VOS 0.1U/25V_4 PU4
PP1000_PCH_PG 13 5 R1 PR18 7
EN FB 100K/F_4 A0
PR103 9 6 PC16 3 8
0_4 SS/TR AGND 0.1u/10V_4 GND A1
8 15 1.05V_VSNS
PC15
PC14
PC131 DEF PGND
PAD
PAD
PAD
PAD
PAD
PAD
1000p/50V_4 7 16
FSW PGND
R2 PR12 INA219AIDCNR
316K/F_4
Address: 0x43
17
18
19
20
21
22
PC26 GND
3.3n/50V_4
V0=0.8*(R1+R2)/R2 GND
(1000011)
0212 unstuff PU21
0225 stufff PU21 back for Rambi EVT3
PP1050_PCH_SRC PR13 4.7K_4 PR19 *0_4
JP6 PP3300_INA
0.001/F_3720 PC42
VIN 1.0Volt +/- 5% 0.1u/25V_4
1 2 PP1000_PCH_S5_VIN PP1000_PCH_S5
TDC : 2.07A 1 2
PEAK : 2.75A
Width : 100mil
4
PP3300_DSW + PC33 JP10
10U/25V_8 PC32 PU7 TLV62130ARGTR 0.001/F_3720
Vs
0.1u/25V_6
11 1 PL4 PP1000_PCH_S5_VIN 2
PR30 PVIN SW 2.2uH_7X7X1.8 VIN- 5 I2C_SCL_INA_R
C C
1
12 2 PP1000_PCH_S5_SRC SCL
100K/F_4 PVIN SW
VIN 1 6 I2C_SDA_INA_R
10 3 VIN+ SDA
35 PP1000_PCH_S5_PG AVIN SW PC41
PC50
22u/6.3V_6
22u/6.3V_6
PP1000_PCH_S5_PG 4 14 0.1U/25V_4 PU5
PG VOS 7
SUSP_VR_EN 13 5 + A0
27 SUSP_VR_EN EN FB
R1 PR32 3 8
GND A1 PP3300_INA
PR128 9 6 100K/F_4
*330u/2V_7343_NC
0_4 SS/TR AGND PC156
8 15 0.1u/10V_4
DEF PGND 1V_VSNS GND
PC35
PC43
PAD
PAD
PAD
PAD
PAD
PAD
PC150 7 16 INA219AIDCNR
1000p/50V_4 FSW PGND
R2 PR31
Address: 0x47
17
18
19
20
21
22
390K/F_4
V0=0.8*(R1+R2)/R2
PC48 0804 Reserve 330uF on
(1000111)
3.3n/50V_4
PP1000_PCH_S5 for WiFi 0212 unstuff PU23
disconnec issue, or customer
has to make sure TIE jitter on 0225 stufff PU23 back for Rambi EVT3
PCIe TX is <400ps or smaller.
PP1000_PCH_S5_SRC PR34 4.7K_4 PR33 *0_4
B B
PP3300_PCH_S5
VIN PP1000_PCH
VIN PP1000_PCH_S5
PR101
4.7K_4
PR142 PR125
1M_6 22_8 PR148
3
1M_6 PR100 PP1000_PCH_PG

4.7K_4
3
2
3
PQ8 1.0V_PG_2 2
AO3404
IMVP_PWRGD_3V 2
1
3
2 2 PQ27
1
PR102 4.7K_4 1.0V_PG_1 2 PC126 DTC144EUA
PP1000_PCH
PR135 PQ30 PQ31 PQ26 1000P/50V_4
PP1000_PCH
1
PQ32 1M_6 2N7002K 2N7002K MMBT3904-7-F
1
DTC144EU PC159 PC130
1
*2.2n/50V_4 *1000P/50V_4
TDC : 2.07A
PEAK : 2.75A
Width : 100mil
A A

PROJECT :
+1.05V/+1V(TPS54318) 1A

5 4 3 2 1
5 4 3 2 1
CPU core power(VCP) 33
D D
JP7
0.001/F_3720
PR37
*2K/F_4
PC170
*330p/50V_4
AXG
PR147 VIN_VCC_GT 1 2
VIN
0_6
95833_BOOTG
1
PR151 PC168
0.1u/50V_6
10U/25V_8
10U/25V_8
2200p/50V_4
PR41 16.9K/F_4 1200p/50V_4 PC160 + PC59
PC40
PC39
PC157
PC158
PR38
2
+VCC_GFX 0.22u/25V_6 15u/25V_7343
D1
D1
D1
2
PC172 1.62K/F_4 124K/F_4 95833_UGATEG
*330p/50V_4
PR156 PC169 PC164 PR26
PR133 1 G1 PL6 0.001/F_3720
PR139 *10_4 0.47uH_7X7X1.8
0_4 10/F_4 270p/50V_4 95833_PHASEG S1/D2 9 95833_PHASEG 1 2 +VCC_GFX +VCC_GFX
8 VCC_AXG_SENSE VCC_AXG_SENSE_SRC 120P/50V_4
PC46
PC47
PC61
PC60
DCR=7.3mOhm
VSS_AXG_SENSE_SRC 8
PC51
PC44
PR144
*2.2_6
8 VSS_AXG_SENSE G2
1K/F_4
PR140 PC167 95833_ISUMNG 95833_LGATEG + +
1/F_4
Parallel 0_4 *0.01u/50V_4
+VCC_GFX
S2
S2
S2
PR134
340/F_4 *649/F_4
0.1u/10V_4
10u/6.3V_8
22u/6.3V_6
22u/6.3V_6
*2200p/50V_6
330u/2V_7343
330u/2V_7343
*10_4 PQ9 PEAK : 14A
PR154
PC155
7
6
5
FDMS3664S
OCP : 18A
PR27
PR35
PR36
Width : 600mil
PC166
Close to the
CPU side. 95833_ISUMPG
PC162
GFX_CORE Load Line :
*4700P/25V_4
PR138 0_4 *0.1u/25V_4
4.7n/25V_4
PP5000
-5.9mV/A for SDP=4.5W
PR24
PC163
C C
*100K/F_4
95833_NTCG
95833_ISUMPG
95833_COMPG
PR137 *0_4 PP5000_DSW
PP1000_PCH 95833_ISUMNG
PR23
PR22
0_6
1/F_6
PC161
PP3300_DX PP3300_DX 0.1u/25V_4
PR21
33
32
31
30
29
28
*499/F_4
VRON PD 100K AT EC
1u/16V_6
1u/10V_4
1.91K/F_4
*100K/F_4
*1.91K/F_4
PAD
NTCG
ISUMPG
ISUMNG
RTNG
FBG
COMPG
PR29
Close to the Close with

PR126
PR150
PC154
PC153
22 VR side. AXG inductor
VCCP
2 21
27 VCORE_EN VR_ON VDD
PR146 0_4
26 95833_BOOTG
PR15 *0_4 15 BOOTG
27,32,35 IMVP_PWRGD_3V PGOOD
25 95833_UGATEG
UGATEG
27
PGOODG 24 95833_PHASEG
PHASEG
5,18,27 H_PROCHOT#
6
VR_HOT# PU19 LGATEG
23 95833_LGATEG Core JP3
0.001/F_3720
ISL95833HRTZ-T
20 0206 reserve PCN1 for
PC152 3 PWM2 PR130 VIN_VCC_CORE 1 2
43p/50V_4 SCLK 0_6
VIN high frequency voice
19 95833_LGATE1 95833_BOOT1 noise
2200p/50V_4
LGATE1 *ECAP_CONN 0217 change PCN1
10U/25V_8
10U/25V_8
0.1u/50V_6
4 2
PC30
PC29
PC151
ALERT# 1 2
footprint and QPN
2
18 95833_PHASE1 0.22u/25V_6
PC149
PC147
B PHASE1 1 B
0218 mirror pin of
D1
D1
D1
95833_UGATE1 PCN1
5 17 95833_UGATE1
PCN1
SDA UGATE1 PR16
6 VR_SVID_CLK VR_SVID_CLK PR145 20/F_4 1 G1 PL3 0.001/F_3720
16 95833_BOOT1 0.47uH_7X7X1.8
ISUMN
ISUMP
COMP
BOOT1
ISEN2
ISEN1
95833_PHASE1 S1/D2 9 95833_PHASE1 1 2 +VCC_CORE +VCC_CORE

NTC
RTN
FB
VR_SVID_ALERT#
PC36
PC38
PC45
PC37
PC25
PC24
6 VR_SVID_ALERT# PR143 0_4 DCR=7.3mOhm
8
PR124
G2
*2.2_6
8
10
11
12
13
14
1K/F_4
95833_LGATE1 + +
VR_SVID_DATA PR141 16.9/F_4 +VCC_CORE
1/F_4
S2
95833_ISUMP
S2
S2
6 VR_SVID_DATA
95833_COMP PEAK : 12A
95833_NTC
0.1u/10V_4
10u/6.3V_8
22u/6.3V_6
22u/6.3V_6
330u/2V_7343
330u/2V_7343
*2200p/50V_6
PQ7
PC145
OCP : 18A
7
6
5
PR131 FDMS3664S
PP1000_PCH 0_4
Width : 500mil
PR8
PR7
*4700P/25V_4
120P/50V_4 PR20 95833_ISUMP

PP5000 PR117 PC140 PC148 64.9K/F_4
PC143
PC31 PC142
0.1u/25V_4 *0.1u/25V_4
VCORE Load Line :
4.7n/25V_4
*100K/F_4
PC28
PR14
10/F_4 270p/50V_4
PR121 PC141 -5.9mV/A for SDP=4.5W
PR17
Close to the
340/F_4
PR9 1.78K/F_4 16.9K/F_4 1200p/50V_4 VR side.

*649/F_4
PR118
95833_ISUMN
+VCC_CORE PR10 PC139
*2K/F_4 *330p/50V_4
PC17
95833_ISUMN 0.1u/25V_4
PC137
95833_NTC
95833_NTCG
PR127 *330p/50V_4
Parallel *10_4
A A
8 VCC_SENSE PR132 0_4
8 VSS_SENSE PR136 0_4
PR5 PR107 PR40 PR152

PR129 470K_4 NTC 27.4K/F_4 470K_4 NTC 27.4K/F_4
*10_4 PC144
*0.01u/50V_4
Close to the
PR108 PR153
CPU side.
3.83K/F_4 3.83K/F_4
PROJECT :
1A
+VCC_CORE(ISL95833)
5 4 3 2 1
1 2 3 4 5
Other power system (DCD)

31
27,32
VSFR_EN
SUSP_VR_EN
VSFR_EN
34
27,32 PP1050_PCH_PG
A A
VIN PP1350_PCH PP1350

VIN
PR62 PR67
1M_6 22_8 PR54
3
1M_6
PP5000 PP5000_DSW
2
3
3
PQ15 PR171 PR169
AO3404 0_4 *0_4
PP1050_PCH_PG 2
1
2 2
PP1350_PCH
PR56 PQ13 PQ14 PR77 100K_4
1
PQ16 1M_6 2N7002K 2N7002K PP3300_DX

DTC144EU PC70 PU13
1
*2.2n/50V_4 PC84 1u/16V_6 G9661-25ADJF12U
TDC : 0.315A 4 1
VPP PGOOD PP1800_PCH_PG 35
PEAK : 0.42A PP1350_PCH_PG 2 6 PP1800_PCH
Width : 20mil PR177 0_4 VEN VO
PP3300_DSW 3
8 VIN PR75
GND R1
ADJ
PP3300_PCH_S5 9 5 43.2K/F_4
GND NC
TDC : 0.026A
7
PC89
10u/6.3V_6
PEAK : 0.035A
B
PR88
0.8V Width : 20mil B
4.7K_4
PC91 PC87 PC96 PR74
10u/6.3V_6 0.1u/50V_6 *0.1u/50V_6
R2 34K/F_4
PR87 PP1350_PCH_PG
4.7K_4
3
1.35V_PG_2 2
Vout =0.8(1+R1/R2)
=1.8V
3
PQ23
PP1350_PCH PR92 4.7K_4 1.35V_PG_1 2 PC115 1 DTC144EUA
PQ24 1000P/50V_4
MMBT3904-7-F
1
PC118
*1000P/50V_4
C C
VIN PP1350_PCH_SX PP1350

VIN
PR159 PR46
1M_6 22_8 PR158
3
1M_6
PP1050_PCH_PG 2
PR105 NSX@0_4
3
PQ6
AO3404
EC_SLP_SX_L VSFR_EN 2
27 EC_SLP_SX_L
1
PR111 *SX@0_4 2 2
PP1350_PCH_SX
PR160 PQ11 PQ10
1
PQ5 1M_6 2N7002K 2N7002K

DTC144EU PC171
1
*2.2n/50V_4
TDC : 0.28A
D D
PEAK : 0.375A
Width : 20mil

PROJECT :
1A
LDO (1V/1.35V/1.5V/1.8V)
1 2 3 4 5
1 2 3 4 5
Other power system (DCD) 32

34 PP1800_PCH_PG
PP1000_PCH_S5_PG
35
VIN PP3300_PCH PP3300_DSW
VIN
A A
PR80 PR69
1M_6 22_8 PR79 0219 Change G9661 to TPS62243 for PP1800_PCH_S5
3
1M_6
0220 change back to LDO for PP1800_PCH_S5
2
3
PQ20
AO3404
PP1800_PCH_PG 2
1
2 2
PP3300_PCH PP5000_DSW
PR84 PQ19 PQ17
1
PQ18 1M_6 2N7002K 2N7002K
DTC144EU PC100
1
*2.2n/50V_4 PR93
TDC : 0.025A 0_4
PEAK : 0.033A
Width : 20mil
PR91 100K_4
PP3300_EC PP3300_DSW
PU15
PC123 1u/16V_6 G9661-25ADJF12U
4 1
VPP PGOOD PP1800_PCH_S5_PG 30
B B
PP1000_PCH_S5_PG 2 6 PP1800_PCH_S5
PR183 PR86 0_4 VEN VO
4.7K_4 PP3300_DSW 3
8 VIN PR179
R1
ADJ
9 GND 5 43.2K/F_4
PR184 GND NC
4.7K_4
PP3300_PCH_PG 27 TDC : 0.049A
7
PC187 PEAK : 0.065A
3
10u/6.3V_6
0.8V Width : 20mil
3.3V_PG_2 2
PC121 PC122 PC120 PR181
3
10u/6.3V_6 0.1u/50V_6 *0.1u/50V_6
R2 34K/F_4
PQ34
1
PP3300_PCH PR182 4.7K_4 3.3V_PG_1 2 PC193 DTC144EUA
PQ35 1000P/50V_4
MMBT3904-7-F
1
PC190
*1000P/50V_4
Vout =0.8(1+R1/R2)
=1.8V
C C
PP1000_PCH_S5
VIN PP1000_PCH_SX VIN
PR122 PR6 PR123
5
1M_6 22_8 1M_6
PQ3
AON7400AL
4
3
IMVP_PWRGD_3V PR120 NSX@0_4

27,32,33 IMVP_PWRGD_3V
3
2
1
PP1350_PCH_SX_PG 2
15 PP1350_PCH_SX_PG
PR119 *SX@0_4 2 2
D PP1000_PCH_SX D
PR112 PQ4 PQ28
1
PQ29 1M_6 2N7002K 2N7002K

DTC144EU PC136
1
*2.2n/50V_4
TDC : 1.43A Quanta Computer Inc.
PEAK : 1.9A
Width : 80mil PROJECT :
1A
LDO(1.2V/3.3V/1.8V)
1 2 3 4 5
1 2 3 4 5
36
A A
B B
C C
D D

PROJECT :
1A
Thermal protect
1 2 3 4 5
5 4 3 2 1
Support S0iX
VIN
1
BAT-V
PWR_BTN_L
2
PP3300_RTC
37
3 ILB_RTC_RST#
ILB_RTC_RST# VRTC
PWR
EC_ACIN 3 ILB_RTC_TEST#
CHARGER Battery BTN ILB_RTC_TEST#
ACPRESENT 6 EC_ACIN ACPRESENT
ACPRESENT PP1000_PCH_S5
EC 14 PCH_RSMRST_L
D
RSMRST# V1P0A D
PP1200_PCH_S5
15 PMC_SUSCLK[0]
13 PP3300_PCH_S5_PGD PMC_SUSCLK[0]
HWPG_S5 V1P24A
1 16 PMC_SUSPWRDNACK PP1800_PCH_S5
SUSACK
VIN
42 PP3300_PCH_PG (ALL_S0_PGD) 17 PCH_PWRBTN_L V1P8A
PP3300_RTC PP5000_DSW 5 HWPG_S0 PWRBTN# PP3300_PCH_S5
2 18 PCH_SLP_S4_L
PP1350_PGOOD SLP_S4# V3P3A
3V/5V 25 27 PP1000_PCH
5 PP3300_DSW PP5000 PCH_SLP_S3_L
VR 20 SLP_S3#
PP5000_PGOOD V1P0S
18 52 PMC_CORE_PWROK PP1050_PCH
CORE_PWROK PMC_CORE_
EN2
EN1
PG
PWROK
VCORE_PGOOD V1P05S
29 53 PMC_SUS_STAT# PP1350_PCH
PP3300_DSW_EN PP5000_EN 19 PMC_SUS_
4 EC_SLP_SX_L
STAT#
V1P35S
EC_SLP_SX_L 54 PLTRST# PP1500_PCH_TS
PP5000_PGOOD 44 PLTRST#
VTT_PWRGD VAUD
21 S0IX_PGD 43 PCH_SLP_SX_L
SLP_S0IX# PP1800_PCH
S0IX 50 EC_PWROK
49
V1P8S
VIN +DDR_VTT_RUN
1 MOS PCH PP3300_PCH
8 VSDIO
VLPC
VCORE_EN
PP1350_EN
PP5000_EN
SUSP_VR_EN
PP3300_DX_EN
PP3300_DSW_EN
PP1000_PCH_S5 V3P3S
V1P0A VOUT
+VCORE
C
TLV62130A C
PP1000_PCH_S5_PGD 9
PG please PP3300_DX_EN CPU CORE PWR
EN
early than VCORE_EN PP1350

PP1350_PGOOD
25 DRAM_VDD_
SUSP_VR_EN S4_PWROK VDDQ PWR
7 29 28 7 22 19 4 +VGFX
VCC can follow in the CORE rail sequence
or at the same time 51 DRAM_CORE_PWROK DRAM_CORE_
PP3300_DSW PWROK GPU PWR
5 10
PP1800_PCH_S5 VIN
V1P8A VOUT 1 S0 PWR
SVID
G9661-25 31
+VCORE PP1350
PP1800_PCH_S5_PGD 11 23
PG IMVP VCC 45
EN
VR +VGFX PP1350_PCH_SX
30
PP1000_PCH_S5_PGD VNN VOUT
9 +VSFR
SVID
MOS AO3404 46
VCORE_PGOOD MOS
EN
PP3300_DSW PG 32
EN
5 PP1350_PCH_SX_PG
12
EC_SLP_SX_L
PP3300_PCH_S5 SVID VCORE_EN 44 S0IX
V3P3A VOUT 29
TPS22930 CPU PP1000_PCH
MOS
13 33 47
EN
PP3300_PCH_S5_PGD PP1000_PCH_S5 PP1000_PCH 33 PP1000_PCH_SX

B B
PP1800_PCH_S5_PGD VOUT
11 8 +V1P0S PP1000_PCH_PG +V1P0SX
AON7400AL MOS 34 MOS AO3404 48
PG MOS
S5 PWR
EN
EN
PP1000_PCH_SX_PG
IMVP_PWRGD_3V
32 PP1350_PCH_SX_PG
S0IX
46
1 VIN VIN
35
PP1050_PCH
S3 1 +V1P05S t1 : RTC_VCC to ILB_RTC_TEST# de-assertion 9ms -min (2-3)

DDR VDDQ PP1350 23 36 PP1050_PCH_PG
TLV62150ARGTR t1 : RTC_VCC to PMC_RSMRST# de-assertion 9ms-min (2-11)
PG
EN
VR S3
PP1350_VREF 24 t2 : V3P3A valid to PMC_RSMRST# de-assertion 10us -min (8-11)
34 PP1000_PCH_PG
+DDR_VTT_RUN 49 S0IX t3 : PMC_RSMRST# to Internal RTC clock stable 100ms -max (11- RTC clock)
PP1350 PP1350_PCH 37
t4 : Internal RTC clock stable to PMC_SUSCLK[0] toggling 5ms -min (RTC clock - 12)
PP1350_PGOOD 25 23 +V1P35S PP1350_PCH_PG
S5 PG t5 : PMC_SLP_S4# de-assertion to PMC_SLP_S3# de-assertion 30us -min (15-25)
S3 AO3404 MOS 38
PG
S5
S3
EN
t6a : Core Well stable to DRAM_CORE_PWROK and PMC_CORE_PWROK assertion

PP1050_PCH_PG 36 (no PCIE device) 10ms -min (43-45)
PP1000_PCH_SX_PG t6b : Core Well stable to DRAM_CORE_PWROK and PMC_CORE_PWROK assertion
48 S0IX (for power rails needed by pcie device) 99ms -min (43-45)
PP3300_DSW PP1800_PCH 39
PP1350_EN
t7 : DRAM/PMC_CORE_PWROK to PMC_SUS_STAT# 1ms -min (45-46)
22 S3 PWR 5 +V1P8S
PP1800_PCH_PG t8 : PMC_SUS_STAT# de-assertion to PMC_PLTRST# de-assertion 60us -min (46-47)
A
G9661-25 40 A
PG
EN
a 10us to 2000us delay is required between rails to avoid inrush current caused by multiple loads
turning on simultaneously and fast charging of VR output decoupling
PP1500_PCH_PG 38
PP3300_DSW PP3300_PCH 41
5 +V3P3S
PP3300_PCH_PG
AO3404 42 Quanta Computer Inc.
PG MOS
EN
PROJECT : ZM8
S0 PWR PP1800_PCH_PG 40 Size Document Number Rev
1A
Power Sequence
5 4 3 2 1
1 2 3 4 5 6 7 8
PP1800_PCH
38
2.2K 2.2K
AP2BH10 SMB_SOC_CLK
SMBUS PP1800_PCH
A
BG12 SMB_SOC_DAT XDP A
Bay-trail M 4.7K 4.7K

TRACK PAD
BH22 I2C_0_SDA_C PP1800_PCH
BG23 I2C_0_SCL_C 0x4bh
4.7K 4.7K
Audio Codec
BG24 I2C_1_SDA_C PP1800_PCH
BH24 I2C_1_SCL_C 0x20h
I2C 4.7K 4.7K

ALS
BF27 I2C_4_SDA_C
B
BG27 I2C_4_SCL_C 0x44h B
PP1800_PCH
4.7K 4.7K
TOUCH SCREEN
BH28 I2C_5_SDA_C
BG28 I2C_5_SCL_C 0x4ah
PP3300_EC
C C
100
4.7K 4.7K
Battery
100
E10 EC_SMB0_CLK
D3 EC_SMB0_DATA Charger
PP3300_DX
KBC
TI 4.7K 4.7K
Thermal sensor
SMBUS F4 EC_SMB2_CLK
D
F3 EC_SMB2_DATA 0x4ch D

PROJECT : ZM8
1A
SMBUS_I2C
1 2 3 4 5 6 7 8
5 4 3 2 1
(G3/DSW)
I PP5000_PGOOD
PP5000_DSW
(USB Charger)
TPS2546 USBPWR1 (S0)
39
PP3300_DSW TPS22964CYZPR PP3300_DX
PP5000_EN VREG5 PWRGD
PP5000 EC USB1_PWR_EN
(S3)
EC EN1 PP5000 PP3300_DX_EN
PP3300_DSW S5_Vout
TPS2546 USBPWR2 EC
D
PP5000 D
TPS5122 TPS22930 PP3300_WLAN

PP3300_DSW_EN (G3/DSW) EC USB2_PWR_EN
S3_Vout
EC EN2 PP3300_DSW PCH
Vin VREG3 PP3300_WLAN_EN
(ALW)
VIN
PP3300_RTC TPS22965DSGR +3V_LTE
PCH PP3300_LTE_EN
II PP1000_PCH_S5
(S5)
PP1800_PCH_S5
(S5)
(S3)
(S5) TPS22930 TP_PWR
Vout Vout
SUSP_VR_EN V1P0A PP1000_PCH_S5_PG V1P8A PP1800_PCH_S5_PG V3P3A HW_circuit
EN EN Vout PP3300_PCH_S5 PP3300_PCH_S5_PG
EC EN TLV62130A PWRGD G9661-25 PWRGD TPS22930 HWPG
EC TP_SHDN_L
Vin Vin Vin
VIN PP3300_DSW PP3300_DSW

C EC C
III PP1350_PGOOD
PP3300_PCH_S5_PG
HWPG_S5
PP1350 PWRGD
PG0 (S0)
PP1350_EN
EC_PWROK(PH2) DRAM_CORE_PWROK G5243AT11U
S5 EN
PP1350 (S3) PP3300_DX LCDVCC
EC PP3300_PCH_PG
+VSM S5_Vout
ALL_S0_PG SOC EC_EDP_VDD_EN
PP1350_VREF (S3) PC4 EC
TPS51216 EC
PP1000_PCH_SX_PG CORE_PWROK(PF5) PMC_CORE_PWROK
VSFR_EN ALL_S0IX_PG
S3 EN +DDR_VTT_RUN
Vin S3_Vout
(S0IX) PCH_SLP_SX_L
EC_SLP_SX_L
PG3
VIN PL6
B +VCORE B
(S0)
IV PP1000_PCH
(S0)
PP1050_PCH
(S0)
PP1350_PCH
(S0)
PP1800_PCH
(S0)
Vout
+VCORE / +VGFX Vout Vout Vout Vout

IMVP_PWRGD_3V
PGOODG EN +V1P0S EN +V1P05S EN +V1P35S EN +V1P8S
VR_EN PWRGD PWRGD PWRGD PWRGD
EN AON7400AL PP1000_PCH_PG TLV62150ARGTR PP1050_PCH_PG AO3404 PP1350_PCH_PG G9661-25 PP1800_PCH_PG
EC ISL95833
Vout +VGFX (S0) Vin Vin Vin Vin
Vin
PP1000_PCH_S5 VIN PP1350 PP3300_DSW
VIN
PP3300_PCH
(S0) V PP1350_PCH_SX PP1000_PCH_SX HW_circuit
HWPG
A (S0iX) HW_circuit A
Vout PP3300_PCH_PG
(S0iX) R
ALL_S0_PG HWPG
EN +V3P3S PP1050_PCH_PG VCORE_PWRGD
PP1800_PCH_PG PWRGD R Vout R Vout
AO3404 VSFR_EN V1P0SX_EN
EN +VSFR EN +V1P0SX
Vin R R
EC EC_SLP_SX_L MOS AO3404 MOS AO3404 PP1000_PCH_SX_PG Quanta Computer Inc.
PP3300_DSW PP1350_PCH_SX_PG
Vin Vin PROJECT : ZM8
PP1350 PP1000_PCH 1A
BTM PWR CONTROL
5 4 3 2 1

Quanta ZM8 - R1a

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Quanta ZM8 - R1a

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5 4 3 2 1

DDR3L 1333 X1 LANE

LPC Interface PCIE Gen 2 x 1 Lane

CCD Integrated Quanta Computer Inc.

PJ4N3KDW PJ4N3KDW *0.1U/10V_4

GND PJ4N3KDW 1 PJ4N3KDW

Quanta Computer Inc.

0 = LPC 5 I2S_LRCLK I2S_LRCLK

0 = Override 5 I2S_DOUT I2S_DOUT

0 = DDI0 not detected DDI1_DDCDATA

R188 *10K_4 SATA_DEVSLP_C

GND R447 0_4 ICLK_SATA_TERMP BB10 AT7

14 SOC_KBC_SCI R187 0_4 SATA_GP0 BA12 +1.8V AP12

+1.0V C24 SOC_PROCHOT# R108 0_4 H_PROCHOT#

Quanta Computer Inc.

SoC (CPU) U16E

XTAL25_IN CLK_PCIE_WLANN AF6

+3V_RTC C11 SOC_RTEST# SOC_RTEST# 11

R106 0_4 PCH_WAKE# B18 +1.8V_S5

PP1800_PCH_S5 R514 0_6

AKE5EZN0N00 R479 0_4 PCH_SPI_SI_R 18

R431 1K/F_4 ICLK_USB_TERMN_0 D10 H5

R440 45.3/F_4 USB_RCOMP D6 +1.8V BD12 TRACKPAD_INT_DX

Quanta Computer Inc.

R455 R367 R374 0_4 GND

Quanta Computer Inc.

SoC (CPU) C245 4.7U/6.3V_4 GND

PP1000_PCH_SX R368 0_4

USB3_V1P0_G3 V1P8_AA18_PEW +VSDIO LPC_V3P3_PWR PCU_V3P3_G3_PWR

VIS_V1P0_S0IX_PW V1P8_S5_PWR RTC_VCC_P22_PWR VSS_AD18_AD16_PWR UNCORE_V1P8_AN32_PWR

C267 C266 C254 C226

GND GND GND GND

Quanta Computer Inc.

Quanta Computer Inc.

INTEL Debug Port(CPU) CN1

PP1800_PCH R25 0_4 PP1800_XDP_CD

PLACE R295 WITHIN 0.25" FROM XDP PIN

XDP_H_TMS R407 51/F_4

XDP_H_TCK R413 51/F_4

XDP_H_TRST# R12 51/F_4

M_A_ODT0 K1 A1 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1

M_A_DM2 E7 A9 M_A_DM0 E7 A9 M_A_DM6 E7 A9 M_A_DM5 E7 A9

Micron AKD5JGSTL15 ( WIN BSQ ) MT41K256M16HA-125:E

C181 C133 C153 C189 C141 C162 C182

C143 C11 C146 C144

C121 C124 C117 C122 C148 C2

+SMDDR_VREF_DQ0 Place these Caps near Memory Down CA & DQ pin

Quanta Computer Inc.

C171 C170 C175 C174

Size Document Number Rev

M_B_ODT0 K1 A1 M_B_ODT0 K1 A1 M_B_ODT0 K1 A1 M_B_ODT0 K1 A1

M_B_DM2 E7 A9 M_B_DM0 E7 A9 M_B_DM6 E7 A9 M_B_DM5 E7 A9

Micron AKD5JGSTL15 ( WIN BSQ ) MT41K256M16HA-125:E

C157 C158 C195 C194 C136

C193 C138 C166 C165 C129 C164 C140 C185

C130 C192 C156 C186 C184 Vref_DQ

C125 C120 C118 C119

+SMDDR_VREF_DQ1 Place these Caps near Memory Down CA & DQ pin

C172 C176 C169 C173

PWRON SEQUENCE(CPU) PWRON SEQUENCE(CPU) PP1800_PCH_S5

PP1800_PCH_S5 R483 10K_4

6,11 SOC_RSMRST# SOC_RSMRST# 0_4 R441

2 5 SWITCH_EN R136 *10K_4 PP1800_PCH_S5