5 4 3 2 1

EA40_HU_ULT
Schematics Document
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D Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A EV A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cover Page
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 1 of 102
5 4 3 2 1
 5 4 3 2 1

CHARGER
Project code : 91.4YN01.001 BQ24737 44
PCB P/N : 12243 INPUTS OUTPUTS
EA40-HW ULV Board Block Diagram Revision : 1 DCBATOUT BT+

SYSTEM DC/DC
TPS51225 45
4
D INPUTS OUTPUTS D

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5V_Charger
DCBATOUT
LCD eDPx2 Intel CPU DDR3L 1333/1600 Channel A
3D3V_S5
VRAM Slot 1

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DDR3 2GByte CPU DC/DC
Touch Panel USB2.0x1 Haswell DDR3L/ 1.35V TPS51622 46-47
BGA1168 INPUTS OUTPUTS

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DDR3 DDR3L 1333/1600 Channel B Slot 2
DCBATOUT VCC_CORE
900MHz
HDMI 1.4a HDMI SYSTEM DC/DC
SYS8208A 48

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PCIE / USB2.0 INPUTS OUTPUTS
WLAN + BT
DCBATOUT 1D05V_VTT
N14P

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PCIe x 4, DDI SYSTEM DC/DC
PCIe x 1 LAN+Card reader RJ45
RT8207 49
C Realtek INPUTS OUTPUTS C

RTL8411AA-CG SD/MMC DCBATOUT 1D35V_S3

USB Charger
TPS2546
USB3.0 x1 r
USB3.0x1
efe LPC BUS TPM
SYSTEM DC/DC
SYW232
INPUTS
DCBATOUT
OUTPUTS
1D8V_S0
50

USB2.0 x2

Camera
USB2.0x2

USB2.0x1
r
USB 3.0/2.0 ports (8)
ETHERNET (10/100/1000Mb)
High Definition Audio
SATA ports (3)
PCIe ports (5) by SATA x 3
I2C Touch PAD

HDD SATA3.0
SYSTEM DC/DC
SYW232
INPUTS
DCBATOUT
OUTPUTS
1D5V_S0
51

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LPC I/F
ODD TPS51728RHAR 82
INPUTS OUTPUTS
HDA
B
DCBATOUT VGA_CORE B
mSATA

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Switches 83
SPI INPUTS OUTPUTS
5,6,7,8,9,10,
17,18,19,20,21,22,23,24,25 3D3V_S0 3D3V_VGA_S0
26
HD Audio Codec 1D8V_S0 1D8V_VGA_S0
2CH SPEAKER
ALC3225 1V_S0 1V_VGA_S0

CS TPS51728RHAR 83
LPC BUS LPC debug port INPUTS OUTPUTS
DCBATOUT 1D5V_VGA_S0

HP1
PCB LAYER
SPI Flash
8MB
KBC
ITE8587 SMBus
Thermal
NCT7718W
D L1:Top
L2:VCC
L4:Signal
L5:GND
L3:Signal L6:Bottom

A Charger EV A

BQ24737
Int. Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
KB Taipei Hsien 221, Taiwan, R.O.C.

Title

Block Diagram
Wistron Confidential document, Anyone can not Size Document Number Rev
Duplicate, Modify, Forward or any other purpose Custom
application without get Wistron permission EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 2 of 102
5 4 3 2 1
 5 4 3 2 1
SSID = CPU

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D Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (Reserved)
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 3 of 102
 5 4 3 2 1
SSID = CPU

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1D05V_VTT

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R401
1 62R2J-GP
2 H_PROCHOT#
1 SKTOCC#_R D61
TP401 PROC_DETECT#
1 H_CATERR# K61 MISC
TP402 CATERR#
1

C402 N62 J62 XDP_PRDY# 1 TP421

24 H_PECI PECI PRDY#
SC47P50V2JN-3GP K62 XDP_PREQ# 1

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PREQ# TP420
E60 XDP_TCK
2

R413 PROC_TCK XDP_TMS

PROC_TMS E61
1 56R2J-L1-GP
2 H_PROCHOT#_R K63 JTAG E59 XDP_TRST#
24,44,46,86 H_PROCHOT# PROCHOT# PROC_TRST#
THERMAL F63 XDP_TDI
PROC_TDI XDP_TDO
PROC_TDO F62

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36,86 H_CPUPW RGD C61 PROCPWRGD PWR
R403 J60
BPM#0
2 10KR2J-L-GP
1 BPM#1 H60
C BPM#2 H61
H62
C
BPM#3
1 R406 2 200R2F-L1-GP SM_RCOMP_0 AU60 K59

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VDDQ_CPU SM_RCOMP0 DDR3L BPM#4
1 R407 2 120R2F-GP SM_RCOMP_1 AV60 SM_RCOMP1 BPM#5 H63
R420 1 R408 2 100R2F-L1-GP-U SM_RCOMP_2 AU61 K60

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SM_RCOMP2 BPM#6
1 470R2F-GP
2 SM_DRAMRST# AV15 SM_DRAMRST# BPM#7 J61 R412
AV61 XDP_TCK 1 51R2J-L1-GP
2
12 DDR_PG_CTRL SM_PG_CNTL1
37,86 SM_DRAMRST#
EA40-HW -1 XDP_TRST# 1 2
R411
CRB: Not Stuff HASW ELL-6-GP 51R2J-L1-GP
CRB: Not Stuff
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DPDG: Stuff

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71.HASWE.G0U

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1D05V_VTT
CRB: Not Stuff
XDP_TDO 1 2
R414 DY
51R2J-L1-GP
XDP_TDI 1 2

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R415 DY
51R2J-L1-GP
XDP_TMS 1 2
R416 DY
51R2J-L1-GP

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CS
D Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (THERMAL/CLOCK/PM)
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 4 of 102
 5 4 3 2 1

SSID = CPU

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HSW_ULT_DDR3L 3 OF 19 HSW_ULT_DDR3L 4 OF 19
CPU1C CPU1D

M_A_DQ<0> AH63 AU37

12 M_A_DQ<0> SA_DQ0 SA_CLK#0 M_A_DIM0_CLK_DDR#0 12
M_A_DQ<1> AH62 AV37 AY31 AM38
12 M_A_DQ<1> M_A_DQ<2> SA_DQ1 SA_CLK0 M_A_DIM0_CLK_DDR0 12 13 M_B_DQ<0> SB_DQ0 SB_CK#0 M_B_DIM0_CLK_DDR#0 13
12 M_A_DQ<2> AK63 AW36 M_A_DIM0_CLK_DDR#1 12 13 M_B_DQ<1> AW31 AN38 M_B_DIM0_CLK_DDR0 13
M_A_DQ<3> SA_DQ2 SA_CLK#1 SB_DQ1 SB_CK0
12 M_A_DQ<3> AK62 AY36 M_A_DIM0_CLK_DDR1 12 13 M_B_DQ<2> AY29 AK38 M_B_DIM0_CLK_DDR#1 13
M_A_DQ<4> SA_DQ3 SA_CLK1 SB_DQ2 SB_CK#1
12 M_A_DQ<4> AH61 13 M_B_DQ<3> AW29 AL38 M_B_DIM0_CLK_DDR1 13

nfi
M_A_DQ<5> SA_DQ4 SB_DQ3 SB_CK1
12 M_A_DQ<5> AH60 AU43 M_A_DIM0_CKE0 12 13 M_B_DQ<4> AV31
M_A_DQ<6> SA_DQ5 SA_CKE0 SB_DQ4
12 M_A_DQ<6> AK61 AW43 M_A_DIM0_CKE1 12 13 M_B_DQ<5> AU31 AY49 M_B_DIM0_CKE0 13
M_A_DQ<7> SA_DQ6 SA_CKE1 M_A_DIM0_CKE2 SB_DQ5 SB_CKE0
12 M_A_DQ<7> AK60 AY42 1 TP612 13 M_B_DQ<6> AV29 AU50 M_B_DIM0_CKE1 13
M_A_DQ<8> SA_DQ7 SA_CKE2 M_A_DIM0_CKE3 SB_DQ6 SB_CKE1 M_B_DIM0_CKE2
12 M_A_DQ<8> AM63 AY43 1 TP613 13 M_B_DQ<7> AU29 AW49 1 TP618
M_A_DQ<9> SA_DQ8 SA_CKE3 SB_DQ7 SB_CKE2 M_B_DIM0_CKE3
12 M_A_DQ<9> AM62 13 M_B_DQ<8> AY27 AV50 1 TP623
M_A_DQ<10> SA_DQ9 SB_DQ8 SB_CKE3
12 M_A_DQ<10> AP63 AP33 M_A_DIM0_CS#0 12 13 M_B_DQ<9> AW27
M_A_DQ<11> SA_DQ10 SA_CS#0 SB_DQ9
12 M_A_DQ<11> AP62 AR32 M_A_DIM0_CS#1 12 13 M_B_DQ<10> AY25 AM32 M_B_DIM0_CS#0 13
M_A_DQ<12> SA_DQ11 SA_CS#1 SB_DQ10 SB_CS#0
12 M_A_DQ<12> AM61 13 M_B_DQ<11> AW25 AK32 M_B_DIM0_CS#1 13
SA_DQ12 SB_DQ11 SB_CS#1

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M_A_DQ<13> AM60 AP32 M_A_DIM0_ODT0_TP 1 AV27
12 M_A_DQ<13> SA_DQ13 SA_ODT0 TP624 13 M_B_DQ<12> SB_DQ12
M_A_DQ<14> AP61 AU27 AL32 M_B_DIM0_ODT0_TP 1
12 M_A_DQ<14> SA_DQ14 13 M_B_DQ<13> SB_DQ13 SB_ODT0 TP625
M_A_DQ<15> AP60 AY34 AV25
12 M_A_DQ<15> SA_DQ15 SA_RAS# M_A_RAS# 12 13 M_B_DQ<14> SB_DQ14
M_A_DQ<16> AP58 AW34 AU25 AM35
12 M_A_DQ<16> SA_DQ16 SA_WE# M_A_WE# 12 13 M_B_DQ<15> SB_DQ15 SB_RAS# M_B_RAS# 13
M_A_DQ<17> AR58 AU34 AM29 AK35
12 M_A_DQ<17> SA_DQ17 SA_CAS# M_A_CAS# 12 13 M_B_DQ<16> SB_DQ16 SB_WE# M_B_WE# 13
M_A_DQ<18> AM57 AK29 AM33 M_B_CAS# 13
12 M_A_DQ<18> SA_DQ18 13 M_B_DQ<17> SB_DQ17 SB_CAS#
M_A_DQ<19> AK57 AU35 AL28
12 M_A_DQ<19> SA_DQ19 SA_BA0 M_A_BS0 12 13 M_B_DQ<18> SB_DQ18
M_A_DQ<20> AL58 AV35 AK28 AL35
12 M_A_DQ<20> SA_DQ20 SA_BA1 M_A_BS1 12 13 M_B_DQ<19> SB_DQ19 SB_BA0 M_B_BS0 13
M_A_DQ<21> AK58 AY41 AR29 AM36
12 M_A_DQ<21> 13 M_B_DQ<20>

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M_A_DQ<22> SA_DQ21 SA_BA2 M_A_BS2 12 SB_DQ20 SB_BA1 M_B_BS1 13
12 M_A_DQ<22> AR57 13 M_B_DQ<21> AN29 AU49
M_A_DQ<23> SA_DQ22 M_A_A0 SB_DQ21 SB_BA2 M_B_BS2 13
12 M_A_DQ<23> AN57 AU36 13 M_B_DQ<22> AR28
M_A_DQ<24> SA_DQ23 SA_MA0 M_A_A1 SB_DQ22 M_B_A0
12 M_A_DQ<24> AP55 AY37 13 M_B_DQ<23> AP28 AP40
M_A_DQ<25> SA_DQ24 SA_MA1 M_A_A2 SB_DQ23 SB_MA0 M_B_A1
12 M_A_DQ<25> AR55 AR38 13 M_B_DQ<24> AN26 AR40
M_A_DQ<26> SA_DQ25 SA_MA2 M_A_A3 SB_DQ24 SB_MA1 M_B_A2
12 M_A_DQ<26> AM54 AP36 13 M_B_DQ<25> AR26 AP42
M_A_DQ<27> SA_DQ26 SA_MA3 M_A_A4 SB_DQ25 SB_MA2 M_B_A3
12 M_A_DQ<27> AK54 AU39 13 M_B_DQ<26> AR25 AR42
M_A_DQ<28> SA_DQ27 SA_MA4 M_A_A5 SB_DQ26 SB_MA3 M_B_A4
12 M_A_DQ<28> AL55 AR36 13 M_B_DQ<27> AP25 AR45
M_A_DQ<29> SA_DQ28 SA_MA5 M_A_A6 SB_DQ27 SB_MA4 M_B_A5
12 M_A_DQ<29> AK55 AV40 13 M_B_DQ<28> AK26 AP45
SA_DQ29 SA_MA6 SB_DQ28 SB_MA5

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M_A_DQ<30> AR54 AW39 M_A_A7 AM26 AW46 M_B_A6
12 M_A_DQ<30> SA_DQ30 DDR CHANNEL A SA_MA7 13 M_B_DQ<29> SB_DQ29 SB_MA6
M_A_DQ<31> AN54 AY39 M_A_A8 M_A_A[15:0] 12 AK25 AY46 M_B_A7 M_B_A[15:0] 13
12 M_A_DQ<31> SA_DQ31 SA_MA8 13 M_B_DQ<30> SB_DQ30 SB_MA7
M_A_DQ<32> AY58 AU40 M_A_A9 AL25 AY47 M_B_A8
12 M_A_DQ<32> M_A_DQ<33> SA_DQ32 SA_MA9 M_A_A10 13 M_B_DQ<31> SB_DQ31 DDR CHANNEL B SB_MA8 M_B_A9
12 M_A_DQ<33> AW58 AP35 13 M_B_DQ<32> AY23 AU46
M_A_DQ<34> SA_DQ33 SA_MA10 M_A_A11 SB_DQ32 SB_MA9 M_B_A10
12 M_A_DQ<34> AY56 AW41 13 M_B_DQ<33> AW23 AK36
M_A_DQ<35> SA_DQ34 SA_MA11 M_A_A12 SB_DQ33 SB_MA10 M_B_A11
12 M_A_DQ<35> AW56 AU41 13 M_B_DQ<34> AY21 AV47
M_A_DQ<36> SA_DQ35 SA_MA12 M_A_A13 SB_DQ34 SB_MA11 M_B_A12
C
12 M_A_DQ<36> AV58 AR35 13 M_B_DQ<35> AW21 AU47 C
M_A_DQ<37> SA_DQ36 SA_MA13 M_A_A14 SB_DQ35 SB_MA12 M_B_A13
12 M_A_DQ<37> AU58 AV42 13 M_B_DQ<36> AV23 AK33
M_A_DQ<38> SA_DQ37 SA_MA14 M_A_A15 SB_DQ36 SB_MA13 M_B_A14
12 M_A_DQ<38> AV56 AU42 13 M_B_DQ<37> AU23 AR46
M_A_DQ<39> SA_DQ38 SA_MA15 SB_DQ37 SB_MA14 M_B_A15
12 M_A_DQ<39> AU56 13 M_B_DQ<38> AV21 AP46
M_A_DQ<40> SA_DQ39 M_A_DQS_DN<0> SB_DQ38 SB_MA15
AY54 AJ61 AU21

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12 M_A_DQ<40> M_A_DQ<41> SA_DQ40 SA_DQSN0 M_A_DQS_DN<1> M_A_DQS_DN<0> 12 13 M_B_DQ<39> SB_DQ39
12 M_A_DQ<41> AW54 AN62 M_A_DQS_DN<1> 12 13 M_B_DQ<40> AY19 AW30 M_B_DQS_DN<0> 13
M_A_DQ<42> SA_DQ41 SA_DQSN1 M_A_DQS_DN<2> SB_DQ40 SB_DQSN0
12 M_A_DQ<42> AY52 AM58 M_A_DQS_DN<2> 12 13 M_B_DQ<41> AW19 AV26 M_B_DQS_DN<1> 13
SA_DQ42 SA_DQSN2 SB_DQ41 SB_DQSN1

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M_A_DQ<43> AW52 AM55 M_A_DQS_DN<3> AY17 AN28
12 M_A_DQ<43> SA_DQ43 SA_DQSN3 M_A_DQS_DN<3> 12 13 M_B_DQ<42> SB_DQ42 SB_DQSN2 M_B_DQS_DN<2> 13
M_A_DQ<44> AV54 AV57 M_A_DQS_DN<4> AW17 AN25
12 M_A_DQ<44> SA_DQ44 SA_DQSN4 M_A_DQS_DN<4> 12 13 M_B_DQ<43> SB_DQ43 SB_DQSN3 M_B_DQS_DN<3> 13
M_A_DQ<45> AU54 AV53 M_A_DQS_DN<5> AV19 AW22
12 M_A_DQ<45> SA_DQ45 SA_DQSN5 M_A_DQS_DN<5> 12 13 M_B_DQ<44> SB_DQ44 SB_DQSN4 M_B_DQS_DN<4> 13
M_A_DQ<46> AV52 AL43 M_A_DQS_DN<6> AU19 AV18
12 M_A_DQ<46> SA_DQ46 SA_DQSN6 M_A_DQS_DN<6> 12 13 M_B_DQ<45> SB_DQ45 SB_DQSN5 M_B_DQS_DN<5> 13
M_A_DQ<47> AU52 AL48 M_A_DQS_DN<7> AV17 AN21
12 M_A_DQ<47> SA_DQ47 SA_DQSN7 M_A_DQS_DN<7> 12 13 M_B_DQ<46> SB_DQ46 SB_DQSN6 M_B_DQS_DN<6> 13
M_A_DQ<48> AK40 AU17 AN18
12 M_A_DQ<48> SA_DQ48 13 M_B_DQ<47> SB_DQ47 SB_DQSN7 M_B_DQS_DN<7> 13
M_A_DQ<49> AK42 AJ62 M_A_DQS_DP<0> AR21
12 M_A_DQ<49> SA_DQ49 SA_DQSP0 M_A_DQS_DP<0> 12 13 M_B_DQ<48> SB_DQ48
M_A_DQ<50> AM43 AN61 M_A_DQS_DP<1> AR22 AV30
12 M_A_DQ<50> SA_DQ50 SA_DQSP1 M_A_DQS_DP<1> 12 13 M_B_DQ<49> SB_DQ49 SB_DQSP0 M_B_DQS_DP<0> 13
M_A_DQ<51> AM45 AN58 M_A_DQS_DP<2> AL21 AW26
12 M_A_DQ<51> M_A_DQ<52> SA_DQ51 SA_DQSP2 M_A_DQS_DP<3> M_A_DQS_DP<2> 12 13 M_B_DQ<50> SB_DQ50 SB_DQSP1 M_B_DQS_DP<1> 13
12 M_A_DQ<52> AK45 AN55 M_A_DQS_DP<3> 12 13 M_B_DQ<51> AM22 AM28 M_B_DQS_DP<2> 13
M_A_DQ<53> SA_DQ52 SA_DQSP3 M_A_DQS_DP<4> SB_DQ51 SB_DQSP2
12 M_A_DQ<53> AK43 AW57 M_A_DQS_DP<4> 12 13 M_B_DQ<52> AN22 AM25 M_B_DQS_DP<3> 13
SA_DQ53 SA_DQSP4 SB_DQ52 SB_DQSP3

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M_A_DQ<54> AM40 AW53 M_A_DQS_DP<5> AP21 AV22
12 M_A_DQ<54> M_A_DQ<55> SA_DQ54 SA_DQSP5 M_A_DQS_DP<6> M_A_DQS_DP<5> 12 13 M_B_DQ<53> SB_DQ53 SB_DQSP4 M_B_DQS_DP<4> 13
12 M_A_DQ<55> AM42 AL42 M_A_DQS_DP<6> 12 13 M_B_DQ<54> AK21 AW18 M_B_DQS_DP<5> 13
M_A_DQ<56> SA_DQ55 SA_DQSP6 M_A_DQS_DP<7> SB_DQ54 SB_DQSP5
12 M_A_DQ<56> AM46 AL49 M_A_DQS_DP<7> 12 13 M_B_DQ<55> AK22 AM21 M_B_DQS_DP<6> 13
M_A_DQ<57> SA_DQ56 SA_DQSP7 SB_DQ55 SB_DQSP6
12 M_A_DQ<57> AK46 13 M_B_DQ<56> AN20 AM18 M_B_DQS_DP<7> 13
M_A_DQ<58> SA_DQ57 SB_DQ56 SB_DQSP7
12 M_A_DQ<58> AM49 AP49 +V_SM_VREF_CNT 37 13 M_B_DQ<57> AR20
SA_DQ58 SM_VREF_CA SB_DQ57

by
M_A_DQ<59> AK49 AR51 AK18
12 M_A_DQ<59> SA_DQ59 SM_VREF_DQ0 M_VREF_DQ_DIMM0_C 12 13 M_B_DQ<58> SB_DQ58
M_A_DQ<60> AM48 AP51 AL18
12 M_A_DQ<60> M_A_DQ<61> SA_DQ60 SM_VREF_DQ1 M_VREF_DQ_DIMM1_C 13 13 M_B_DQ<59> SB_DQ59
12 M_A_DQ<61> AK48 13 M_B_DQ<60> AK20
M_A_DQ<62> SA_DQ61 SB_DQ60
12 M_A_DQ<62> AM51 13 M_B_DQ<61> AM20
M_A_DQ<63> SA_DQ62 SB_DQ61
12 M_A_DQ<63> AK51 13 M_B_DQ<62> AR18
SA_DQ63 SB_DQ62
13 M_B_DQ<63> AP18
SB_DQ63

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HASWELL-6-GP

71.HASWE.G0U An HASWELL-6-GP

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CS
A
D A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDR)
Size Document Number Rev
A2
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 5 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

eDP Enable
D D
1:Disable CPU1S HSW_ULT_DDR3L 19 OF 19
CFG4

co
0:Enable

AC60 AV63 RSVDAV63 1 TP604

CFG4 CFG9 CFG0 RSVD_TP#AV63 RSVDAU63
AC62 AU63 1

nfi
CFG1 RSVD_TP#AU63 TP605
AC63 CFG2
AA63 CFG3

1
CFG4 AA60 C63 RSVDC63 1 TP602
R603 R604 CFG4 RSVD_TP#C63 RSVDC62
1KR2J-L2-GP
DY 1KR2J-L2-GP
Y62 CFG5 RSVD_TP#C62 C62 1 TP603
Y61 CFG6 RSVD#B43 B43

de
Y60 CFG7
V62 A51 RSVDA51 1 TP607

2
CFG9 CFG8 RSVD_TP#A51 RSVDB51
V61 CFG9 RSVD_TP#B51 B51 1 TP608
V60 CFG10
U60 L60 RSVDL60 1 TP609
CFG11 RSVD_TP#L60
T63 CFG12
T62 RESERVED N60

nti
CFG13 RSVD#N60
T61 CFG14
T60 CFG15 RSVD#W23 W23
Y22 OPI_COMP3 2 R609 1 49D9R2F-GP
RSVD#Y22 OPI_COMP1
C AA62 CFG16 PROC_OPI_RCOMP AY15 2 R610 1 49D9R2F-GP C
U63 CFG18

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AA61 CFG17 RSVD#AV62 AV62
U62 CFG19 RSVD#D58 D58 Intel Recommend
R607
2 49D9R2F-GP
1 CFG_RCOMP V63 CFG_RCOMP VSS P22
VSS N21
A5 RSVD#A5
RSVD#P20 P20
E1 R20

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RSVD#E1 RSVD#R20
D1 RSVD#D1
J20

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RSVD#J20
H18 RSVD#H18
1 2 TD_IREF B12
R606 TD_IREF
8K2R2J-3-GP

71.HASWE.G0U

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An
nie Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

CS
EV

A
Wistron Corporation A

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

D
Title

CPU (CFG)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 6 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = CPU
1D35V_S3 VDDQ_CPU

0726_SA_delete R716 PG701

1 2 VCC_CORE
HSW_ULT_DDR3L 12 OF 19
CPU1L
0726_SA_delete R702 ; R708 ;R709 GAP-CLOSE-PW R
L59 RSVD#L59 VCC C36
D PG702 VDDQ_CPU J58 C40 D

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RSVD#J58 VCC
1 2 VCC C44
VDDQ_CPU AH26 C48
GAP-CLOSE-PW R VDDQ VCC
AJ31 VDDQ VCC C52
AJ33 VDDQ VCC C56
PG703 AJ37 E23
VDDQ VCC
1 2 AN33 E25

nfi
VDDQ VCC
AP43 VDDQ VCC E27
GAP-CLOSE-PW R AR48 E29
VDDQ VCC
AY35 VDDQ VCC E31
PG704 AY40 E33
VCC_CORE VDDQ VCC
1 2 AY44 VDDQ VCC E35

de
AY50 VDDQ VCC E37
GAP-CLOSE-PW R E39
VCC
F59 VCC VCC E41
PG705 N58 E43
RSVD#N58 VCC
1 2 AC58 RSVD#AC58 VCC E45
VCC E47
GAP-CLOSE-PW R VCC_SENSE E63 E49

nti
1D05V_VTT VCOMP_OUT VCC_SENSE VCC
AB23 RSVD#AB23 VCC E51
PG706 TP702 1 VCCIO_OUT A59 E53
R703 VCCIO_OUT VCC
1 2 E20 VCCIOA_OUT VCC E55
1 110R2F-GP
2 H_CPU_SVIDDAT AD23 RSVD#AD23 VCC E57
GAP-CLOSE-PW R AA23 F24
R704 RSVD#AA23 VCC

al,
EA40-HW SB AE59 RSVD#AE59 VCC F28
1 75R2F-2-GP
2 VR_SVID_ALERT# R705
VCC F32
46 VR_SVID_ALERT# 2 43R2J-GP
1 H_CPU_SVIDALRT# L62 VIDALERT# VCC F36
N63 HSW ULT POWER F40
Close to CPU 46 H_CPU_SVIDCLK VIDSCLK VCC
46 H_CPU_SVIDDAT L63 VIDSOUT VCC F44
C VCCST_PW RGD B59 F48 C
R711 VCCST_PWRGD VCC
46 H_VR_EN F60 VR_EN VCC F52
2 10KR2J-L-GP
1 IMVP_PW RGD_R C59 F56

r
R712 VR_READY VCC
VCC G23
1 0R2J-L-GP
2 D63 G25

efe
17,26,36,46,86 IMVP_PW RGD VSS VCC
DY PW R_DEBUG H59 G27
PWR_DEBUG# VCC
P62 VSS VCC G29
1D05V_VTT P60 G31
RSVD_TP#P60 VCC
DY P61 RSVD_TP#P61 VCC G33
R717 N59 G35
RSVD_TP#N59 VCC
2 10KR2J-L-GP
1 IMVP_PW RGD_R N61 RSVD_TP#N61 VCC G37
T59 RSVD#T59 VCC G39

r
R710 AD60 G41
RSVD#AD60 VCC
2 10KR2J-L-GP
1 VCCST_PW RGD AD59 RSVD#AD59 VCC G43
DY AA59 RSVD#AA59 VCC G45
AE60 G47

by
RSVD#AE60 VCC
AC59 RSVD#AC59 VCC G49
AG58 RSVD#AG58 VCC G51
1D05V_VTT U59 G53
RSVD#U59 VCC
Follow Intel CRB V59 RSVD#V59 VCC G55
VCC G57
1D05V_VTT AC22 H23
VCC_CORE VCCST VCC
AE22 J23

An
VCCST VCC
1 R706 2 PW R_DEBUG AE23 VCCST VCC K23
150R2F-4-L-GP K57
VCC
AB57 VCC VCC L22
AD57 VCC VCC M23
AG57 VCC VCC M57
VCC_CORE C24 P57
B VCC VCC B
C28 U57

nie
VCC VCC
C32 VCC VCC W57
1

R701 HASW ELL-6-GP

100R2F-L1-GP-U
2

1D05V_VTT

CS
46 VCC_SENSE

R901 close to CPU

0726_SA
1

C703 C715
放放AC22 AE22 AE23
C703,C715放
SC22U6D3V3MX-1-GP

SC1U6D3V2KX-L-1-GP

DY
2

36,37,46,48,86 1.05VTT_PW RGD

1
2
3
4
RN702
8
7
6
5

SRN10KJ-6-GP
VCCST_PW RGD D EV
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_CORE)
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 7 of 102

5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D

co
nfi
de
nti CPU1A HSW_ULT_DDR3L 1 OF 19

HDMI
54
54
54
54
54
DDBP_DATA2#
DDBP_DATA2
DDBP_DATA1#
DDBP_DATA1
DDBP_DATA0#
C54
C55
B58
C58
B55
DDI1_TXN0
DDI1_TXP0
DDI1_TXN1
DDI1_TXP1
DDI1_TXN2
al, EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
C45
B46
A47
B47
DP_TXN0_CPU
DP_TXP0_CPU
DP_TXN1_CPU
DP_TXP1_CPU
52
52
52
52
C

r
54 DDBP_DATA0 A55 DDI1_TXP2 EDP_TXN2 C47
54 DDBP_DATA3# A57 DDI1_TXN3 EDP_TXP2 C46

efe
54 DDBP_DATA3 B57 DDI1_TXP3 EDP_TXN3 A49
DDI EDP B49
EDP_TXP3
53 PCH_DPC_N0 C51 DDI2_TXN0
53 PCH_DPC_P0 C50 DDI2_TXP0 EDP_AUXN A45 DP_AUXN_CPU 52
C53 B45 VCOMP_OUT
DP to Display Port 53
53
PCH_DPC_N1
PCH_DPC_P1 B54
DDI2_TXN1
DDI2_TXP1
EDP_AUXP DP_AUXP_CPU 52
R801
C49 D20 EDP_RCOMP 2 24D9R2F-L-GP
1
DDI2_TXN2 EDP_RCOMP EDP_DISP
B50 DDI2_TXP2 EDP_DISP_UTIL A43 1 TP802
A53

r
DDI2_TXN3
B53 DDI2_TXP3

HASW ELL-6-GP

71.HASWE.G0U
by
B An B

nie
CS
D Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
A application without get Wistron permission A
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDI/EDP)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 8 of 102

5 4 3 2 1
 5 4 3 2 1

SSID = CPU

CPU1P HSW_ULT_DDR3L 16 OF 19

VSS H17
D D33 H57 D

co
VSS VSS
D34 VSS VSS J10
D35 VSS VSS J22
D37 VSS VSS J59
D38 VSS VSS J63
D39 VSS VSS K1
D41 K12

nfi
VSS VSS
D42 VSS VSS L13
D43 VSS VSS L15
D45 VSS VSS L17
D46 VSS VSS L18
D47 VSS VSS L20

de
D49 VSS VSS L58
D5 VSS VSS L61
D50 VSS VSS L7
D51 VSS VSS M22
D53 VSS VSS N10
D54 VSS VSS N3
D55 P59

nti
VSS VSS
D57 VSS VSS P63
D59 VSS VSS R10
D62 VSS VSS R22
D8 VSS VSS R8
E11 VSS VSS T1

al,
E17 VSS VSS T58
F20 VSS VSS U20
F26 VSS VSS U22
F30 VSS VSS U61
F34 VSS VSS U9
C F38 V10 C
VSS VSS
F42 VSS VSS V3
F46 V7

r
VSS VSS
F50 VSS VSS W20
F54 W22

efe
VSS VSS
F58 VSS VSS Y10
F61 VSS VSS Y59
G18 VSS VSS Y63
G22 VSS
G3 VSS
G5 VSS VSS V58
G6 VSS VSS AH46

r
G8 VSS VSS V23
H13 VSS VSS_SENSE E62 VSS_SENSE 46
VSS AH16

by
HASW ELL-6-GP
VSS_SENSE

1
R901
100R2F-L1-GP-U
R901 close to CPU

An

2
B B

nie
CS
EV
D Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 9 of 102

5 4 3 2 1
 5 4 3 2 1

VDDQ_CPU VCC_CORE
MAX: 9.76A

co
D D

1
PC1010 PC1009 PC1008 PC1007 PC1006 PC1005 PC1004 PC1003 PC1002 PC1001
1

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
C1040 C1035 C1036 C1037 C1038 C1039
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
nfi

2
2

2
de DY DY

nti
1

al,

1
C1006 C1007 C1008 C1009 PC1020 PC1019 PC1018 PC1017 PC1016 PC1015 PC1014 PC1013 PC1012 PC1011

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP
2

DY DY DY DY

2
C C

refe
r
DY
For Intel Recommend EE Part VCC_CORE

by
VCC_CORE

PT1001

An
1
ST330U2VDM-8-GP-U
DY

1
2 C1002 C1003 C1004 C1005

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP
3

2
nie
B B

For Intel Recommend

CS EE Part

EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (Power CAP1)

Size Document Number Rev
A4
EA40_HW ULT 1
Date: Thursday, June 06, 2013 Sheet 10 of 102
5 4 3 2 1
 5 4 3 2 1

0726_SA 擺放擺擺擺擺放擺擺擺Page 21
每每擺放每每 0726_SA DY C1137
MAX: 1.92A
3D3V_SUS

1D05V_HSIO +V1.05S_AUSB3PLL 1D05V_HSIO +V1.05S_ASATA3PLL RTC_AUX_S5

1D05V_HSIO L1101
D L1102 IND-2D2UH-196-GP D

1 2 1 2

1
IND-2D2UH-196-GP C1108 C1109 C1113 C1104 C1106 C1116
0726_SA

SC22U6D3V5MX-L3-GP
0726_SA 0726_SA

1
co

1
放放 pin AC9

SC4D7U6D3V3KX-L-GP

SC10U6D3V3MX-L-GP

SC22U6D3V5MX-L3-GP

SC4D7U6D3V3KX-L-GP

SC10U6D3V3MX-L-GP
C1102;C1103
C1102 C1103 0726_SA C1114 C1135 C1136 C1137 C1116放

2
C1104 ;C1106 ;C1114

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC22U6D3V5MX-L3-GP

SC1U6D3V3KX-2GP

SCD1U25V3KX-L-GP

SCD1U25V3KX-L-GP
放放pin K9 L10 C1108 ;C1109 ;C1113 放放 pin B11
2

2
放放 pin B18 DY DY

nfi
DY

de
0726_SA
C
C1135;C1136;C1137 C
放放 pin AG10

3D3V_S0

MAX: 0.285A
nti 1D05V_VTT
L1104
+V1.05S_AXCK_LCPLL 1D05V_VTT
L1103
+V1.05S_AXCK_DCB
MAX: 3.51A

al,
0726_SA 1 2 1 2
IND-2D2UH-196-GP C1118 C1120 C1121 C1111 C1115 C1117
C1101 放放 pin V8
1

C1119 C1101 IND-2D2UH-196-GP

1
C1119 放放 pin K14
SCD1U10V2KX-L1-GP

SC22U6D3V5MX-L3-GP

SC4D7U6D3V3KX-L-GP

SC10U6D3V3MX-L-GP

SC22U6D3V5MX-L3-GP

SC4D7U6D3V3KX-L-GP

SC10U6D3V3MX-L-GP

SC22U6D3V5MX-L3-GP
0726_SA
0726_SA
2

C1118;C1120;C1121

2
DY C1111;C1115;C1117 DY

r
放放 pin A20
放放 pin J18
B

efe B

r
1D05V_VTT 1D05V_VTT 1D05V_VTT

0726_SA DY 0726_SA 0726_SA

by C1122 C1123 C1124
1

1
SC4D7U6D3V3KX-L-GP

SC10U6D3V3MX-L-GP
C1144 C1112 C1134 C1141 C1110
SC1U6D3V2KX-L-1-GP

SC22U6D3V5MX-L3-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC22U6D3V5MX-L3-GP

SC22U4V3MX-GP
C1144;C1112 C1110 放放 pin J11 C1122;C1123;C1124 Wistron Confidential document, Anyone can not

DY
Duplicate, Modify, Forward or any other purpose
放放 pin AA21
2

2
放放 pin AE9 C1134 C1141 放放 pin J11, AE8 EV
application without get Wistron permission

An Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
A

nie
Title

CPU (Power CAP2)

Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 11 of 102
5 4 3 2 1

CS
D
 5 4 3 2 1

DM1
SSID = MEMORY M_A_A0 98
A0 NP1
NP1
Note:
M_A_A1 97 NP2 If SA0 DIM0 = 0, SA1_DIM0 = 0
M_A_A2 A1 NP2
M_A_A[15:0] 5 96 SO-DIMMA SPD Address is 0xA0
M_A_A3 A2
95 110 M_A_RAS# 5
A3 RAS#
M_A_A4 92
A4 WE#
113 M_A_WE# 5 SO-DIMMA TS Address is 0x30
M_A_A5 91 115
A5 CAS# M_A_CAS# 5
M_A_A6 90
A6
M_A_A7 86
A7 CS0#
114 M_A_DIM0_CS#0 5 If SA0 DIM0 = 1, SA1_DIM0 = 0
M_A_A8 89 121 M_A_DIM0_CS#1 5
M_A_A9 85
A8 CS1# SO-DIMMA SPD Address is 0xA2
M_A_A10 A9
M_A_A11
107
A10/AP CKE0
73 M_A_DIM0_CKE0 5 SO-DIMMA TS Address is 0x32
84 74 M_A_DIM0_CKE1 5
M_A_A12 A11 CKE1
83
M_A_A13 A12
119 101 M_A_DIM0_CLK_DDR0 5
M_A_A14 A13 CK0
80 103 M_A_DIM0_CLK_DDR#0 5
M_A_A15 A14 CK0#
78
5 M_A_BS2
79
A15
A16/BA2 CK1
102 M_A_DIM0_CLK_DDR1 5
0726_SA Thermal EVENT
D 104 M_A_DIM0_CLK_DDR#1 5 D
CK1# 3D3V_S0
109

co
5 M_A_BS0 BA0 R1204
108 11
5 M_A_BS1 BA1 DM0 TS#_DIMM0_1
28 1 10KR2J-L-GP
2
M_A_DQ<13> DM1
5 M_A_DQ<13> 5 46
M_A_DQ<8> DQ0 DM2
5 M_A_DQ<8> 7 63
M_A_DQ<14> DQ1 DM3
5 M_A_DQ<14> 15 136
M_A_DQ<10> DQ2 DM4
5 M_A_DQ<10> 17 153
M_A_DQ<9> DQ3 DM5
5 M_A_DQ<9> 4 170
M_A_DQ<12> DQ4 DM6
5 M_A_DQ<12> 6 187

nfi
M_A_DQ<15> DQ5 DM7
5 M_A_DQ<15> 16
M_A_DQ<11> DQ6
5 M_A_DQ<11> 18 200 PCH_SMBDATA 13,18
M_A_DQ<29> DQ7 SDA
5 M_A_DQ<29> 21 202 PCH_SMBCLK 13,18
M_A_DQ<28> DQ8 SCL
5 M_A_DQ<28> 23
M_A_DQ<30> DQ9 TS#_DIMM0_1 3D3V_S0 1D35V_S3
5 M_A_DQ<30> 33 198
M_A_DQ<31> DQ10 EVENT#
5 M_A_DQ<31> 35
M_A_DQ<25> DQ11
5 M_A_DQ<25> 22 199
M_A_DQ<24> DQ12 VDDSPD
5 M_A_DQ<24> 24
DQ13

de
M_A_DQ<27> 34 197
5 M_A_DQ<27>

1
M_A_DQ<26> DQ14 SA0 C1203
5 M_A_DQ<26> 36 201
DQ15 SA1

SCD1U10V2KX-L1-GP
M_A_DQ<44> 39
5 M_A_DQ<44> DQ16
M_A_DQ<41> 41 77 Q1203

D
2
5 M_A_DQ<41> M_A_DQ<43> DQ17 NC#1
5 M_A_DQ<43> 51 122
M_A_DQ<47> DQ18 NC#2 1D35V_S3 1D35V_S3 3D3V_S0 3D3V_S5 DMN5L06K-7-GP
53 125
5
5
M_A_DQ<47>
M_A_DQ<45>
M_A_DQ<45> 40
DQ19 NC#/TEST ODT resistor must be 66.5 ohm
M_A_DQ<40> DQ20
5 M_A_DQ<40> 42 75 G R1208
M_A_DQ<42> DQ21 VDD1 66D5R2F-GP
5 M_A_DQ<42> 50 76 84.05067.031

1
nti
M_A_DQ<46> DQ22 VDD2 R1212 R1207 M_A_DIM0_ODT0
5 M_A_DQ<46> 52 81 1 2
M_A_DQ<51> DQ23 VDD3
57 82 DY

S
5 M_A_DQ<51> DQ24 VDD4

220KR2J-L2-GP

220KR2J-L2-GP
M_A_DQ<50> 59 87
5 M_A_DQ<50> M_A_DQ<49> DQ25 VDD5 R1209
67 88 66D5R2F-GP
5 M_A_DQ<49> M_A_DQ<48> DQ26 VDD6 M_A_DIM0_ODT1
69 93 1 2

2
5 M_A_DQ<48> DQ27 VDD7
M_A_DQ<52> 56 94
5 M_A_DQ<52> DQ28 VDD8
M_A_DQ<53> 58 99
5 M_A_DQ<53> DQ29 VDD9
M_A_DQ<54> 68 100 M_A_B_DIM_ODT
5 M_A_DQ<54> DQ30 VDD10

al,
M_A_DQ<55> 70 105 S D
5 M_A_DQ<55> DQ31 VDD11 4 DDR_PG_CTRL R1210
M_A_DQ<0> 129 106 66D5R2F-GP
5 M_A_DQ<0> DQ32 VDD12
M_A_DQ<1> 131 111 1 2
5 M_A_DQ<1> DQ33 VDD13 M_B_DIM0_ODT0 13
M_A_DQ<2> 141 112 84.05067.031
5 M_A_DQ<2> M_A_DQ<6> DQ34 VDD14 Q1202
5 M_A_DQ<6> 143 117 R1211
M_A_DQ<5> DQ35 VDD15 DMN5L06K-7-GP 66D5R2F-GP
5 M_A_DQ<5> 130 118
M_A_DQ<4> DQ36 VDD16
C
5 M_A_DQ<4> 132 123 1 2 M_B_DIM0_ODT1 13 C
M_A_DQ<3> DQ37 VDD17
140 124
5
5
M_A_DQ<3>
M_A_DQ<7>
M_A_DQ<7> 142
DQ38 VDD18 限限限84.05067.031
Q1202 Q1203限
M_A_DQ<21> DQ39
147 2
5 M_A_DQ<21>
M_A_DQ<20> 149
DQ40 VSS
3 因因因因Vth因 因1V DDR_PG_OUT 49

r
5 M_A_DQ<20> M_A_DQ<17> DQ41 VSS
5 M_A_DQ<17> 157 8
M_A_DQ<16> DQ42 VSS
5 M_A_DQ<16> 159 9
DQ43 VSS

efe
M_A_DQ<18> 146 13
5 M_A_DQ<18> DQ44 VSS
M_A_DQ<19> 148 14
5 M_A_DQ<19> DQ45 VSS
M_A_DQ<22> 158 19
5 M_A_DQ<22> DQ46 VSS
M_A_DQ<23> 160 20
5 M_A_DQ<23> DQ47 VSS 1D35V_S3
M_A_DQ<36> 163 25
5 M_A_DQ<36> DQ48 VSS
M_A_DQ<33> 165 26
5 M_A_DQ<33> DQ49 VSS
M_A_DQ<34> 175 31
5 M_A_DQ<34> Layout Note:

1
M_A_DQ<38> DQ50 VSS
5 M_A_DQ<38> 177 32
DQ51 VSS
5 M_A_DQ<37>
M_A_DQ<37> 164
DQ52 VSS
37 Place these Caps near R1203
M_A_DQ<32> 166 38 1K8R2F-GP
5 M_A_DQ<32>
M_A_DQ<35> 174
DQ53 VSS
43 SO-DIMMA.
5 M_A_DQ<35> DQ54 VSS 1D35V_S3

r
M_A_DQ<39> 176 44
5 M_A_DQ<39>

2
M_A_DQ<62> DQ55 VSS
5 M_A_DQ<62> 181 48 SODIMM A DECOUPLING R1205
M_A_DQ<58> DQ56 VSS
5 M_A_DQ<58> 183 49
M_A_DQ<60> DQ57 VSS VREF_DQ0
5 M_A_DQ<60> 191 54 5 M_VREF_DQ_DIMM0_C 1 2
M_A_DQ<61> DQ58 VSS
5 M_A_DQ<61> 193 55
DQ59 VSS

by
M_A_DQ<63> 180 60
5 M_A_DQ<63> DQ60 VSS 2R2J-2-GP
M_A_DQ<59> 182 61 C1202
5 M_A_DQ<59>

1
M_A_DQ<56> DQ61 VSS C1206 C1207 C1208 C1209 C1210
5 M_A_DQ<56> 192 65

1
DQ62 VSS

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SCD022U16V2KX-3GP
M_A_DQ<57> 194 66
5 M_A_DQ<57>

1
DQ63 VSS
71

2
M_A_DQS_DN<1> VSS R1202
5 M_A_DQS_DN<1> 10 72

2
M_A_DQS_DN<3> DQS0# VSS 1K8R2F-GP
5 M_A_DQS_DN<3> 27 127
M_A_DQS_DN<5> DQS1# VSS

2VREF_DIMM0
5 M_A_DQS_DN<5> 45 128
M_A_DQS_DN<6> DQS2# VSS
62 133

2
5 M_A_DQS_DN<6> DQS3# VSS
M_A_DQS_DN<0> 135 134
5 M_A_DQS_DN<0> M_A_DQS_DN<2> DQS4# VSS
152 138

An
5 M_A_DQS_DN<2> M_A_DQS_DN<4> DQS5# VSS
5 M_A_DQS_DN<4> 169 139
M_A_DQS_DN<7> DQS6# VSS
5 M_A_DQS_DN<7> 186 144
VREF_CA VREF_DQ0 DQS7# VSS
145
M_A_DQS_DP<1> VSS R1206
5 M_A_DQS_DP<1> 12 150 1

1
M_A_DQS_DP<3> DQS0 VSS C1223 C1222 C1221 C1220
5 M_A_DQS_DP<3> 29 151 24D9R2F-L-GP
DQS1 VSS SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP
M_A_DQS_DP<5> 47 155
5 M_A_DQS_DP<5>
1

C1217 M_A_DQS_DP<6> DQS2 VSS

64 156
2

1
5 M_A_DQS_DP<6>
1

DQS3 VSS
SCD1U10V2KX-L1-GP

B C1218 M_A_DQS_DP<0> 137 161 B

5 M_A_DQS_DP<0> DQS4 VSS
SCD1U10V2KX-L1-GP

M_A_DQS_DP<2> 154 162 0D675V_S0

2

5 M_A_DQS_DP<2> DQS5 VSS

nie
M_A_DQS_DP<4> 171 167
5 M_A_DQS_DP<4>
2

M_A_DQS_DP<7> DQS6 VSS

5 M_A_DQS_DP<7> 188 168
DQS7 VSS
172
M_A_DIM0_ODT0 116
ODT0
VSS
VSS
173 For Intel Recommend Close to DIMM
M_A_DIM0_ODT1 120 178
1

ODT1 VSS C1214 C1215 C1219 C1216

179
VSS
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

VREF_CA 126 184

13,37 VREF_CA VREF_DQ0 VREF_CA VSS Place these caps
1 185
2

VREF_DQ VSS
VSS
189 close to VTT1 and
Close RAM1 CA & DQ pin 30 190
13,37 DDR3_DRAMRST# RESET# VSS
195 VTT2.
VSS
196
VSS
62.10017.Z61 203 205

CS
0D675V_S0 VTT1 VSS
204 206
VTT2 VSS
2nd = 62.10024.G11
3rd = 62.10024.M51
4th = 62.10017.X31 H = 4mm DDR3-204P-123-GP

A
D A

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Title

DDR3-SODIMM1
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 12 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = MEMORY DM2

M_B_A0 98 NP1
M_B_A1 A0 NP1
97 NP2
M_B_A2 A1 NP2
M_B_A[15:0] 5 96
M_B_A3 A2
95 110 M_B_RAS# 5
M_B_A4 A3 RAS#
92 113 M_B_WE# 5
M_B_A5 A4 WE#
91 115 M_B_CAS# 5
M_B_A6 A5 CAS#
90
M_B_A7 A6
86 114 M_B_DIM0_CS#0 5
M_B_A8 A7 CS0#
89 121 M_B_DIM0_CS#1 5
M_B_A9 A8 CS1#
85
M_B_A10 A9
107 73 M_B_DIM0_CKE0 5
M_B_A11 A10/AP CKE0
84 74 M_B_DIM0_CKE1 5
M_B_A12 A11 CKE1
M_B_A13
83
A12 Note:
119 101 M_B_DIM0_CLK_DDR0 5
M_B_A14 A13 CK0 SO-DIMMB SPD Address is 0xA4
80 103 M_B_DIM0_CLK_DDR#0 5
M_B_A15 A14 CK0#
78 SO-DIMMB TS Address is 0x34
A15
D 79 102 M_B_DIM0_CLK_DDR1 5 D
5 M_B_BS2 A16/BA2 CK1
104

co
CK1# M_B_DIM0_CLK_DDR#1 5
109
5 M_B_BS0 BA0
5 M_B_BS1
108
BA1 DM0
11 SO-DIMMB is placed farther from
28
DM1 the Processor than SO-DIMMA
5 M_B_DQ<4> 5 46
DQ0 DM2
5 M_B_DQ<1> 7 63
DQ1 DM3
5 M_B_DQ<3> 15 136
DQ2 DM4
5 M_B_DQ<7> 17 153
DQ3 DM5
5 M_B_DQ<5> 4 170

nfi
DQ4 DM6
5 M_B_DQ<0> 6 187
DQ5 DM7
5 M_B_DQ<2> 16
DQ6
18 200
5
5
M_B_DQ<6>
M_B_DQ<21> 21
DQ7
DQ8
SDA
SCL
202
PCH_SMBDATA 12,18
PCH_SMBCLK 12,18
Thermal EVENT
5 M_B_DQ<20> 23
DQ9 TS#_DIMM1_1 3D3V_S0 3D3V_S0
5 M_B_DQ<22> 33 198
DQ10 EVENT# R1302
5 M_B_DQ<23> 35
DQ11 TS#_DIMM1_1
5 M_B_DQ<16> 22 199 1 10KR2J-L-GP
2
DQ12 VDDSPD

de
5 M_B_DQ<17> 24
DQ13 R1305
5 M_B_DQ<19> 34 197

1
DQ14 SA0 SA1_DIM1
5 M_B_DQ<18> 36 201 1 10KR2J-L-GP
2 C1303
DQ15 SA1

SCD1U10V2KX-L1-GP
39
5 M_B_DQ<36>
41
DQ16
77 0726_SA

2
5 M_B_DQ<33> DQ17 NC#1
5 M_B_DQ<35> 51 122
DQ18 NC#2 1D35V_S3
5 M_B_DQ<39> 53 125
DQ19 NC#/TEST
5 M_B_DQ<37> 40
DQ20
5 M_B_DQ<32> 42 75

nti
DQ21 VDD1
5 M_B_DQ<34> 50 76
DQ22 VDD2
5 M_B_DQ<38> 52 81
DQ23 VDD3
5 M_B_DQ<52> 57 82
DQ24 VDD4
5 M_B_DQ<49> 59 87
DQ25 VDD5
5 M_B_DQ<48> 67 88
DQ26 VDD6
5 M_B_DQ<53> 69 93
DQ27 VDD7
5 M_B_DQ<51> 56 94
DQ28 VDD8
5 M_B_DQ<55> 58 99
DQ29 VDD9

al,
5 M_B_DQ<54> 68 100
DQ30 VDD10
5 M_B_DQ<50> 70 105
DQ31 VDD11
5 M_B_DQ<8> 129 106
DQ32 VDD12
5 M_B_DQ<14> 131 111
DQ33 VDD13
5 M_B_DQ<10> 141 112
DQ34 VDD14
5 M_B_DQ<11> 143 117
DQ35 VDD15
C
5 M_B_DQ<12> 130 118 C
DQ36 VDD16
5 M_B_DQ<9> 132 123
DQ37 VDD17
5 M_B_DQ<13> 140 124
DQ38 VDD18
5 M_B_DQ<15> 142
DQ39
147 2 Layout Note:

r
5 M_B_DQ<28> DQ40 VSS
5 M_B_DQ<29> 149 3
DQ41 VSS Place these Caps near
5 M_B_DQ<26> 157 8
DQ42 VSS

efe
5 M_B_DQ<27> 159 9 SO-DIMMB.
DQ43 VSS 1D35V_S3
5 M_B_DQ<25> 146 13
DQ44 VSS
5 M_B_DQ<24> 148 14
DQ45 VSS
5 M_B_DQ<30> 158 19

1
DQ46 VSS 1D35V_S3
5 M_B_DQ<31> 160
DQ47 VSS
20 SODIMM B DECOUPLING R1304
5 M_B_DQ<40> 163 25
DQ48 VSS 1K8R2F-GP
5 M_B_DQ<41> 165 26
DQ49 VSS
5 M_B_DQ<46> 175 31
DQ50 VSS
177 32

2
5 M_B_DQ<42> DQ51 VSS
5 M_B_DQ<45> 164 37 R1306

1
DQ52 VSS C1305 C1306 C1307 C1308 C1309 C1310
5 M_B_DQ<44> 166 38
DQ53 VSS

SC5D6P50V2CN-1GP

SC56P50V2JN-2GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
r
174 43 1 2 VREF_DQ1
5 M_B_DQ<47> DQ54 VSS 5 M_VREF_DQ_DIMM1_C
176 44

2
5 M_B_DQ<43> DQ55 VSS
5 M_B_DQ<56> 181 48
DQ56 VSS 2R2J-2-GP
5 M_B_DQ<57> 183 49
DQ57 VSS
5 M_B_DQ<59> 191 54

1
DQ58 VSS

by
193 55 C1311
5 M_B_DQ<58>

1
DQ59 VSS

SCD022U16V2KX-3GP
5 M_B_DQ<61> 180 60
DQ60 VSS R1303
182 61

2
5 M_B_DQ<60> DQ61 VSS 1K8R2F-GP
5 M_B_DQ<63> 192 65
DQ62 VSS

2VREF_DIMM1
5 M_B_DQ<62> 194 66
DQ63 VSS
71

2
1

1
VSS C1320 C1321 C1318 C1319
5 M_B_DQS_DN<0> 10 72
DQS0# VSS
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP
5 M_B_DQS_DN<2> 27 127
DQS1# VSS
45 128
2

2
5 M_B_DQS_DN<4> DQS2# VSS
5 M_B_DQS_DN<6> 62 133
DQS3# VSS
135 134

An
5 M_B_DQS_DN<1> DQS4# VSS
152 138 R1307
5 M_B_DQS_DN<3> DQS5# VSS
5 M_B_DQS_DN<5> 169 139 24D9R2F-L-GP
DQS6# VSS
5 M_B_DQS_DN<7> 186 144
DQS7# VSS
145

1
VSS
5 M_B_DQS_DP<0> 12 150
DQS0 VSS
5 M_B_DQS_DP<2> 29 151
DQS1 VSS
5 M_B_DQS_DP<4> 47 155
B DQS2 VSS B
5 M_B_DQS_DP<6> 64 156
DQS3 VSS
137 161
5 M_B_DQS_DP<1> DQS4 VSS For Intel Recommend Close to DIMM

nie
5 M_B_DQS_DP<3> 154 162
DQS5 VSS
5 M_B_DQS_DP<5> 171 167
DQS6 VSS
5 M_B_DQS_DP<7> 188 168
DQS7 VSS
172
VSS
12 M_B_DIM0_ODT0 116 173
ODT0 VSS
12 M_B_DIM0_ODT1 120 178
ODT1 VSS
179
VREF_CA VSS 0D675V_S0
126 184
12,37 VREF_CA VREF_DQ1 VREF_CA VSS
1 185
VREF_DQ VSS
189
VSS
12,37 DDR3_DRAMRST# 30 190
RESET# VSS
195
VSS
196

CS
1

VSS C1314 C1315 C1316 C1317

0D675V_S0 203 205 Place these caps
VTT1 VSS
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

204 206
VTT2 VSS
close to VTT1 and
2

H=4mm DDR3-204P-122-GP-U1 VTT2.

2nd = 62.10024.G21

VREF_CA VREF_DQ1 3rd = 62.10024.M31

D
4th = 62.10017.X41
1

C1302
1
SCD1U10V2KX-L1-GP

C1304 62.10017.Z51
SCD1U10V2KX-L1-GP
2

A Close RAM3 CA & DQ pin A

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application without get Wistron permission
EV

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Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM2
Size Document Number Rev
A2
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 13 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)_SODIMM _SODIMM4
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 14 of 102
5 4 3 2 1
 5 4 3 2 1

D D

co
3D3V_S0

3D3V_S0

2
1
nfi
RN1509
SRN2K2J-5-GP

4
3
RN1506
HSW_ULT_DDR3L 9 OF 19
R1501 CPU1I SRN2K2J-5-GP

3
4
1 100KR2J-4-GP L_BKLT_EN

de
2

1
2
52 L_BKLT_CTRL B8 EDP_BKLCTL DDPB_CTRLCLK B9 PCH_HDMI_CLK 54
24 L_BKLT_EN A9 EDP_BKLEN DDPB_CTRLDATA C9 PCH_HDMI_DATA 54
C6 eDP SIDEBAND D9

nti
3D3V_S0 52 LVDS_VDD_EN EDP_VDDEN DDPC_CTRLCLK PCH_CRT_CLK 53
DDPC_CTRLDATA D11 PCH_CRT_DATA 53

RN1503 INT_PIRQA# U6
INT_PIRQC# INT_PIRQB# PIRQA#/GPIO77 DDPB_AUXN
1 4 P4 PIRQB#/GPIO78 DDPB_AUXN C5 1 TP1506
TP_IN# INT_PIRQC#

al,
2 3 N4 PIRQC#/GPIO79 DDPC_AUXN B6 PCH_DPC_AUXN 53
INT_PIRQD# N2 DISPLAY B5 DDPB_AUXP 1
PIRQD#/GPIO80 DDPB_AUXP TP1508
SRN10KJ-L-GP TP1502 1 MCP_PME AD4 A6
PME# PCIE DDPC_AUXP PCH_DPC_AUXP 53
RN1504 U7
86 TP_IN# GPIO55
C SRN10KJ-6-GP L1 C
73 DGPU_HOLD_RST# GPIO52
1 8 INT_PIRQB# PSW _CLR# L3 C8
73 PSW _CLR# GPIO54 DDPB_HPD HDMI_PCH_DET 54
2 7 INT_PIRQD# R5 A8

r
24,82,83,86 DGPU_PW ROK GPIO51 DDPC_HPD CRT_PCH_HPD 53
3 6 PSW _CLR# L4 D6
83 DGPU_PW R_EN# GPIO53 EDP_HPD DP_HPD 52
4 5 INT_PIRQA#

2
R1520
1 DGPU_PW R_EN#
efe
HASW ELL-6-GP

71.HASWE.G0U

r
10KR2J-L-GP

PSW _CLR#

by
2

G1501
GAP-OPEN

An
Pass Word Clear
1

DGPU_HOLD_RST#
2

R1519
B B
10KR2J-L-GP

nie
1

CS
D EV
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Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(EDP SIDEBAND/GPIO/DDI)
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 15 of 102

5 4 3 2 1
 5 4 3 2 1

SSID = PCH USB Table

Pair Device
0 USB2.0 Port 1
1 USB3.0 Port 2(USB2.0)
CPU1K HSW_ULT_DDR3L 11 OF 19 2 USB2.0 Port 3
D D

co
3
73 PEG_RXN0 F10 PERN5_L0 USB2N0 AN8 USB_PN0 63,86
73 PEG_RXP0 E10 PERP5_L0 USB2P0 AM8 USB_PP0 63,86 4 CCD
C1605 1 2 SCD1U10V2KX-L1-GP PEG_TXN0_C C23 AR7 5
73 PEG_TXN0
C1606 PETN5_L0 USB2N1 USB_PN1 34 WLAN(Bluetooth)
1 2 SCD1U10V2KX-L1-GP PEG_TXP0_C C22 AT7

nfi
73 PEG_TXP0 PETP5_L0 USB2P1 USB_PP1 34
6 Touch Penal
73 PEG_RXN1 F8 PERN5_L1 USB2N2 AR8 USB_PN2 63,86
73 PEG_RXP1 E8 PERP5_L1 USB2P2 AP8 USB_PP2 63,86 7
C1607 1 2 SCD1U10V2KX-L1-GP PEG_TXN1_C B23 AR10
73 PEG_TXN1 PETN5_L1 USB2N3
C1608 2 SCD1U10V2KX-L1-GP PEG_TXP1_C

de
73 PEG_TXP1 1 A23 PETP5_L1 USB2P3 AT10
GPU PEG BUS 73 PEG_RXN2 H10 AM15 USB_PN4 52
PERN5_L2 USB2N4
73 PEG_RXP2 G10 PERP5_L2 USB2P4 AL15 USB_PP4 52
C1613 1 2 SCD1U10V2KX-L1-GP PEG_TXN2_C B21 AM13
73 PEG_TXN2 PETN5_L2 USB2N5 USB_PN5 58
C1614 1 2 SCD1U10V2KX-L1-GP PEG_TXP2_C C21 AN13

nti
73 PEG_TXP2 PETP5_L2 USB2P5 USB_PP5 58

73 PEG_RXN3 E6 PERN5_L3 USB2N6 AP11 USB_PN6 52

73 PEG_RXP3 F6 PERP5_L3 USB2P6 AN11 USB_PP6 52
C1615 1 2 SCD1U10V2KX-L1-GP PEG_TXN3_C B22 AR13
73 PEG_TXN3 PETN5_L3 USB2N7
C1616 2 SCD1U10V2KX-L1-GP PEG_TXP3_C

al,
73 PEG_TXP3 1 A21 PETP5_L3 USB2P7 AP13

58 PCIE_RXN3 G11 PERN3

58 PCIE_RXP3 F11 PERP3 USB3RN1 G20 USB30_RN0 34
USB3RP1 H20 USB30_RP0 34
C C1619 1 2 SCD1U10V2KX-L1-GP PCIE_TXN3_C C29 C
WLAN 58
58
PCIE_TXN3
PCIE_TXP3
C1620 1 2 SCD1U10V2KX-L1-GP PCIE_TXP3_C B30
PETN3 PCIE USB C33
PETP3 USB3TN1 USB30_TN0 34
B34

r
USB3TP1 USB30_TP0 34
30 PCIE_RXN4 F13 PERN4
G13 E18

efe
30 PCIE_RXP4 PERP4 USB3RN2
F18
LAN + Cardreader30 PCIE_TXN4
C1621 1 2 SCD1U10V2KX-L1-GP PCIE_TXN4_C B29
USB3RP2
C1622 PETN4
30 PCIE_TXP4 1 2 SCD1U10V2KX-L1-GP PCIE_TXP4_C A29 PETP4 USB3TN2 B33
USB3TP2 A33
G17 3D3V_SUS
PERN1/USB3RN3
F17 PERP1/USB3RP3

r
C30 R1611
PETN1/USB3TN3

1
C31 AJ10 USB_RBIAS 1 22D6R2F-L1-GP
2
PETP1/USB3TP3 USBRBIAS# R1602
USBRBIAS AJ11
F15 AN10 MCP_TP13 1 10KR2J-L-GP

by
PERN2/USB3RN4 RSVD#AN10 TP1603
G15 AM10 MCP_TP14 1 TP1604
PERP2/USB3RP4 RSVD#AM10

2
B31 PETN2/USB3TN4
A31 PETP2/USB3TP4
AL3 USB_OC#
OC0/GPIO40#
OC1/GPIO41# AT1
+V1.05S_AUSB3PLL AH2

An
MCP_TP3 OC2/GPIO42#
TP1601 1 E15 RSVD#E15 OC3/GPIO43# AV3
R1601 TP1602 1 MCP_TP4 E13 RSVD#E13
1 3K01R2F-3-GP
2 PCIE_COMP A27 PCIE_RCOMP
B27 PCIE_IREF

B B

HASW ELL-6-GP

71.HASWE.G0U
nie
CS
D EV
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A A

Wistron Corporation
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Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCI/USB)
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 16 of 102

5 4 3 2 1
 5 4 3 2 1

SSID = PCH

DSWODVREN - On Die DSW VR Enable

D D

co
HIGH Enabled (DEFAULT)

LOW Disabled

3D3V_S0
R1701
Follow Intel CRB

nfi 1R1717 2
RTC_AUX_S5

330KR2J-L-GP

de
1 10KR2J-L-GP
2 SYS_RESET#
DSW ODVREN 1R1718 2
DY 330KR2J-L-GP

SYS_PW ROK_R
nti CPU1H HSW_ULT_DDR3L 8 OF 19

al,
86 SYS_PW ROK_R SYSTEM POWER MANAGEMENT

DY Non DS3
7,26,36,46,86 IMVP_PW RGD 1 R1726 2 0R2J-L-GP 24 PM_SUSACK#
PM_SUSACK# AK2 SUSACK# DSWVRMEN AW7 DSW ODVREN R1710
SYS_RESET# AC3 AV5 PCH_DPW ROK 1 0R2J-L-GP
2 PM_RSMRST#
SYS_RESET# DPWROK
C
24 S0_PW R_GOOD 1 R1724 2 0R2J-L-GP SYS_PW ROK_R AG2 SYS_PWROK WAKE# AJ5 PCIE_W AKE# 24,30,58
C
R1729 AY7
36,86 PCH_PW ROK PCH_PWROK
1 0R2J-L-GP
2 PCH_PW ROK_R AB5

r
APWROK
24,30,36,58,65,73,86,88 PLT_RST# AG7 PLTRST# CLKRUN#/GPIO32 V5 PM_CLKRUN#_EC 24,88
AG4

efe
SUS_STAT#/GPIO61 PM_SUS_STAT# 88
AE6 SUS_CLK 1 TP1702
SUSCLK/GPIO62 PM_SLP_S5#
SLP_S5#/GPIO63 AP5 1 TP1703
PM_RSMRST# AW6
PM_SUSW ARN# RSMRST#
DY 24 PM_SUSW ARN# AV4 SUSWARN#/SUSPWRDNACK#/GPIO30
R1715 AL7 AJ6
24,86 PM_PW RBTN# PWRBTN# SLP_S4# PM_SLP_S4# 24,49
1 10KR2J-L-GP
2 S0_PW R_GOOD
24 AC_PRESENT AJ8 ACPRESENT/GPIO31 SLP_S3# AT4 PM_SLP_S3# 24,27
BATLOW # AN4 AL5 SLP_A# 1 R1735 2 0R2J-L-GP M Sup
BATLOW#/GPIO72 SLP_A# PM_SLP_A# 24

r
DY PM_SLP_S0# AF3 AP4 PM_SLP_SUS#
24 PM_SLP_S0# SLP_S0# SLP_SUS# PM_SLP_SUS# 24,38
R1720 1 SLP_W LAN# AM5 AJ7
TP1719 SLP_WLAN#/GPIO29 SLP_LAN#
1 10KR2J-L-GP
2 PCH_PW ROK

R1727
1 10KR2J-L-GP
2 PM_RSMRST#
PM_SUSW ARN#
DY
R1738
1 0R2J-L-GP
2 PM_SUSACK#
HASW ELL-6-GP

71.HASWE.G0U by 86 PCH_DPW ROK

PCH_DPW ROK
DS3
R1737
1 0R2J-L-GP
2
DS3
KBC_DPW ROK 24,86

2
An
R1732
10KR2J-L-GP
DS3
3D3V_AUX_S5

1
3D3V_S5 Non DS3
R1709
B B
1 100KR2J-4-GP
2

RN1702

nie
2

1 4 PM_PW RBTN#
2 3 BATLOW # R1716 3D3V_SUS
10KR2J-L-GP R1702
SRN10KJ-L-GP Q1701 R1712 PM_SUSW ARN# 2 1KR2J-L2-GP
1
4 3 PM_RSMRST# 2 1KR2J-L2-GP
1 RSMRST#_KBC 24
1

3D3V_S0
3V_5V_POK_# 3V_5V_POK_C 1 R1730 2 0R2J-L-GP R1719

CS
5 2 3V_5V_POK 45
Non DS3 PM_CLKRUN#_EC 1 8K2R2J-3-GP
2
3D3V_S5 6 1 DS3
R1721
2N7002KDW -GP 1 0R2J-L-GP
2 PM_SLP_SUS# 3D3V_SUS
84.2N702.A3F
2nd = 75.00601.07C R1736
RN1703 3rd = 84.2N702.F3F PM_SUS_STAT# 1 10KR2J-L-GP
2

D
1 4 PCIE_W AKE#
2 3 AC_PRESENT

SRN10KJ-L-GP

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DMI/FDI/PM)
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 17 of 102

5 4 3 2 1
 5 4 3 2 1

SSID = PCH

HSW_ULT_DDR3L 6 OF 19
CPU1F

RN1810
D CLK_BUF_CKSSCD_N 2 3 D
CLK_BUF_CKSSCD_P 1 4

co
C43 A25 XTAL24_IN
CLKOUT_PCIE_N0 XTAL24_IN XTAL24_OUT SRN10KJ-L-GP
C42 B25
CK_REQ CLKOUT_PCIE_P0 XTAL24_OUT
U2
PCIECLKRQ0#/GPIO18 MCP_TP15 +V1.05S_AXCK_LCPLL RN1811
K21 1 TP1801
RSVD#K21 MCP_TP16 R1801 CLK_BUF_DOT96_P
B41 M21 1 TP1802 2 3
CLKOUT_PCIE_N1 RSVD#M21 DIFFCLK_BIAS CLK_BUF_DOT96_N
A41 C26 1 3K01R2F-3-GP
2 1 4
3D3V_S0 CK_REQ CLKOUT_PCIE_P1 DIFFCLK_BIASREF
Y5
RN1808 PCIECLKRQ1#/GPIO19 CLK_BUF_CKSSCD_N SRN10KJ-L-GP
C35

nfi
SRN10KJ-6-GP CLOCK TESTLOW_C35 CLK_BUF_CKSSCD_P
58 CLK_PCIE_WLAN# C41 C34
CLKOUT_PCIE_N2 TESTLOW_C34
1 8 PEG_CLKREQ# B42 AK8 CLK_BUF_DOT96_P 2 1 Need very close to PCH
2 7 PCIE_CLK_LAN_REQ# WLAN 58 CLK_PCIE_WLAN
58 CLK_PCIE_WLAN_REQ# AD1
CLKOUT_PCIE_P2 SIGNALS TESTLOW_AK8
AL8 CLK_BUF_DOT96_N R1804 22R2J-2-GP
CLK_PCI_LPC 65
PCIECLKRQ2#/GPIO20 TESTLOW_AL8
3 6 CLK_PCIE_WLAN_REQ#
4 5 CK_REQ 30 PCIE_CLK_LAN# B38 AN15 CLK_PCI_LPC_R 2 1 CLK_PCI_KBC 24
CLKOUT_PCIE_N3 CLKOUT_LPC_0 CLK_PCI_TPM_R
C37 AP15 2R1803 22R2J-2-GP
1
LAN+Cardreader 30 PCIE_CLK_LAN
30 PCIE_CLK_LAN_REQ# N1
CLKOUT_PCIE_P3 CLKOUT_LPC_1 R1802 22R2J-2-GP
CLK_PCI_TPM 88
EA40-HW SC
PCIECLKRQ3#/GPIO21 PCIE_CLK_XDP_N XTAL24_IN
B35 1 TP1803 2 1
CLKOUT_ITPXDP#

de
A39 A35 PCIE_CLK_XDP_P 1
Close to PCH 73 CLK_PCIE_VGA# CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P TP1804

EC1811

EC1809

EC1810
B39 C1808
GPU PEG BUS 7373 PEG_CLKREQ#
CLK_PCIE_VGA X1801

1
CLKOUT_PCIE_P4 SC15P50V2JN-L-GP
U5
PCIECLKRQ4#/GPIO22
B37 1 4

SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP
2

2
CLKOUT_PCIE_N5
A37
CK_REQ CLKOUT_PCIE_P5 R1807
T2
PCIECLKRQ5#/GPIO23
1MR2J-L3-GP
2 3

nti

1
HASWELL-6-GP DY DY DY
XTAL24_OUT XTAL-24MHZ-81-GP
2 1
71.HASWE.G0U
EA40-HW SC C1807
SC15P50V2JN-L-GP

82.30004.841

al, C

r
3D3V_S0

efe
RN1807
1 4
2 3

SRN2K2J-5-GP

TP1805 Q1801
1SMB_DATA 6 1 PCH_SMBDATA 12,13

r
5 2

4 3

2N7002KDW-GP

by
84.2N702.A3F
2nd = 75.00601.07C PCH_SMBCLK 12,13
TP1806 3rd = 84.2N702.F3F
1SMB_CLK

HSW_ULT_DDR3L 7 OF 19
CPU1G

AU14 AN2 MCP_GPIO11

24,65,88 LPC_AD0 LAD0 SMBALERT#/GPIO11
AW12 AP2 SMB_CLK
24,65,88 LPC_AD1 LAD1 SMBCLK SMB_DATA
AY12 LPC AH1

An
24,65,88 LPC_AD2 LAD2 SMBUS SMBDATA MCP_GPIO60
24,65,88 LPC_AD3 AW11 AL2
LAD3 SML0ALERT#/GPIO60 SML0_CLK
24,65,88 LPC_FRAME# AV12 AN1
LFRAME# SML0CLK SML0_DATA
AK1
SML0DATA MCP_GPIO73
AU4 MCP_GPIO73 20
SML1ALERT#/PCHHOT#/GPIO73
AU3 SML1_CLK 24,26,76
SML1CLK/GPIO75
AH3
24,25 PCH_SPI_CLK AA3
SML1DATA/GPIO74 SML1_DATA 24,26,76 EC / Therma/ lEDP/ VGA
B SPI_CLK B
24,25 PCH_SPI_CS0#_C Y7 AF2
SPI_CS1# SPI_CS0# CL_CLK
TP1825 1 Y4 AD2
SPI_CS1# CL_DATA

nie
1 SPI_CS2# AC2 SPI C-LINK AF4
TP1824 SPI_CS2# CL_RST#
24,25 PCH_SPI_SI AA2
SPI_MOSI
24,25 PCH_SPI_SO AA4
SPI_MISO
25 SPI_WP Y6
SPI_IO2
25 SPI_HOLD AF1
SPI_IO3
3D3V_SUS

RN1803
SMB_CLK 4 1
HASWELL-6-GP SMB_DATA 3 2

SRN2K2J-5-GP

CS
71.HASWE.G0U
SML0_DATA R1808 2 1
SML0_CLK R1809 2 2K2R2J-2-GP
1
2K2R2J-2-GP

SML1_CLK R1810 2 1
SML1_DATA R1811 2 2K2R2J-2-GP
1
2K2R2J-2-GP

D
EA40-HW SB
3D3V_SUS
RN1804
SRN10KJ-6-GP
MCP_GPIO60 8 1
MCP_GPIO11 7 2
MCP_GPIO13 6 3
20 MCP_GPIO13
MCP_GPIO8 5 4
20 MCP_GPIO8

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCI-E/SMBUS/CLOCK/CL)
Size Document Number Rev
A2
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 18 of 102

5 4 3 2 1
 5 4 3 2 1

SSID = PCH

D D

co RTC_AUX_S5

nfi
RTC_X1
1 R1928 2
R1901 1 R1927 20KR2F-L3-GP
2
1 10MR2J-L-GP
2 RTC_X2 20KR2F-L3-GP

1
C1903

SC1U6D3V3KX-2GP
INTVRMEN- Integrated SUS
X1901
1.05V VRM Enable

2
X-32D768KHZ-34GPU

de
82.30001.661 High - Enable internal VRs
2nd = 82.30001.B21 Low - Enable external VRs
1 4
CPU1E HSW_ULT_DDR3L 5 OF 19
1

C1901 2 3 C1902 RTC_X1 AW5

RTCX1

nti
C R1904 RTC_X2 AY5 C
2

RTCX2
SC5P50V2CN-2GP

SC5P50V2CN-2GP

2 1M1R2J-GP
1 SM_INTRUDER# AU6 J5
PCH_INTVRMEN INTRUDER# SATA_RN0/PERN6_L3 SATA_RXN0 56
1 R1905 2 330KR2F-L-GP AV7 H5
RTC_AUX_S5
SRTC_RST# AV6
INTVRMEN
SRTCRST#
RTC
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
B15
SATA_RXP0
SATA_TXN0
56
56
HDD
RTC_RST# AU7 A15
RTCRST# SATA_TP0/PETP6_L3 SATA_TXP0 56
EA40-HW 1 SATA_RN1/PERN6_L2
J8
H8
SATA_RP1/PERP6_L2

al,
A17
SATA_TN1/PETN6_L2

1
C1904 G1901 B17
GAP-OPEN RN1902 SATA_TP1/PETP6_L2
SC1U6D3V3KX-2GP
2 1 4 HDA_BITCLK AW8 J6
27 HDA_CODEC_BITCLK HDA_SYNC HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 SATA_RXN2 56
2 3 AV11 H6 3D3V_S0
ODD
1
27 HDA_CODEC_RST# HDA_RST# HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 SATA_RXP2 56
AU8 B14 SATA_TXN2 56
SRN33J-5-GP-U HDA_RST#/I2S_MCLK# AUDIO SATA SATA_TN2/PETN6_L1 RN1901
27 HDA_SDIN0 AY10 C15 SATA_TXP2 56
HDA_SDI1 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1 SRN10KJ-6-GP
TP1901 1 AU12
HDA_SDOUT HDA_SDI1/I2S1_RXD MCP_GPIO34
24 ME_UNLOCK 2 R1908 1 1KR2J-L2-GP AU11 F5 8 1
HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 MCP_GPIO37
AW10 E5 7 2
RTC Reset27 HDA_DOCK_EN#/I2S1_TXD# SATA_RP3/PERP6_L0 SATA_LED#

r
33R2J-L1-GP
2 1 AV10 C17 6 3
HDA_CODEC_SDOUT HDA_DOCK_RST#/I2S1_SFRM# SATA_TN3/PETN6_L0 MCP_GPIO36
R1923 AY8 D17 5 4
I2S1_SCLK SATA_TP3/PETP6_L0

efe
V1 MCP_GPIO34 R1929
SATA0GP/GPIO34 SATA_ODD_PRSNT#
U1 SATA_ODD_PRSNT# 56 1 10KR2J-L-GP
2
SATA1GP/GPIO35 MCP_GPIO36 +V1.05S_ASATA3PLL
V6
SATA2GP/GPIO36 MCP_GPIO37
AC1
51R2J-L1-GP 1 R1938 PCH_TRST# SATA3GP/GPIO37
2 AU62
51R2J-L1-GP 1 R1940 PCH_JTAG_TCK_BUF PCH_TRST#
SA 2 AE62 A12
PCH_JTAG_TDI PCH_TCK SATA_IREF
AD61 L11
PCH_JTAG_TDO PCH_TDI RSVD#L11 R1926
AE61 K10
PCH_JTAG_TMS PCH_TDO RSVD#K10 SATA_RCOMP
24 RTCRST_ON G AD62 JTAG C12 1 3K01R2F-3-GP
2
MCP_TP5 PCH_TMS SATA_RCOMP SATA_LED#
1 AL11 U3

r
B TP1905 SATA_LED# 61 B
RTC_RST# MCP_TP6 RSVD#AL11 SATALED#
D TP1916 1 AC4
TCK_JTAGX RSVD#AC4 R1919
AE63
JTAGX DY
RTC_RST#_S S AV2 MCP_GPIO37 1 10KR2J-L-GP
2
RSVD#AV2
1

by
R1906 Q1902 R1920 DY
R1909 2N7002K-2-GP SATA_ODD_PRSNT# 1 10KR2J-L-GP
2
100KR2F-L3-GP 2KR2F-L1-GP 84.2N702.J31
2ND = 84.2N702.031
HASWELL-6-GP
2

1D05V_VTT
71.HASWE.G0U
PCH_JTAG_TDI 1 R1939 251R2J-L1-GP

PCH_JTAG_TMS 1 251R2J-L1-GP

An
PCH_JTAG_TDO 1 R1936 251R2J-L1-GP

TCK_JTAGX 2 R1903 1 1KR2J-L2-GP HDA_CODEC_BITCLK

HDA_CODEC_RST#

Flash Descriptor Security Overide

nie
EC1905

EC1906
1

1
Low = Default
HDA_SDOUT High = Enable

SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP
2

2
3D3V_AUDIO_SUS
DY SA
R1902 Wistron Confidential document, Anyone can not Duplicate, Modify,
A 2 1KR2J-L2-GP
1 HDA_SDOUT Forward or any other purpose application without get Wistron A
5V_S0 permission
EV
G DY DY
R1910
D HDA_SYNC_R 1 2 HDA_SYNC Wistron Corporation
33R2J-L1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

CS
S Taipei Hsien 221, Taiwan, R.O.C.
27 HDA_CODEC_SYNC
Q1903 Title
2N7002K-2-GP
84.2N702.J31 CPU (RTC/LPC/SATA/HDA)
2ND = 84.2N702.031 Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 19 of 102
5 4 3 2 1

D
 5 4 3 2 1

SSID = PCH

3D3V_SUS

RN2004
D 1 4 MCP_GPIO45 D

co
2 3 MCP_GPIO73
MCP_GPIO73 18
SRN10KJ-L-GP

R2011
RN2005 OPI_COMP2 1 49D9R2F-GP
2

nfi
SRN10KJ-6-GP
1 8 EC_SMI#
2 7 EC_SCI#
3 6 MCP_GPIO14
4 5 MCP_GPIO26

de
HSW_ULT_DDR3L 10 OF 19
CPU1J
DY R2058 3D3V_S0
1 10KR2J-L-GP
2 MCP_GPIO24 RN2006
SRN10KJ-6-GP
R2001 DY R2039 MCP_GPIO2 8 1
2 1KR2J-L2-GP
1 MCP_GPIO15 MCP_GPIO76 P1 D60 PCH_THERMTRIP_R 2 0R2J-L-GP
1 MCP_GPIO90 7 2

nti
BMBUSY#/GPIO76 THRMTRIP# H_THERMTRIP# 36
MCP_GPIO8 AU2 V4 MCP_GPIO89 6 3
18 MCP_GPIO8 GPIO8 RCIN#/GPIO82 H_RCIN# 24
MCP_GPIO12 AM7 T4 MCP_GPIO88 5 4
LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ INT_SERIRQ 24,88
MCP_GPIO15 AD6 AW15 OPI_COMP2
AMIC_DMIC# GPIO15 MISC PCH_OPI_RCOMP
Y1 GPIO16 RSVD#AF20 AF20
3D3V_S5 T3 AB21
56 SATA_ODD_DA# GPIO17 RSVD#AB21
RN2010 MCP_GPIO24 RN2007

al,
AD5 GPIO24
SRN10KJ-6-GP MCP_GPIO27 AN5 SRN10KJ-6-GP
MCP_GPIO27 GPIO27 MCP_GPIO83
1 8 AD7 GPIO28 8 1
2 7 MCP_GPIO25 MCP_GPIO26 AN3 MCP_GPIO84 7 2
GPIO26 MCP_GPIO83 H_RCIN#
3 6 GSPI0_CS#/GPIO83 R6 6 3
C 4 5 MCP_GPIO12 AG6 L6 MCP_GPIO84 INT_SERIRQ 5 4 C
GPIO56 GSPI0_CLK/GPIO84
AP1 GPIO57 GSPI0_MISO/GPIO85 N6 SATA_ODD_PW RGT 56
AL4 L8 MCP_GPIO86

r
GPIO58 GSPI0_MOSI/GPIO86
AT5 GPIO59 GSPI1_CS#/GPIO87 R7
3D3V_S0 AK4 GPIO L5 MCP_GPIO88

efe
EC_SMI# GPIO44 GSPI1_CLK/GPIO88 MCP_GPIO89
24 EC_SMI# AB6 GPIO47 GSPI1_MISO/GPIO89 N7
EA40-HW SB DGPU_PRSNT# U4 K2 MCP_GPIO90
R2030 UMA_DIS# GPIO48 GSPI_MOSI/GPIO90 MCP_GPIO91
Y3 GPIO49 UART0_RXD/GPIO91 J1
1 4K7R2J-L-GP
2 MCP_GPIO76
24,52 TOUCH_EN 2 R2043 1 TOUCH_EN_R P3 GPIO50 UART0_TXD/GPIO92 K3 MCP_GPIO92
Y2 J2 VRAM_SIZE1
21 HSIOPC HSIOPC/GPIO71 SERIAL IO UART0_RTS#/GPIO93
RN2001 MCP_GPIO13 AT3 G1 VRAM_SIZE2
18 MCP_GPIO13 33R2J-L1-GP GPIO13 UART0_CTS#/GPIO94
1 4 AMIC_DMIC# MCP_GPIO14 AH4 K4
GPIO14 UART1_RXD/GPIO0

r
2 3 TOUCH_EN_R DY MCP_GPIO25 AM4 G2
MCP_GPIO45 GPIO25 UART1_TXD/GPIO1 MCP_GPIO2
AG5 GPIO45 UART1_RST#/GPIO2 J3
SRN10KJ-L-GP MCP_GPIO46 AG3 J4
R2059 GPIO46 UART1_CTS#/GPIO3 I2C0_SDA
F2

by
I2C0_SDA/GPIO4
1 10KR2J-L-GP
2 LAN_DIS#
24 MCP_GPIO9
MCP_GPIO9 AM3 GPIO9 I2C0_SCL/GPIO5 F3 I2C0_SCL
AM2 G4 I2C1_SDA 3D3V_S0
24 EC_SCI# GPIO10 I2C1_SDA/GPIO6
R2060 P2 F1 I2C1_SCL
56 HDD_DSLP DEVSLP0/GPIO33 I2C1_SCL/GPIO7
1 10KR2J-L-GP
2 TOUCH_DET# MCP_GPIO70 C4 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 E3
LAN_DIS# L2 F4 EA40-HW SB
3D3V_S0 DEVSLP1/GPIO38 SDIO_CMD/GPIO65
N5 D3 RN2009
DEVSLP2/GPIO39 SDIO_D0/GPIO66 TOUCH_DET#_R
27 HDA_SPKR V2 E4 2 R2042 1 TOUCH_DET# 52 MCP_GPIO91 1 4

An
SPKR/GPIO81 SDIO_D1/GPIO67 MCP_GPIO92
SDIO_D2/GPIO68 C3 2 3
SDIO_D3/GPIO69 E2 33R2J-L1-GP
SRN10KJ-L-GP

R2038 DY HASW ELL-6-GP EA40-HW SB SRN2K2J-4-GP

2 1KR2J-L2-GP
1 HDA_SPKR RN2008
B 3D3V_S0 I2C0_SCL B
8 1

nie
71.HASWE.G0U I2C0_SDA 7 2
No Reboot Strap 3D3V_SUS R2031 I2C1_SDA
DY 6 3
R2004 MCP_GPIO86 1 10KR2J-L-GP
2 I2C1_SCL 5 4
Low = Default 2 1KR2J-L2-GP
1 MCP_GPIO46 3D3V_S0
HDA_SPKR High = No Reboot R2040
2 1KR2J-L2-GP
1
R2007 DY

1
2 1KR2J-L2-GP
1
R2003 R2005

CS
3D3V_SUS 10KR2J-L-GP 10KR2J-L-GP
GSPI0_MOSI_BBS0_R(SSD_PWR)
R2002 DY 2G 1G
2 1KR2J-L2-GP
1 MCP_GPIO9 PU RESERVED

2
PD SPI BUS
R2006 DY VRAM_SIZE1
2 1KR2J-L2-GP
1 VRAM_SIZE2

D
1

1
3D3V_S0
R2009 R2008
10KR2J-L-GP 10KR2J-L-GP
1

1G_512M 512M_2G
R2017

2
3D3V_S0 3D3V_S0 UMA_DISCRETE# 100KR2J-4-GP
UMA: 1 1 Wistron Confidential document, Anyone can not
2

DIS :0 1
1

MCP_GPIO70 HSIOPC Duplicate, Modify, Forward or any other purpose

R2012 R2013 SG(PX) : 0 0 application without get Wistron permission
EV
1

10KR2J-L-GP 10KR2J-L-GP Optimus(Muxless) : 1 0

A A
UMA R2015 R2016
10KR2J-L-GP 10KR2J-L-GP
Wistron Corporation
2

UMA_DIS#
DGPU_PRSNT# DY 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.

1

R2010 R2014 Title

10KR2J-L-GP 10KR2J-L-GP
DY Muxless CPU (GPIO/MISC)
Size Document Number Rev
2

A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 20 of 102

5 4 3 2 1
 5 4 3 2 1

C2108
SC1U6D3V2KX-L-1-GP
+V3.3A_DSUS 1 2

D D

co 1D05V_VTT K9
CPU1M HSW_ULT_DDR3L 13 OF 19
1 R2109
3D3V_SUS

20R3J-L1-GP Intel Recommend

nfi
1D05V_HSIO VCCHSIO
L10 VCCHSIO
M9 VCCHSIO
N8 HSIO RTC AH11 +V3.3A_DSUS
VCC1_05 VCCSUS3_3
P9 VCC1_05 VCCRTC AG10 RTC_AUX_S5
+V1.05S_AUSB3PLL B18 AE7 +DCPRTC C2109 1 2 SCD1U10V2KX-L1-GP
VCCUSB3PLL DCPRTC

1
C2101

de
+V1.05S_ASATA3PLL B11 VCCSATA3PLL
SC1U6D3V2KX-L-1-GP
3D3V_SUS 3D3V_AUDIO_SUS
2 TP2101 1 VCCAPLL_Y20 Y20
RSVD#Y20
SPI
VCCSPI Y8 +VCCSPI 1 R2103 20R3J-L1-GP 3D3V_S5
1D05V_VTT AA21 VCCAPLL
OPI
1 R2116 20R3J-L1-GP W21 VCCAPLL
AG14 C2110 1 2 SCD1U10V2KX-L1-GP

nti
VCCASW
VCCASW AG13 1D05V_VTT
3D3V_AUDIO_SUS 1 DCPSUS3 J13 USB3
3D3V_S0 TP2108 DCPSUS3
VCC1_05 J11 1D05V_VTT
VCC1_05 H11
HDA

al,
AH14 VCCHDA VCC1_05 H15
1 R2117 20R3J-L1-GP VCC1_05 AE8 C2111
AF22 R2120 SC1U6D3V2KX-L-1-GP
DCPSUS2 VRM VCC1_05 DCPSUSYP
DY TP2109 1 AH13 DCPSUS2 DCPSUSBYP#AG19 AG19 1 5D1R2F-GP
2 DCPSUSYP_R 1 2
CORE AG20 C2117
DCPSUSBYP#AG20
1

C C2103 AE9 1 2 3D3V_S5

C
SC1U6D3V2KX-L-1-GP VCCASW SCD47U16V2ZY-GP
VCCASW AF9
AC9 AG8

r
3D3V_SUS 1D05V_VTT
2

VCCSUS3_3 VCCASW
AA9 VCCSUS3_3
GPIO/LPC
DCPSUS1#AD10 AD10
AH10 AD8 DCPSUS1 1 1D5V_S0

efe
3D3V_S5 VCCDSW3_3 DCPSUS1#AD8 TP2107
3D3V_S0 V8 VCC3_3
W9 VCC3_3
VCCTS1_5 J15
THERMAL SENSOR K14
VCC3_3 3D3V_S0
VCC3_3 K16

1
+V3.3S_1.8S_SDIO C2116 C2105

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP
1D05V_VTT

r
+V1.05S_AXCK_DCB J18

2
VCCCLK SERIAL IO
K19 VCCCLK VCCSDIO U8
+V1.05S_AXCK_LCPLL A20 VCCACLKPLL VCCSDIO T9
J17 R2104

by
VCCCLK
R21 VCCCLK 1 0R2J-L-GP
2 3D3V_S0
T21 LPT LP POWER
VCCCLK_K18 VCCCLK SUS OSCILLATOR DCPSUS4 C2113
TP2102 1 K18 RSVD#K18 DCPSUS4 AB8 1 TP2106
1 VCCCLK_M20 M20 SC1U6D3V2KX-L-1-GP
TP2103 RSVD#M20 1D05V_VTT
1 VCCCLK_V21 V21 1 2
TP2104 RSVD#V21
AE20 AC20 VCCAPLL_AC20 1
VCCSUS3_3 RSVD#AC20 TP2105
3D3V_SUS AE21 AG16

An
VCCSUS3_3 VCC1_05
1

C2104 C2107 USB2 AG17

VCC1_05
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP
2

1
C2102

SC1U6D3V2KX-L-1-GP
HASW ELL-6-GP

2
B B

nie
71.HASWE.G0U

1D05V_VTT 1D05V_HSIO

CS
R2108
1 0R5J-5-GP
2
Non-HSIO

1D05V_HSIO
HSIO

D
1D05V_VTT U2101

9 R2107
GND HSIO_OUT
1 VIN#1 VOUT#8 8 1 0R5J-5-GP
2
2 VIN#2 VOUT#7 7
3 6 1D05V_HSIO_CT HSIO EA40-HW SB
20 HSIOPC ON CT
5V_S0 4 VBIAS GND 5
1

1
C2115 C2114 Wistron Confidential document, Anyone can not

SC10U6D3V3MX-L-GP
TPS22965DSGR-GP C2112 Duplicate, Modify, Forward or any other purpose
1

application without get Wistron permission

SC4D7U6D3V3KX-L-GP

HSIO 74.22965.093 SC1KP50V2KX-L-1-GP DY EV

2

2
A HSIO A
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (POWER1)
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 21 of 102

5 4 3 2 1
 5 4 3 2 1

co
D D

HSW_ULT_DDR3L 17 OF 19
CPU1Q

nfi
DC_AY2_AW2
DC_AY3_AW3
AY2
AY3
DAISY_CHAIN_NCTF_AY2
DAISY_CHAIN_NCTF_AY3
DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4
A3
A4
DC_A3_B3
DC_A4 1 TP2219

de
1 DC_AY60 AY60
TP2212 DAISY_CHAIN_NCTF_AY60
DC_AY61_AW61 AY61 A60 DC_A60 1
DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 TP2218
DC_AY62_AW62 AY62 A61 DC_A61_B61
DC_B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 DC_A62
TP2213 1 B2 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 A62 1 TP2217
DC_A3_B3 B3 AV1 DC_AV1 1

nti
DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 TP2215
DC_A61_B61 B61 AW1 DC_AW1 1
DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 TP2216
DC_B62_B63 B62 AW2 DC_AY2_AW2
DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 DC_AY3_AW3
B63 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW3
DC_C1_C2 C1 AW61 DC_AY61_AW61
DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61

al,
C2 AW62 DC_AY62_AW62
DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 DC_AW63
DAISY_CHAIN_NCTF_AW63 AW63 1 TP2214
HASWELL-6-GP
C C

r
71.HASWE.G0U

CPU1R efe
HSW_ULT_DDR3L 18 OF 19

AT2
AU44
AV44
D15
RSVD#AT2
RSVD#AU44
RSVD#AV44
r by
RSVD#N23
RSVD#R23
RSVD#T23
RSVD#U10
N23
R23
T23
U10

An
RSVD#D15 AL1
RSVD#AL1
RSVD#AM11 AM11
RSVD#AP7 AP7
F22 RSVD#F22
RSVD#AU10 AU10
H22 RSVD#H22
RSVD#AU15 AU15
B J21 B

nie
RSVD#J21 AW14
RSVD#AW14
RSVD#AY14 AY14

HASWELL-6-GP

71.HASWE.G0U

CS
EV D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (RSVD)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 22 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PCH

D D

co
HSW_ULT_DDR3L 14 OF 19 HSW_ULT_DDR3L 15 OF 19
CPU1N CPU1O

A11 VSS VSS AJ35 AP22 VSS VSS AV59

A14 VSS VSS AJ39 AP23 VSS VSS AV8
A18 AJ41 AP26 AW16

nfi
VSS VSS VSS VSS
A24 VSS VSS AJ43 AP29 VSS VSS AW24
A28 VSS VSS AJ45 AP3 VSS VSS AW33
A32 VSS VSS AJ47 AP31 VSS VSS AW35
A36 VSS VSS AJ50 AP38 VSS VSS AW37

de
A40 VSS VSS AJ52 AP39 VSS VSS AW4
A44 VSS VSS AJ54 AP48 VSS VSS AW40
A48 VSS VSS AJ56 AP52 VSS VSS AW42
A52 VSS VSS AJ58 AP54 VSS VSS AW44
A56 VSS VSS AJ60 AP57 VSS VSS AW47
AA1 AJ63 AR11 AW50

nti
VSS VSS VSS VSS
AA58 VSS VSS AK23 AR15 VSS VSS AW51
AB10 VSS VSS AK3 AR17 VSS VSS AW59
AB20 VSS VSS AK52 AR23 VSS VSS AW60
AB22 VSS VSS AL10 AR31 VSS VSS AY11
AB7 AL13 AR33 AY16

al,
VSS VSS VSS VSS
AC61 VSS VSS AL17 AR39 VSS VSS AY18
AD21 VSS VSS AL20 AR43 VSS VSS AY22
AD3 VSS VSS AL22 AR49 VSS VSS AY24
C AD63 AL23 AR5 AY26 C
VSS VSS VSS VSS
AE10 VSS VSS AL26 AR52 VSS VSS AY30
AE5 AL29 AT13 AY33

r
VSS VSS VSS VSS
AE58 VSS VSS AL31 AT35 VSS VSS AY4

efe
AF11 VSS VSS AL33 AT37 VSS VSS AY51
AF12 VSS VSS AL36 AT40 VSS VSS AY53
AF14 VSS VSS AL39 AT42 VSS VSS AY57
AF15 VSS VSS AL40 AT43 VSS VSS AY59
AF17 VSS VSS AL45 AT46 VSS VSS AY6
AF18 VSS VSS AL46 AT49 VSS VSS B20
AG1 VSS VSS AL51 AT61 VSS VSS B24

r
AG11 VSS VSS AL52 AT62 VSS VSS B26
AG21 VSS VSS AL54 AT63 VSS VSS B28
AG23 AL57 AU1 B32

by
VSS VSS VSS VSS
AG60 VSS VSS AL60 AU16 VSS VSS B36
AG61 VSS VSS AL61 AU18 VSS VSS B4
AG62 VSS VSS AM1 AU20 VSS VSS B40
AG63 VSS VSS AM17 AU22 VSS VSS B44
AH17 VSS VSS AM23 AU24 VSS VSS B48
AH19 VSS VSS AM31 AU26 VSS VSS B52

An
AH20 VSS VSS AM52 AU28 VSS VSS B56
AH22 VSS VSS AN17 AU30 VSS VSS B60
AH24 VSS VSS AN23 AU33 VSS VSS C11
AH28 VSS VSS AN31 AU51 VSS VSS C14
B AH30 VSS VSS AN32 AU53 VSS VSS C18 B
AH32 AN35 AU55 C20

nie
VSS VSS VSS VSS
AH34 VSS VSS AN36 AU57 VSS VSS C25
AH36 VSS VSS AN39 AU59 VSS VSS C27
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH40 VSS VSS AN42 AV16 VSS VSS C39
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14

CS
AH51 VSS VSS AN48 AV33 VSS VSS D18
AH53 VSS VSS AN49 AV34 VSS VSS D2
AH55 VSS VSS AN51 AV36 VSS VSS D21
AH57 VSS VSS AN52 AV39 VSS VSS D23
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ14 VSS VSS AN63 AV43 VSS VSS D26
AJ23 VSS VSS AN7 AV46 VSS VSS D27

D
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
AJ29 AP20 AV55 D31 Wistron Confidential document, Anyone can not
VSS VSS VSS VSS Duplicate, Modify, Forward or any other purpose
HASWELL-6-GP application without get Wistron permission
EV

HASWELL-6-GP 71.HASWE.G0U
A Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
71.HASWE.G0U Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 23 of 102

5 4 3 2 1
 5 4 3 2 1
SSID = KBC 3D3V_AUX_S5

R2464 EC_VSTBY 1 R2473 20R3J-L1-GP

86 EC_VSTBY
EC_VSTBY 2 0R2J-L-GP
1 KBC_VSTBY_127

1
C2424 C2425 C2426 C2427 C2428 C2429 AVCC

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP
C2419

SCD1U10V2KX-L1-GP
1 R2471 20R3J-L1-GP

2
2
INT_SERIRQ 20,88
LPC_FRAME# 18,65,88
3D3V_S0 CLK_PCI_KBC 18
3D3V_AUX_S5 RTC_AUX_S5
H_RCIN# 20 EA40-HW SC
EC_FB_CLAMP_TGL_REQ#
EC_FB_CLAMP_TGL_REQ# 76
R2427
S5_ENABLE 36,86

2
1 4K7R2J-L-GP
2 BAT_SCL
PCIE_WAKE# 17,30,58

2
R2472

D R2428
1 4K7R2J-L-GP
2 BAT_SDA
0R3J-L1-GP R2450
0R2J-L-GP
LID_CLOSE# 64
PLT_RST# 17,30,36,58,65,73,86,88 D

co
PM_SLP_S0# 17
ECSCI#_KBC

1
R2442 3D3V_AUX_S5 R2465

1
1 100KR2J-4-GP
2 BAT_IN#
C2422 DY ECSCI#_KBC 2 0R2J-L-GP
1 EC_SCI# 20
R2451
R2418 1 2 2 0R2J-L-GP
1

2
1 100KR2J-4-GP
2 ECRST# C2423

SCD1U10V2KX-L1-GP
R2466
SCD1U25V3KX-L-GP LPC_AD0 18,65,88

H_A20GATE
KBC_VSTBY_127
LPC_AD1 18,65,88 2 0R2J-L-GP
1 EC_SMI# 20

1
nfi

ECRST#
LPC_AD2 18,65,88
KBC_VBAT
LPC_AD3 18,65,88

EC_AVCC
3D3V_S0
EA40-HW SB
EC_VCC

R2417
2 10KR2F-L1-GP
1 FAN_TACH1

114
121
127

126
11

26
50
92

74

13
14

16
19
20
17
22
15
23

10
3

5
6

9
8
7
R2420 U2401
1 8K2R2J-3-GP
2 H_A20GATE

de

VBAT
VCC

AVCC
VSTBY_PLL

SERIRQ/GPM6
LFRAME#/GPM5
LPCCLK/GPM4
WRST#
GA20/GPB5
KBRST#/GPB6
PWUREQ#/BBO/SMCLK2ALT/GPC7
L80HLAT/BAO/GPE0
L80LLAT/GPE7
LPCPD#/GPE6
LPCRST#/GPD2
ECSMI#/GPD4
ECSCI#/GPD3

LAD0/GPM0
LAD1/GPM1
LAD2/GPM2
LAD3/GPM3
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
3D3V_AUX_S5
24 66 PCB_VER_AD
61 PWRLED PWM0/GPA0 ADC0/GPI0
R2446 25 67 ECRST#
61 CHARGE_LED PWM1/GPA1 ADC1/GPI1 AD_IA 44
1 100KR2J-4-GP
2 61 STDBY_LED 28 68 ADT_TYPE_AD
PWM2/GPA2 ADC2/GPI2 MODEL_ID_AD
R2445
61 DC_BATFULL 29
PWM3/GPA3 ADC3/GPI3
69 DS3
26,86 FAN1_PWM 30 PWM4/GPA4 ADC4/GPI4 70 LAN_PCIE_WAKE# 30

nti
1 100KR2J-4-GP
2 S5_ENABLE
62 KB_BL_PWM 31 71 WLAN_PCIE_WAKE# 58
Q2401
PWM5/GPA5 ADC5/DCD1#/GPI5

1
19 ME_UNLOCK 32 72 PM_SUSWARN#_R 2 R2411 1 0R2J-L-GP PM_SUSWARN# 17
MMBT3906-4-GP C2415

E
PWM6/SSCK/GPA6 ADC6/DSR1#/GPI6

SC1U6D3V2KX-L-1-GP
DY 27 KBC_BEEP 34 73 PM_SLP_SUS#_R 2 R2410 1 0R2J-L-GP PM_SLP_SUS# 17,38 84.T3906.A11
PWM7/RIG1#/GPA7 ADC7/CTS1#/GPI7 R2419 1 ECRST#_Q
EA40-HW SB DS3 2 B 2nd = 84.03906.F11

2
47 R2421 2 1 10KR2F-L1-GP 3D3V_AUX_S5
26 FAN_TACH1 TACH0A/GPD6 26,36 PURE_HW_SHUTDOWN#
EA40-HW SC 20,52 TOUCH_EN 2 R24591 TOUCH_EN_KBC 48 76 AC_PRESENT 17
10KR2F-L1-GP

C
3D3V_AUX_S5 TACH1A/TMA1/GPD7 TACH2/GPJ0
Touch 33R2J-L1-GP GPJ1
77 BLUETOOTH_EN 58
44,86 AC_IN# 120 78 WLAN_PWR_EN# 58
R2455 TMRI0/GPC4 DAC2/TACH0B/GPJ2 5V_CHARGER_EN
43 BAT_IN# 124 TMRI1/GPC6 DAC3/TACH1B/GPJ3 79

al,
1 100KR2J-4-GP
2 USB_CHARGER_EN 80 KBC_DPWROK 17,86
DAC4/DCD0#/GPJ4
81 AMP_MUTE# 27
KCOL0 DAC5/RIG0#/GPJ5
36
KCOL1 KSO0/PD0
37
3D3V_AUX_S5 KCOL2 KSO1/PD1
38 KSO2/PD2 SMCLK0/GPB3 110 BAT_SCL 43,44 <------ BATTERY / CHARGER
KCOL3 39 111
KSO3/PD3 SMDAT0/GPB4 BAT_SDA 43,44
C R2454
1 100KR2J-4-GP
2 5V_CHARGER_EN
62,86 KCOL[0..17] KCOL4
KCOL5
KCOL6
40
41
42
KSO4/PD4
KSO5/PD5
SMCLK1/GPC1
SMDAT1/GPC2
115
116
117
SML1_CLK_EC
SML1_DATA_EC
H_PECI_KBC
2 R2448
2 R2449
1 R2429
1 0R2J-L-GP
1 0R2J-L-GP
2 43R2J-GP
SML1_CLK 18,26,76
SML1_DATA 18,26,76 <------ Thermal/eDP/GPU
SML1_CLK_EC
SML1_DATA_EC C
KSO6/PD6 SMCLK2/PECI/GPF6 H_PECI 4
KCOL7 43 118
KSO7/PD7 SMDAT2/PECIRQT#/GPF7 BLON_OUT 52

1
KCOL8 44 3D3V_AUX_S5
KSO8/ACK# D2401
KCOL9 45

r
KCOL10 KSO9/BUSY AZ2025-02S-R7G-GP
46 85 AP_DET# 58
KCOL11 KSO10/PE PS2CLK0/TMB0/CEC/GPF0 R2453
51 KSO11/ERR# PS2DAT0/TMB1/GPF1 86 USB_PWR_EN# 34,63 75.02025.07D
KCOL12 CHG_ON# 2100KR2J-4-GP

efe
52 87 1
KCOL13 KSO12/SLCT PS2CLK1/DTR0#/GPF2 L_BKLT_EN 15 2ND = 75.02025.07D
53 88 WIFI_RF_EN 58
KCOL14 KSO13 PS2DAT1/RTS0#/GPF3
54 89 TPCLK 62
KCOL15 KSO14 PS2CLK2/GPF4
55 90 TPDATA 62

3
KCOL16 KSO15 PS2DAT2/GPF5
56
KCOL17 KSO16/SMOSI/GPC3
57

RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7
KSO17/SMISO/GPC5 swap D2401 1/29
93 PM_CLKRUN#_EC 17,88
CLKRUN#/GPH0/ID0
94 ALL_SYS_PWRGD_C 2 R2409 1 0R2J-L-GP ALL_SYS_PWRGD 36,86
KROW0 CRX1/SIN1/SMCLK3/GPH1/ID1
58 KSI0/STB# CTX1/SOUT1/SMDAT3/GPH2/ID2 95 RTCRST_ON 19 EA40-HW SB
KROW1 59 96
KSI1/AFD# GPH3/ID3 KB_BL_DET 62
62,86 KROW[0..7] KROW2 60 97
KSI2/INIT# GPH4/ID4 WLAN_PERST# 58
KROW3 61 98 EC_FB_CLAMP R2452
KSI3/SLIN# GPH5/ID5 EC_FB_CLAMP 75,76,83 EA40-HW SC 2 1KR2J-L2-GP

r
KROW4 62 99 AD_OFF 1
AVCC KSI4 GPH6/ID6 DGPUHOT 76
KROW5 63
KROW6 KSI5
64 DS3

DTR1#/SBUSY/GPG1/ID7
R2435 KSI6
KROW7 65 123 PM_SUSACK#_R 1 R2434 2 0R2J-L-GP PM_SUSACK# 17
KSI7 CTX0/TMA0/GPB2
EC_VSTBY 1 33R2J-L1-GP

SSCE1#/VCEN/GPG0
2 119 PM_SLP_A# 17
CRX0/GPC0
GINT/CTS0#/GPD5

by
15,82,83,86 DGPU_PWROK 128 108 E51_RxD 58
CK32K/GPJ6 RXD/SIN0/GPB0
1

PWRSW/GPE4
SSCE0#/GPG2
C2421 2 109

EGCS#/GPE2
EGCLK/GPE3
44 CHG_ON# E51_TxD 58

FSCE#/GPG3

DSR0#/GPG6
FMOSI/GPG4
FMISO/GPG5
CK32KE/GPJ7 TXD/SOUT0/GPB1

RTS1#/GPE5
SCD1U10V2KX-L1-GP

EGAD/GPE1
C2430

FSCK/GPG7
RI1#/GPD0
RI2#/GPD1

EA40-HW SB
SC1KP50V2KX-L-1-GP
2

R2463

VCORE
R2431

AVSS
2 0R2J-L-GP
1

VSS
VSS
VSS
VSS
VSS
VSS
UMA:10K ; Muxless:20K
IT8587E-BX-GP
18
21

33
107
112

101
102
103
105

100
106
104

82
83
84
125
35

75

12

1
27
49
91
113
122
EC_AGND 3D3V_AUX_S5
1ST = 71.08587.F0G

An
EC_SPI_CS#1

KBC_VCORE
EC_SPI_CLK

1
EC_SPI_SO
EC_SPI_SI

PM_PWRBTN#_R
R2431
10KR2F-L1-GP
Model_ID
C2401

2
B SCD1U10V2KX-L1-GP
1 2 KBC_VCORE MODEL_ID_AD B
R2413 EC_AGND

nie

1
1 1MR2J-L3-GP
2 EC_SPI_SI R2436

100KR2F-L3-GP
R2414 R2460
1 1MR2J-L3-GP
2 EC_SPI_SO 2 0R2J-L-GP
1
17,27 PM_SLP_S3# PM_PWRBTN# 17,86

2
17,49 PM_SLP_S4#
R2415 DY KBC_PWRBTN#_R
1 1MR2J-L3-GP
2 EC_SPI_CS#1 EC_AGND
17 S0_PWR_GOOD
DC_Protect_EC 44
61 WLAN_TEST_LED
R2416 DY HDD_PWR_EN 56
1 1MR2J-L3-GP
2 EC_SPI_CLK
17 RSMRST#_KBC 3D3V_AUX_S5

CS
Charger_Boost_Status#

18,25 PCH_SPI_CS0#_C 2 R2412 1 0R2J-L-GP AD_OFF 42

1
2 R2402 1 0R2J-L-GP R2424
18,25 PCH_SPI_SI 1 64K9R2F-1-GP
18,25 PCH_SPI_SO 2 R2403 1 0R2J-L-GP R2447 PCB_VER_ID
Charger_Boost_Status# 2 0R2J-L-GP
1 PWR_CHG_BM# 44

2
18,25 PCH_SPI_CLK 2 R2407 1 0R2J-L-GP
PCB_VER_AD
USB_CHARGER_EN

1
D
PROCHOT_EC R2426
86 PROCHOT_EC

1
3D3V_AUX_S5 C2417

SCD1U10V2KX-L1-GP
R2406

100KR2F-L3-GP
PM_SLP_S3# 2 0R2J-L-GP
1 EC_PM_SLP_S3# 27,36,37,48,51 DY

2
2

R2401
330KR2J-L-GP
GPIO0 High Active
1

R2404 Q2402 EC_AGND

2 470R2J-2-GP
1 KBC_PWRBTN#_R PROCHOT_EC G 3D3V_AUX_S5
27,61,86 KBC_PWRBTN#
D H_PROCHOT# 4,44,46,86
1

G2401 R2432 S
A GAP-OPEN 100KR2J-4-GP
2N7002K-2-GP
R2425
10KR2F-L1-GP A
84.2N702.J31 65W
2

2ND = 84.2N702.031
2

Wistron Confidential document, Anyone can not

ADT_TYPE_AD Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV
1

R2430
100KR2F-L3-GP
90W Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2

Title

EC_AGND KBC_ITE8587
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 24 of 102

5 4 3 2 1
 5 4 3 2 1

SSID = Flash.ROM SPI FLASH ROM (8M byte) for PCH

SPI ROM Equal length need to less than 500mil

D D

co
3D3V_S5
check power plane!!??

nfi
1

1
R2502 R2503 R2504
3K3R2F-2-GP 3K3R2F-2-GP 3K3R2F-2-GP

2
EA40-HW SC

de
3D3V_S5
U2501

1 R2505 2 20R2J-3-GP SPI_CS0# 1 8

18,24 PCH_SPI_CS0#_C CS# VCC
1 R2501 2 33R2J-L1-GP SPI_SO_0 2 7 SPI0_HOLD_0 1 R2508 2 33R2J-L1-GP
18,24 PCH_SPI_SO SO/SIO1 SIO3 SPI_HOLD 18
1 R2509 2 33R2J-L1-GP SPI0_WP_0 3 6 SPI_CLK_0 1 R2510 2 33R2J-L1-GP
18 SPI_WP SIO2 SCLK PCH_SPI_CLK 18,24
4 5 SPI_SI_R_0 1 R2513 2 33R2J-L1-GP PCH_SPI_SI 18,24

nti
GND SI/SIO0

EA40-HW SB 3D3V_S5 MX25L6473EM21-10G-GP

2nd = 72.25Q64.K01
1

C2502 C2501
3rd = 72.25Q64.C01
SC10U6D3V3MX-L-GP

al,
SCD1U10V2KX-L1-GP
2

DY 72.25647.00A

C C

SSID = RBAT
r efe
r
+RTC_VCC
RTC1
RTC_AUX_S5 Q2501 R2517

by
1 RTC_PWR 1 1KR2J-L2-GP
2 1
PWR
2
GND
3 Width=20mils NP1
NP1
NP2
NP2
2
2

C2505 CH715FPT-GP BAT-060003HA002M213ZL-GP-U1

83.R0304.B81
SC1U6D3V3KX-2GP

2nd = 83.00040.E81 62.70014.001

DY

An
3D3V_AUX_S5
2nd = 62.70001.061

3rd = 20.F2316.002

B B

nie
CS
A
D A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Flash(KBC+PCH)/RTC
Size Document Number Rev
A2
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 25 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = Thermal 3D3V_S0

Thermal sensor NCT 7718W *Layout* 15 mil

2
1
84.2N702.A3F 5V_S0
RN2601 2nd = 75.00601.07C
SRN2K2J-5-GP 3rd = 84.2N702.F3F

1
D
3D3V_S0 2N7002KDW -GP C2603 D

3
4
co

1
D2601 C2602

SC4D7U10V3KX-GP
NCT_CLK 1 6 CH551H-30PT-GP SCD1U10V2KX-L1-GP
SML1_CLK 18,24,76

2
83.R5003.C8F

2
2
2 5 2ND = 83.R5003.H8H

1
R2601 3rd = 83.5R003.08F
10R2F-L-GP 3 4

nfi Q2602

1
20120809 NCT_DATA
Layout notice :
Both DXN and DXP routing 10 mil SML1_DATA 18,24,76

de
trace width and 10 mil spacing.

1
C2601 DY
SCD1U10V2KX-L1-GP R2602
Q2601 1 0R2J-L-GP
2

6
PMBS3904-1-GP
84.03904.L06 R2603
2nd = 84.03904.E11 1 0R2J-L-GP
2 4

nti
24,86 FAN1_PW M
P2800_DXP DY 3
U2601 86 FAN_TACH1_C FAN_TACH1_C 2
1

1
3

R2604 C2604 C2605 THERM_VDD 1 8 NCT_CLK 5V_S0 1

VDD SCL
SC2K2P50V2KX-L-GP

NTC-100K-8-GP 1 SC470P50V3JN-2GP 2 7 NCT_DATA ETY-CON4-33-GP

2

D+ SDA ALERT# FAN1

al,
DY 3 D- ALERT# 6
THERM_SYS_SHDN# 4 5
2

5
P2800_DXN T_CRIT# GND
FAN_TACH1_C
20.F1579.004
24 FAN_TACH1 1 2
2.System Sensor, Put on palm rest NCT7718W -GP 2nd = 20.F1637.004
C 74.07718.0B9 C
D2602
CH551H-30PT-GP EA40-HW SB

r
83.R5003.C8F
1.H/W T8 Shutdown 2ND = 83.R5003.H8H

efe
3rd = 83.5R003.08F

r 3D3V_S0

by 3D3V_S0

An
1
R2605
R5 18K7R2F-GP

1
R2606
R7

2
2KR2F-L1-GP
B ALERT# B

nie

2
Q2603
S THERM_SYS_SHDN#

24,36 PURE_HW _SHUTDOW N# D DY

R2607
G IMVP_PW RGD_G 1 0R2J-L-GP
2 3D3V_S0

1
R2608 C2606 2N7002K-2-GP

CS
SCD1U10V2KX-L1-GP
10KR2J-L-GP 84.2N702.J31
DY DY 2ND = 84.2N702.031 R2609

2
3rd = 84.2N702.W31 1 0R2J-L-GP
2 IMVP_PW RGD 7,17,36,46,86

T8=85 degree
D EV
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal 7718/Fan Controllor P2793

Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 26 of 102

5 4 3 2 1
 5 4 3 2 1

5V_S0 5VA_S0

HDA_CODEC_BITCLK EC2701 1 2 1 2 R2703

SCD1U10V2KX-L1-GP R2702 1 0R5J-5-GP
2
AUDIO_DVDD AUD_3VD_R 0R3J-L1-GP
DY G2701 U2702

1
C2702 1 2 C2707

1
SC22P50V2JN-4GP

SC1U10V3KX-L1-GP
C2703 C2704 C2705 C2706
24,36,37,48,51 EC_PM_SLP_S3# 1 EN DY NC#5 5

SC10U6D3V3MX-L-GP

SCD1U10V2KX-L1-GP

SC10U6D3V3MX-L-GP

SCD1U10V2KX-L1-GP
GAP-CLOSE 2

2
GND
5V_S0 3 4

2
G2702 VIN VOUT

1
1 2

1
C2708 G9090-475T12U-GP C2709

SC1U10V2KX-1GP
GAP-CLOSE 74.09090.F3F

SC10U10V5KX-L1-GP
2
2
D AUD_AGND DY D

co
AUD_AGND
5V_S0 Close to Pin1 Close to Pin9 AUD_AGND close to codec IC
DY
AUD_AGND DY
R2719
1 0R5J-5-GP
2 PVDD2
R2727 C2714

nfi
1 33R2J-L1-GP
2 AC97_DATIN 3D3V_S0 SC1U6D3V2KX-L-1-GP RN2701
19 HDA_SDIN0
1

1
C2712 C2713 R2706 AUDIO_PC_BEEP 1 2 AUDIO_BEEP 4 1 KBC_BEEP 24
SCD1U10V2KX-L1-GP

SC10U6D3V3MX-L-GP
1 0R2J-L-GP
2 3 2 HDA_SPKR 20
C2701
2

1
SC10U6D3V3MX-L-GP SRN47K-2-GP-U
1 2 LDO3_CAP R2705

1
C2733 4K7R2J-L-GP

de

SCD1U10V2KX-L1-GP
19 HDA_CODEC_BITCLK

2
19 HDA_CODEC_SDOUT

HDA_CODEC_SYNC 19
Close to Pin46 EA40-HW SB

nti
HDA_CODEC_RST# 19
R2709 R2710
COMBO_MIC 1 22K1R2F-L-GP
2 COMBO_MIC_R_1 1 0R2J-L-GP
2 COMBO_MIC_JD#
AUDIO_PC_BEEP

1
5V_S0 C2715

AUD_3VD_R

SC10U6D3V3MX-L-GP
R2711 EA40-HW SB EA40-HW SC
R2720 1 0R5J-5-GP
2 AUDIO_DVDD

al,
3D3V_S0

2
1 0R5J-5-GP
2 PVDD1
1

C2718 C2719
1
SCD1U10V2KX-L1-GP

SC10U6D3V3MX-L-GP

C2734
SCD1U10V2KX-L1-GP

C C
2

U2701

10
11
12
2

1
2
3
4
5
6
7
8
9
ALC3225-CG-GP

SDATA-OUT
BCLK
DVSS
GPIO1/DMIC-CLK
GPIO0/DMIC-DATA
r
LDO3-CAP

RESETB
PCBEEP
DVDD

SDATA-IN

SYNC
DVDD-IO
MIC2V
DIGITAL Spilt by DGND

efe

2
49 R2712
COMBO_MIC_JD# GND ALC282_SENSE_A
Close to Pin41 48 SPDIF-OUT/GPIO2 SENSE_A 13 1 39K2R2F-L-GP
2 AUD_HP1_JD# 29,86
R2713
PD# 47 14 2K2R2J-2-GP
PVDD2 PDB SENSE_B IDREF
46 PVDD2 JDREF 15 1 R2714 2 AUD_AGND
45 16 20KR2F-L3-GP
29,86 AUD_SPK1_R+

1
1D5V_S0 AVDD2 SPK-OUT-R+ MONO-OUT MIC2-L_PORT-B C2720
29,86 AUD_SPK1_R- 44 SPK-OUT-R- MIC2-L_PORT-F-L 17 1 2 SC2D2U10V3KX-L-GP R2715
43 18 MIC2-R_PORT-B C2721 1 2 SC2D2U10V3KX-L-GP COMBO_MIC_R 2 1KR2J-L2-GP
1

r
AVDD2 29,86 AUD_SPK1_L- SPK-OUT-L- MIC2-R_PORT-F-R COMBO_MIC 29,86
R2724 42 19
29,86 AUD_SPK1_L+ SPK-OUT-L+ MIC1-L_PORT-B-L
2 1 PVDD1 41 20 R2726
PVDD1 MIC1-R_PORT-B-R

1
1 R2716 2 0R2J-L-GP AVDD2_R 40 AVDD2 LINE1-R_PORT-C-R 21 10KR2J-L-GP
3D3V_S0 0R2J-L-GP C2722 1 2 SC10U6D3V3MX-L-GP LDO2_CAP 39 22 2 1 LDO1_CAP ED2701 R2717

by
HPOUT-R_PORT-I-R

LDO2-CAP LINE1-L_PORT-C-L
HPOUT-L_PORT-I-L

38 23 LIN2-R_PORT-C C2737 1 2 R2718 TVL-0402-01-AB1-1-GP 22K1R2F-L-GP

R2725 AUD_CBP AVSS2 LINE2-R_PORT-E-R LIN2-L_PORT-C C2736 1 INT_MIC_L 2 1KR2J-L2-GP
37 CBP LINE2-L_PORT-E-L 24 2SC1U6D3V2KX-L-1-GP 1 INT_MIC_L_R 52,86
MIC1-VREFO-R
MIC1-VREFO-L

2 1 SC1U6D3V2KX-L-1-GP

2
MIC2-VREFO

0R2J-L-GP

2
LDO1-CAP

DY AUD_AGND
CPVDD

CPVEE

AVDD1
AVSS1
VREF

AUD_AGND
ANALOG
CBN

AUD_SPK1_R+

1
71.03225.003

An
AUD_SPK1_R- DY C2717
36
35
34
33
32
31
30
29
28
27
26
25

SC5600P25V2KX-1GP

2
5VA_S0
3D3V_S0
MIC2V

LDO1_CAP
AUD_CBN
2

CPVEE

AVDD2_R
HP_OUT_R_AUD

C2723
HP_OUT_L_AUD

AUD_AGND
SC2D2U10V3KX-L-GP

D2704 AUD_AGND
AZ2025-02S-R7G-GP D2701
2

B 75.02025.07D 83.00056.Q11 BAW56-5-GP B

nie
2

2nd = 75.02025.07D C2727 C2728 C2729 2nd = 83.00056.G11 2 PM_SLP_S3# 17,24

SC10U6D3V3MX-L-GP

SCD1U10V2KX-L1-GP

SC10U6D3V3MX-L-GP
1

C2724 C2725 C2726 3 DY

1

2
SCD1U10V2KX-L1-GP

SC10U6D3V3MX-L-GP

SCD1U10V2KX-L1-GP
3

1 AMP_MUTE# 24
2

AUD_AGND Close to Pin26 D2702

BAW56-5-GP
AUD_AGND 2 KBC_PWRBTN# 24,61,86
VREF

CS
PD# 3
AUD_SPK1_L+
1

2
Close to Pin40 C2730 C2731 C2732 1 HDA_CODEC_RST# 19
SCD1U10V2KX-L1-GP

SC10U6D3V3MX-L-GP

AUD_SPK1_L- C2735 SC2D2U10V3KX-L-GP INT_MIC_L_R

SC2D2U10V3KX-L-GP 83.00056.Q11
2

1 2 2nd = 83.00056.G11
2

1
D2705 ED2702

D
AZ2025-02S-R7G-GP 1 R2722 2 51R2J-L1-GP AUD_AGND DY VARISTOR-5D5V-19-GP
29,86 AUD_HP1_JACK_R2
75.02025.07D 29,86 AUD_HP1_JACK_L2 1 R2723 2 51R2J-L1-GP
2nd = 75.02025.07D
Vendor Rq to 51R

2
Close to Pin28 AUD_GND 1 R2721 2
DY
3

R2704 0R2J-L-GP
2

1 2
D2703 0R2J-L-GP
AZ2025-02S-R7G-GP DY AUD_GND 52,86
75.02025.07D
2nd = 75.02025.07D

A AUD_AGND Wistron Confidential document, Anyone can not Duplicate, Modify, A

3

Forward or any other purpose application without get Wistron

permission
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio Codec_ALC3225
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 27 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio AMP_1001
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 28 of 102
5 4 3 2 1
 5 4 3 2 1

AUD_SPK1_L- AUD_SPK1_L+
SSID = AUDIO Speaker

1
EC2903 EC2904

SC22P50V2JN-4GP

SC22P50V2JN-4GP
2

2
SPK1
5
27,86 AUD_SPK1_L- 1

27,86 AUD_SPK1_L+ 2
27,86 AUD_SPK1_R- 3
D 4 AUD_SPK1_R- AUD_SPK1_R+ D
27,86 AUD_SPK1_R+

co
6 DY DY

1
ACES-CON4-29-GP EC2906 EC2905

SC22P50V2JN-4GP

SC22P50V2JN-4GP
2

2
20.F1639.004

Layout Note:
2nd = 20.F1804.004

nfi
de
Trace width=40mil
DY DY

Vendor Rq EA40-HW SC

Combo Jack
27,86 COMBO_MIC
nti EL2901
1
R2902
0R2J-L-GP
2 COMBO_MIC_R1 3
LOUT1

al,
6
27,86 AUD_HP1_JACK_L2 1 2BLM18BD601SN1D-GP AUD_HP1_JACK_L1 1
EL2902 BLM18BD601SN1D-GP
1 2 AUD_HP1_JACK_R1 2
27,86 AUD_HP1_JACK_R2
4
C 5 C
27,86 AUD_HP1_JD#
AUDIO-JK263-GP

1
EC2911

efe
SCD01U50V2KX-L-GP 22.10270.941

2
EU2904 DY
2nd = 22.10270.661
AUD_HP1_JD# 1 2 3rd = 22.10270.741
MLVS0402M04-GP-U EA40-HW SB
EU2901

r
DY
COMBO_MIC_R1 1 2 AUD_AGND

MLVS0402M04-GP-U

by
B An B

nie
CS
D Wistron Confidential document, Anyone can not Duplicate, Modify,
Forward or any other purpose application without get Wistron
permission
A EV A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio Jack
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 29 of 102
5 4 3 2 1
 5 4 3 2 1

LDO EA40-HW SC 2 R3002 1 EVDD10

3D3V_S5 VDD33 0R2J-L-GP

C3002
SCD1U10V2KX-L-GP

C3003
SC1U6D3V2KX-L-1-GP
R3003

1
R3004
SWR 2
0R3J-L1-GP
1

2 1 VDD33

2
0R5J-5-GP VDD33 2 R3005 1

C3004
SCD1U10V2KX-L-GP

C3005
SCD1U10V2KX-L-GP

C3006
SCD1U10V2KX-L-GP

C3007
SCD1U10V2KX-L-GP

C3008
SCD1U10V2KX-L-GP

C3009
SCD1U10V2KX-L-GP

C3010
SCD1U10V2KX-L-GP

C3011
SCD1U10V2KX-L-GP

C3012
SC4D7U6D3V3KX-L-GP
0R2J-L-GP

1
DY
ENSWREG 2 R3006 1 L3001

2
D 0R2J-L-GP REGOUT VDD10 D
DY DY 1 2

co
DY DY IND-4D7UH-192-GP

C3013
SC4D7U6D3V3KX-L-GP

C3014
SCD1U10V2KX-L-GP

C3015
SCD1U10V2KX-L-GP

C3016
SCD1U10V2KX-L-GP

C3017
SCD1U10V2KX-L-GP

C3018
SCD1U10V2KX-L-GP

C3019
SCD1U10V2KX-L-GP
DY DY DY
ENSWREG 2 R3007 1

1
0R2J-L-GP
DY

2
the Caps close to VDD33 pin

nfi
DY
LDO
Close to VDDREG pin
CARD_3V3
SWR

10M/100M/1G_LED#
de

LAN_ACT_LED#
C3020
SCD1U10V2KX-L-GP

C3021
SC4D7U6D3V3KX-L-GP

MCP_GPIO9
1

RSET

VDD33/18
SD_CD#
1

VDD33
VDD33

VDD10

VDD33

VDD10
XTAL2
XTAL1
RSET
2

DY R3008
2K49R2F-2-L-GP 24 MCP_GPIO9

nti
EA40-HW SC

2
C3022 2 1 SC12P50V2JN-3GP

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
X3001
U3001

RSET

SD_CD#/MS_D5/XD_ALE
AVDD33
AVDD33

AVDD10
CKXTAL2
CKXTAL1
AVDD33
XD_CD#
MS_D0/XD_D1
MS_D4/XD_D0

VDD33/18
DVDD10
LED0
GPO
LED1
65 XTAL1 1 4

al,
GND

2
R3009
1MR2J-L3-GP 2 3
C DY C

1
1 48 REGOUT XTAL2 2 1
31 MDI0+ MDIP0 REGOUT VDD33 XTAL-25MHZ-181-GP
31 MDI0- 2 MDIN0 VDDREG 47
VDD10 VDD33 C3023

r
3 AVDD10 VDDREG 46 SC15P50V2JN-L-GP
4 45 ENSWREG
31 MDI1+ MDIP1 ENSWREG_H SDA 82.30020.G71
5 44

efe
31 MDI1- MDIN1 SDA
31 MDI2+ 6 43
MDIP2 LED3
31 MDI2- 7 42
VDD10 MDIN2 SCL/LED_CR VDD10 2nd = 82.30020.G61
8 41
AVDD10 DVDD10 LAN_WAKE#_R
31 MDI3+ 9 MDIP3 LANWAKE# 40
10 39 VDD33 VDD33 3D3V_S0
31 MDI3- VDD33 MDIN3 DVDD33 ISOLATEB
11 38
VDD33 AVDD33 ISOLATE# PLT_RST#
12 DVDD33 PERST# 37

2
CARD_3V3 13 36 PCIE_CLK_LAN_REQ#
CARD_3V3 CLKREQ# SD_WP R3010
14 35

r
SD_D7/XD_RDY SD_WP/MS_D1/XD_WP# 1KR2J-L2-GP

SD_CMD/MS_D6/XD_D3
15 34

SD_D1/MS_CLK/XD_D6

SD_CLK/MS_D3/XD_D4
SD_D6/MS_INS#/XD_RE# MS_BS/XD_CLE

1
VDD33/18

SD_D0/MS_D7/XD_D5

SD_D3/MS_D2/XD_D2
16 33
SD_D5/XD_CE# VDD33/18 R3011 R3012

1
10KR2J-L-GP 1K54R2F-GP ISOLATEB

by
SD_D4/XD_WE#

C3024
SCD1U10V2KX-L-GP

C3025
SCD1U10V2KX-L-GP

C3026
SC4D7U6D3V3KX-L-GP

C3027
SC4D7U6D3V3KX-L-GP
DY DY

SD_D2/XD_D7

1
1

2
REFCLK_N
REFCLK_P
R3013

EVDD10
10M/100M/1G_LED# 15K4R2F-GP

2
HSON
HSOP
DY DY

HSIN
HSIP
GND

GND
SDA

2
RTL8411AAR-CG-GP

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
An
PCIE_CLK_LAN#
PCIE_CLK_LAN

PCIE_RXN4_C
PCIE_RXP4_C
3D3V_S5
close to pin33 and pin53

EVDD10
SP10
SP5
SP6
SP7
SP8
SP9
71.08411.B03
2

B B
R3015

nie
EA40-HW SC 1KR2J-L2-GP

C3028
SCD1U10V2KX-L-GP

C3029
SCD1U10V2KX-L-GP
1
1
1

SP5 2 ER3014 1 SD_DATA1 33,86

22R2J-2-GP DY

2
2
LAN_WAKE#_R 1 R3017 2 LAN_PCIE_WAKE# 24
SP6 2 ER3022 1 SD_DATA0 33,86
22R2J-2-GP 0R2J-L-GP
close the Pin 18~pin 23

PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4

SP7 2 ER3021 1 SD_CLK 33,86 1 R3016 2 PCIE_WAKE# 17,24,58

CS
33R2J-L1-GP
0R2J-L-GP SP5 SP6 SP7 SP8 SP9 SP10 EA40-HW SC
SP8 2 ER3024 1 SD_CMD 33,86

EC3030
SC5P50V2CN-2GP

EC3031
SC5P50V2CN-2GP

EC3032
SC5P50V2CN-2GP

EC3033
SC5P50V2CN-2GP

EC3034
SC5P50V2CN-2GP

EC3035
SC5P50V2CN-2GP
22R2J-2-GP

1
SP9 2 ER3023 1 DY DY DY DY DY DY
SD_DATA3 33,86
22R2J-2-GP

2
SP10 2 ER3025 1 PCIE_CLK_LAN_REQ# PCIE_CLK_LAN_REQ# 18
SD_DATA2 33,86

D
22R2J-2-GP
PCIE_CLK_LAN
PCIE_CLK_LAN 18
SD_WP
SD_WP 33
PCIE_CLK_LAN# SD_WP SD_CD#
PCIE_CLK_LAN# 18

EC3036
SC5P50V2CN-2GP

EC3037
SC5P50V2CN-2GP
SD_CD# PLT_RST# PCIE_TXP4 PCIE_TXP4 16
SD_CD# 33 PLT_RST# 17,24,36,58,65,73,86,88

1
PCIE_TXN4 PCIE_TXN4 16 DY DY

2
LAN_ACT_LED# LAN_ACT_LED# 31 PCIE_RXP4
PCIE_RXP4 16
10M/100M/1G_LED# 10M/100M/1G_LED# 31 PCIE_RXN4
PCIE_RXN4 16 Wistron Confidential document, Anyone can not
A Duplicate, Modify, Forward or any other purpose A
application without get Wistron permission
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN(RTL8411)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 30 of 102
5 4 3 2 1
 5 4 3 2 1

EA40-HW SC
SSID = LAN 86 RJ45_1

86 RJ45_2
3rd = 68.00069.30A 86 RJ45_3
2nd = 68.IH115.30A
68.69241.301 86 RJ45_4
XFORM-270-GP-U
86 RJ45_5
12 13 RJ45_7
30 MDI3+ 86 RJ45_6

D 86 RJ45_7 D
RJ1

co
86 RJ45_8
13
LAN_ACT_LED#_C 9
30 LAN_ACT_LED#

YELLOW
11 14 RJ45_8
XRF_TDC1 30 MDI3- MCT1 CONN_PWR2 86 LAN_ACT_LED#_C
10 15 10
RJ45_1 1
MCT2 86 10M/100M/1G_LED#_C
9 16
8 17 RJ45_3 R3104 RJ45_2 2

nfi
30 MDI1+ 86 CONN_PWR
2 470R2J-2-GP
1 RJ45_3 3
R3105 RJ45_4 4 86 CONN_PWR2
2 470R2J-2-GP
1 RJ45_5 5 3D3V_S5 1 R3102 2 0R0402-PAD CONN_PWR
RJ45_6 6 1 R3103 2 0R0402-PAD CONN_PWR2
C3118
SCD1U10V2KX-L1-GP

RJ45_7 7
1

RJ45_8 8 EC3101 EC3102

1
SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP
7 18 RJ45_6 10M/100M/1G_LED#_C 11

de
30 MDI1- 30 10M/100M/1G_LED#

GREEN
2

6 19 RJ45_4 CONN_PWR 12

2
30 MDI2+
14

RJ45-8P-100-GP

22.10277.V61

nti
5 20 RJ45_5
30 MDI2- MCT3
4 21

3 22 MCT4
2 23 RJ45_1
30 MDI0+

30 MDI0- 1
XF3101
24 RJ45_2

al, C

r
U3104
5

efe
5V_S5
U3101
5V_S5 5
MDI1-
MDI0+

MDI1+

MDI2+

MDI3+
MDI0-

MDI2-

MDI3-

2 TVLST2304AD0-1-GP

6
LAN_ACT_LED#
XRF_TDC1

r
TVLST2304AD0-1-GP

6
10M/100M/1G_LED#

by
30 MDI0+
2

C3116 30 MDI1+
SC1KP50V2JN-2GP EC3110 EC3109 EC3103 EC3104 EC3105 EC3106 EC3108 EC3107 30 MDI0-
1

1
1

1
SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

C3113 C3114
DY
SC1KP50V2KX-L-1-GP

SC1KP50V2KX-L-1-GP
30 MDI1-
2

2
U3102
U3103

An
5V_S5 5
5V_S5 5
B B

2
2

nie
TVLST2304AD0-1-GP

6
TVLST2304AD0-1-GP

6
30 MDI2+
30 MDI3+

30 MDI2-
30 MDI3-

CS
MCT1

MCT2

MCT3

MCT4

MCT3

MCT4

MCT1

MCT2

D
1

GDT1 GDT2 GDT3 GDT4

1

1
B88069X9231T203-GP

B88069X9231T203-GP

B88069X9231T203-GP

B88069X9231T203-GP

R3112 R3115 R3114 R3113

75R3J-L-GP 75R3J-L-GP 75R3J-L-GP 75R3J-L-GP
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
2

A application without get Wistron permission A

EV
SURGE SURGE SURGE SURGE
MCT_R
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

Taipei Hsien 221, Taiwan, R.O.C.

C3117
SC1KP2KV6KX-GP Title
2

(LAN+VGA) CONNECTOR
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 31 of 102

5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

RTS5229(CARD READER)
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 32 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = SDIO SD//MS Card Reader

CARD_3V3

co
D CARD1 D

5 VDD CMD 3 SD_CMD 30,86

CLK 6 SD_CLK 30,86

C3303
1 30,86
30,86
30,86
nfi
SD_DATA0
SD_DATA1
SD_DATA2
8
9
1
DAT0
DAT1
DAT2
NP1
NP2
NP1
NP2 SD_CLK

de
30,86 SD_DATA3 2 CD/DAT3 GND_SW 12

1
SC4D7U6D3V3KX-L-GP 13 EC3302
GND_SW SC33P50V2JN-3GP
DY
2

SD_WP_Q 10 4

2
SD_CD#_Q WP_SW VSS
11 7

nti
CD_SW VSS

SDCARD-11P-GP
Close to Connector

al,
62.10051.A51

C C

r efe
3D3V_S5
1

r by
3D3V_S5

1
R3301 R3302

An
100KR2J-4-GP 100KR2J-4-GP
Q3301
4 3 SD_CD# 30
2

2
B SD_CD#_Q 5 2 SD_WP_Q B

30 SD_WP 6

2N7002KDW-GP
1

84.2N702.A3F
2nd = 75.00601.07C
nie
CS
3rd = 84.2N702.F3F

D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV
86 SD_WP_Q

86 SD_CD#_Q Wistron Corporation

A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

CARD Reader CONN

Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 33 of 102
5 4 3 2 1
 5 4 3 2 1

EA40-HW SC USB 3.0 Connector

Pin definition
Low Active 2A 1 POWER
5V_USB30
5V_S5 U3401 2 USB 2.0 D-
D D

co
1 GND OUT#8 8 3 USB 2.0 D+
2 IN#2 OUT#7 7
3 IN#3 OUT#6 6 4 GND

1
C3402
SCD1U16V2KX-L-GP
4 EN/EN# OCB 5

1
C3403 TC3401 5 StdA_SSRX- SuperSpeed RX

ST100U6D3VAM-3-GP
nfi

SC10U10V5KX-L1-GP
C3401

2
SC1U10V3KX-L1-GP SY6288DCAC-GP 6 StdA_SSRX+

2
74.06288.A79
2nd = 74.02301.079 7 GND
DY

de
8 StdA_SSTX- SuperSpeed TX
24,63 USB_PWR_EN# 3rd =
9 StdA_SSTX+
4th =

nti
C

al, EA40-HW SC
C

16 USB30_RN0
r
1
EU3401
efe
10
5V_USB30

5
USB1

VBUS D-
D+
2
3
USB_CG_PN1_R
USB_CG_PP1_R
1

MCM1012B900FBP-GP-U
EL3402
2

3
USB_PN1 16

USB_PP1 16

r
LINE_1 NC#10 STDA_SSRX-
16 USB30_RP0 2 LINE_2 NC#9 9 6 STDA_SSRX+ GND_DRAIN 7 EA40-HW SC
3 8
SCD1U16V2KX-L-GP 2 1 C3408 4
GND GND
7 USB30_TN0_C 8 2nd = 68.00396.001

by
16 USB30_TN0 LINE_3 NC#7 STDA_SSTX-
SCD1U16V2KX-L-GP 2 1 C3409 5 6 USB30_TP0_C 9 10
16 USB30_TP0 LINE_4 NC#6 STDA_SSTX+ CHASSIS#10
CHASSIS#11 11 3rd = 69.10118.001
12 CHASSIS#12 GND 4
AZ1045-04F-R7G-GP 13 CHASSIS#13
68.01012.201

An
SKT-USB13-23-GP
ED3401
1 2
B 22.10339.521 B

AIES12U020R2-GP
ED3402

nie
2nd = 22.10339.141 1 2

3rd = 22.10321.Z41 AIES12U020R2-GP

CS
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV

A Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB 2.0 / 3.0 Port

Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 34 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB CHARGER
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 35 of 102
5 4 3 2 1
 5 4 3 2 1

R3603

Power Sequence 7,37,46,48,86 1.05VTT_PWRGD 1 0R2J-L-GP

R3604
2

1 0R2J-L-GP
2 5V_S0 3D3V_S5 3D3V_S0
7,17,26,46,86 IMVP_PWRGD ALL_SYS_PWRGD 24,86
EA40-HW 1 DY EC3601 EC3602 EC3603 EC3604 EC3605 EC3607 EC3606 EC3609 EC3608

1
C3602

1
SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP
R3602 DY SCD01U50V2KX-L-GP
1 0R2J-L-GP
2 DY

2
7,37,46,48,86 1.05VTT_PWRGD

2
D D
R3601 DY DY DY DY DY DY DY DY

co
7,17,26,46,86 IMVP_PWRGD 1 0R2J-L-GP
2 PCH_PWROK 17,86

D3601

1
1 C3601
SCD01U50V2KX-L-GP
3 DY

2
24,27,37,48,51 EC_PM_SLP_S3#

nfi
2

BAS16-1-GP 83.00016.B11
2ND = 83.00016.F11
3rd = 83.00016.K11
4th = 83.00016.H11

ANNIE Run Power

24,27,37,48,51 EC_PM_SLP_S3# 1 R3632 2
0R0402-PAD
VTT_PWR

de 3V_SYS_OUT

PG3605
1 2
3D3V_S0 5V_SYS_OUT_2

PG3601
1 2
5V_S0

nti
EA40-HW 1 GAP-CLOSE-PWR GAP-CLOSE-PWR

PG3606 PG3602
5V_S5 3D3V_S5 EA40-HW 1 1 2 1 2
U3601
3V_SYS_OUT GAP-CLOSE-PWR GAP-CLOSE-PWR
15
GND

al,
1 14 PG3607 PG3603
VIN1#1 VOUT1#14
2 13 1 2 1 2
VIN1#2 VOUT1#13 VTT_CT_5VC_1
3 12
ON1 CT1 5V_SYS_OUT_2 GAP-CLOSE-PWR GAP-CLOSE-PWR
4 11
VTT_PWR VBIAS GND VTT_CT_5VC_2
5 10
ON2 CT2 PG3608 PG3604
6 9
VIN2#6 VOUT2#9 C3612
C 7 8 1 2 1 2 C
VIN2#7 VOUT2#8

SCD1U10V2KX-L1-GP
C3603 C3605 C3608 GAP-CLOSE-PWR GAP-CLOSE-PWR

2
SC47P50V2JN-3GP

SC47P50V2JN-3GP
TPS22966DPUR-GP DY
PG3609

r
2

2
1 2

1
SC22U6D3V3MX-1-GP
1

efe
C3633 C3606 C3632 C3607 GAP-CLOSE-PWR

1
SC1U10V2KX-1GP

SC22U6D3V3MX-1-GP

SC1U10V2KX-1GP

SC22U6D3V3MX-1-GP

DY DY C3609 C3610

SCD1U10V2KX-L1-GP
DY
2

2
2
SC22U6D3V3MX-1-GP

1
Discharge circuit
r by
B 1D05V_VTT
An B

1D05V_VTT
R3607
1 1KR2J-L2-GP
2 H_THERMTRIP# 20
24,27,37,48,51
220R3F-1-GP

EC_PM_SLP_S3#
1 R3613 2 1D05V_DIS_Q 3

1
Q3609

2N7002KDW-GP
84.2N702.A3F
4

6 1D05V_DIS
nie
2 R3615 1

100KR2J-4-GP
3D3V_S5

CS
DY
E

R3608 Q3602 2nd = 75.00601.07C

2 0R2J-L-GP
1 H_PWRGD_R B MMBT2222A-3-GP 3rd = 84.2N702.F3F
4,86 H_CPUPWRGD
84.02222.V11
C
2

R3609 C3604
SCD1U10V2KX-L1-GP

17,24,30,58,65,73,86,88 PLT_RST# 1 4K7R2J-L-GP

2
1
1

1D5V_S0
R3610

D
Q3610
2K2R2J-2-GP 3D3V_S5
220R3F-1-GP 1 R3605 2 1D5V_DIS_Q 3 4
BAS16-1-GP
2

2 2 5
24,27,37,48,51 EC_PM_SLP_S3#
3 1 6 1D5V_DIS 2 R3616 1
PURE_HW_SHUTDOWN# 24,26
1 100KR2J-4-GP
45 3V_5V_EN
83.00016.B11 2N7002KDW-GP
D3602
84.2N702.A3F
2

2ND = 83.00016.F11
1

EC3610 R3611 2nd = 75.00601.07C

3rd = 83.00016.K11
SC47P50V2JN-3GP

200KR2J-L1-GP 4th = 83.00016.H11 3rd = 84.2N702.F3F

DY DY R3612
2

2 1
1

A S5_ENABLE 24,86 A
2KR2F-L1-GP

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV

DY 3D3V_S0 discharge circuit Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Plane Enable & SEQUENCE

Size Document Number Rev
A2
EA40_HW ULT 1
Date: Friday, May 31, 2013 Sheet 36 of 102
5 4 3 2 1
 5 4 3 2 1

R3716

co
D D
4,86 SM_DRAMRST# 1 0R2J-L-GP
2 DDR3_DRAMRST# 12,13

1
nfi
C3704
SC100P50V2JN-L-GP
DY

2
de
nti
C
al, C

r
1D35V_S3

efe
1

R3711 DDR_VREF_S3
DY
1K8R2F-GP R3712
2 0R2J-L-GP
1

r
2

12,13 VREF_CA 1 R3702

2R2J-2-GP
2

by
+V_SM_VREF_CNT 5
1

An
R3715 C3703

SCD022U16V2KX-3GP
1K8R2F-GP VREF_RC 2
2

B B

nie
1

R3717
24D9R2F-L-GP

CS
2

For Intel Recommend Close to DIMM

EV
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
D
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

ADAPTER OCP / S3 reduction

Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 37 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

3D3V_S5 Non_DS3
R3801
1 0R2J-L-GP
2
r
3D3V_SUS

efe
3D3V_S5

1
U3801
DS3
6
r by 3D3V_SUS

An
IN OUT
2 NC#2 GND 5
C3801
SC1U6D3V2KX-L-1-GP

U3801_R 3 4 DS3_PWRCTL 1 2
DSG EN PM_SLP_SUS# 17,24
1

R3802
0R2J-L-GP
1

G5244A31U-GP DS3

nie
B B
2

Non_DS3 R3803 74.05244.073

100R2J-L-GP
DS3
2

CS

1
C3802
SCD47U16V2ZY-GP
DS3

2
EV
D Wistron Confidential document, Anyone can not
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application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

DS3
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 38 of 102
5 4 3 2 1
 5 4 3 2 1

Power Sequence

D D

co
nfi
de
nti
C

al, C

refe
r by
B
An B

nie
CS
D Wistron Confidential document, Anyone can not
A Duplicate, Modify, Forward or any other purpose A
application without get Wistron permission
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

1D05_M
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 39 of 102

5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
B An B

nie
CS
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
EV

D
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Connected Standby1
Size Document Number Rev
A
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 40 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
B An B

nie
CS
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
EV

D
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Connected Standby2
Size Document Number Rev
A
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 41 of 102
5 4 3 2 1
 5 4 3 2 1

ANNIE solution

co
D D

EA40-HW 1

nfi
DCIN1
9 de
Adaptor in to generate DCBATOUT
AD_JK

2
nti
K
3

1
al,

1
4 PC4201 PD4201 PC4202

SCD1U50V3KX-L-GP
5 P6SBMJ27APT-GP SC1U50V5ZY-1-GP
6 83.P6SBM.DAG

2
C 7 2nd = 83.P6SMB.JAG C

A
8 3rd = 83.P6SMB.CAG

r
10

ACES-CON8-12-GP-U1

20.F0818.008 efe AD_JK AD+

r by PWR_AD+_2
1
2
3
4
S
S
S
G
PU4201
D
D
D
D
8
7
6
5

An

2
P1403EV8-GP

1
PR4201 PC4203 84.P1403.B37

SC1U50V5ZY-1-GP
200KR2F-L-GP
2nd = 84.03005.037

2
nie
B B

1
PQ4202 R2 3rd = 84.04407.F37
PQ4201 E
3 PWR_ADJK_EN B R1
1 R1 C
24 AD_OFF
2
R2 PDTA124EU-1-GP

CS

1
LTC024EUB-FS8-GP 84.00124.K1K
84.00024.A1K 2nd = 84.00024.01K PR4202
2ND = 84.00124.H1K 3rd = 84.05124.A11 100KR2J-4-GP
3rd = 84.05124.011

2
EV
D
Wistron Confidential document, Anyone can not
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application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

DCIN JACK
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 42 of 102
5 4 3 2 1
 5 4 3 2 1

BT+

BATTERY CONNECTOR

1
co
D PC4301 D

SCD1U50V3KX-L-GP
PC4302

SC2K2P50V2KX-L-GP
Close BAT1

2
nfi
PG4301
2 1 BAT_IN_mon 44

de
BAT2
GAP-CLOSE-PWR
9
EA40-HW SC 1

PN4301 BT+ 2

nti 1 8 86 BAT_G BAT_G 3

2 7 BAT_IN#_1 4
24 BAT_IN#
3 6 BATA_SCL_1 5
24,44 BAT_SCL
4 5 BATA_SDA_1 6

al,
24,44 BAT_SDA
7
SRN33J-7-GP-U 8
10

K
C PD4301 C
MMPZ5232BPT-GP-U ALP-CON8-17-GP-U

2
83.5R603.D3F

2
efe
2ND = 83.5R603.K3F PR4302
3rd = 83.5R603.Q3F PD4302 0R0402-PAD 20.81775.008

A
AZ2025-02S-R7G-GP
2ND = 20.82003.008

1
75.02025.07D

r by

3
2ND = 75.02025.07D

An
nie
B B

BAT_IN#_1
86 BAT_IN#_1
BATA_SCL_1

CS
86 BATA_SCL_1
BATA_SDA_1
86 BATA_SDA_1

EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

BATT CONN
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 43 of 102
5 4 3 2 1
 5 4 3 2 1

AD+_TO_SYS DCBATOUT
SSID = Charger PU4401
PR4404
BT+

AD+ 8 D S 1 PU4402
7 D S 2 1 2 1 S D 8

1
6 D S 3 PR4421 2 S D 7
5 D G 4 D01R3721F-GP-U AD+ 3 S D 6

100KR2F-L3-GP
4 G D 5
P1403EV8-GP

K
1
PR4423 84.P1403.B37 P1403EV8-GP

1
AD+_G_2 84.P1403.B37 PD4402
10KR2F-L1-GP 2nd = 84.03005.037 PG4401 PG4402 SMF18AT1G-GP

1
2nd = 84.03005.037 83.SMF18.0AH
3rd = 84.04407.F37 PR4422 GAP-CLOSE-PWR-3-GP PR4409 GAP-CLOSE-PWR-3-GP 2ND = 83.SMF18.AAH

A
1
AD+ total power R1 R2 10KR2F-L1-GP 0R2J-L-GP PR4411 3rd = 84.04407.F37

DC_IN_D
1 2
DY 470KR2J-L1-GP

2
D D
65w 36K 100K PQ4401

AD+_G_1
1 2

co

2
3 4 PC4403
90w 90K9 100K SCD1U25V2KX-L-GP
PWR_CHG_ACOK 2 5

1 6 DCBATOUT
change the table

1
AD+ 84.2N702.A3F PC4402 PC4404
PWR_CHG_CMPIN_R

2N7002KDW-GP

nfi

SCD1U50V3KX-L-GP

SCD1U50V3KX-L-GP
PR4442
1PWR_CHG_CMPIN 2nd = 75.00601.07C

PWR_CHG_ACN
PWR_CHG_ACP
2

2
143KR2F-GP
1 2 PWR_CHG_VCC PWR_CHG_REGN

1
PC4405 PC4425 PC4406
CHG_AGND

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U25V2KX-L-GP
PR4415 PC4401 CHG_AGND

5
6
7
8
PR4406 10R5J-GP SCD47U25V3KX-1GP

2
D
D
D
D
316KR2F-GP PR4408 PD4403 PC4409 PU4404 DY
84.00412.037

de

2
1 2PWR_CHG_BTST_R
K A 1 2SIS412DN-T1-GE3-GP
CHG_AGND 2nd = 84.08884.A37
D

SCD047U25V2KX-GP
PU4403 0R3J-L1-GP CH520S-30PT-GP SC1U16V3KX-2GP

PC4417
PQ4411 83.R0203.08F

ACN
ACP

1
PWR_CHG_REGN

G
S
S
S
2N7002K-2-GP PWR_CHG_IOUT 20 2nd = 83.1R003.I8F

1
PR4431 VCC
84.2N702.J31

4
3
2
1
PR4407
MAG. 7*7*3

2
2ND = 84.2N702.031 R1 36KR2F-GP 10KR2F-L1-GP PWR_CHG_ACDET6 17 PWR_CHG_BTST EA40-HW -1

nti
ACDET BTST
1

DCR: 37~40mOhm
1

PR4410
Idc : 5.5 A , Isat : 10A

2
G

49K9R2F-L-GP PC4410 AC_Protect 16

SCD01U50V2KX-L-GP REG PL4401
Charger Current=1.4~3.6A
2

17 PM_SLP_A#_R
1

1
PM_SLP_A#_R

PR4402 3 IND-4D7UH-173-GP
2

PR4401 CMPOUT PWR_CHG_HIDRV

HIDRV
18 68.4R71C.10K BT+
R2 3D3MR2J-GP 1 2 2nd = 68.4R710.20D
330KR2F-L-GP
DY PR4417

al,
4
CMPIN PWR_CHG_PHASE PC4413 BT+_R
19 1 2 1 2
2

2
PR4443 PHASE
PWR_CHG_CMPIN SC3300P50V2KX-1GP
2 1 D01R3721F-GP-U
C 17 PM_SLP_A# C
CHG_AGND PWR_CHG_BAT_SCL 9 15 PWR_CHG_LODRV

BATT_SENSE_G
PWR_CHG_CSOP_1
CHG_AGND SCL LODRV PC4420 PC4421 PC4422 PC4423
1KR2F-L-GP

1
adapter 65W and 90W

5
6
7
8

GAP-CLOSE-PWR-3-GP

SCD1U50V3KX-L-GP
PWR_CHG_BAT_SDA 8 74.02224.073

GAP-CLOSE-PWR-3-GP
SDA

D
D
D
D

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
3D3V_AUX_S5 AC mode (default:120% ): PR4425 PU4405 84.00412.037

2
2

2
PG4403
10R2F-L-GP

r
SIS412DN-T1-GE3-GP

PG4404
set up the value by PR4401 and PR4407 SRP
13 PWR_CHG_SRP 1 2
1

PR4420 PWR_CHG_ILIM 10 2nd = 84.08884.A37

efe

1
ILIM PWR_CHG_SRN
12 1 2
100KR2F-L3-GP

1
3D3V_AUX_S5 SRN

G
S
S
S
PR4424 PC4419
PWR_CHG_BM#

SCD1U25V2KX-L-GP
11 7D5R2F-GP PG4409 PG4411

4
3
2
1

2
BM#
DY
2

GAP-CLOSE-PWR

GAP-CLOSE-PWR
1 2
CHG_AGND
PU4404/PU4405 change to SIS412
D

1
PR4405 5 7 PWR_CHG_IOUT 1 2 AD_IA 24
PQ4407 10KR2F-L1-GP ACOK# IOUT PR4413 PWR_CHG_CSOP_1

GND

GND
2N7002K-2-GP 0R0402-PAD

1
84.2N702.J31

8K45R2F-2-GP
PC4416 Wistron Confidential document, Anyone can not

PR4428
HPA02224RGRR-1-GP

21

14
1

2ND = 84.2N702.031 Duplicate, Modify, Forward or any other purpose

Bmon-

Bmon+
PR4426 SCD1U25V2KX-L-GP

2
SC220P50V2JN-3GP
application without get Wistron permission
24 PWR_CHG_BM#

1
PC4411
by
DY
G
S

100KR2J-4-GP 2 1 BATT_SENSE_G PR4002 PR4004

1
10R2F-L-GP 10R2F-L-GP
2

1
CHG_AGND PG4413 PC4412
OCP OCP
DY

Bmon+_R 2
GAP-CLOSE-PWR-3-GP SCD1U25V2KX-L-GP

2
CHG_ON# 24

Bmon-_R
2
3D3V_AUX_S5 CHG_AGND
PR4416 PC4429
3D3V_AUX_S5 CHG_AGND Bmon 2 1 Bmon_R 1 2

An
1

100KR2F-L3-GP
Add PR4838/PR4437 SCD1U25V2KX-L-GP

1
PR4438 PR4437 CHG_AGND PR4439
1

1
100KR2J-4-GP DY DY 100KR2J-4-GP 2011.0817 PC4414

100KR2F-L3-GP
B B
PR4429 SC1U25V3KX-1-GP OCP OCP

6
5
4
100KR2J-4-GP
2

2
PU4408

-
+
2 1 PWR_CHG_BAT_SCL 3D3V_AUX_S5 PWR_BAT_CMPOUT INA199A1-GP
24,43 BAT_SCL
2

PG4408 GAP-CLOSE-PWR-3-GP 3D3V_AUX_S5

nie
3D3V_AUX_S5 4,24,46,86 H_PROCHOT# OCP

2IN-

1
2
3
1
2 1 PWR_CHG_BAT_SDA PR4403 5V_AUX_S5
24,43 BAT_SDA
PG4410 GAP-CLOSE-PWR-3-GP
4-cell and 6--cell DC OCP
1

100KR2J-4-GP
check !! D
mode: change net

1
PR4430 24,86 AC_IN#
100KR2J-4-GP PQ4409 PR4427
R3
3D3V_AUX_S5 2011.0817
set up the value by PR4427 and PR4418

2
95K3R2F-GP

PC4415
2N7002K-2-GP

SC1U25V3KX-1-GP
PWR_BAT_CMPOUT
84.2N702.J31
2

OCP

1
2ND = 84.2N702.031 2IN- OCP

2
PWR_CHG_ACOK
AC adapter detect current :
2

CS
1

5
6
7
8
OCP OCP PC4418

2
G
S

PR4414 PR4418 PU4406 SCD1U25V2KX-L-GP

+IN2
-IN2
OUT2
VCC

1
DY 120KR2J-L-GP 49K9R2F-L-GP
R4 BA10393F-GE2-GP DC battery detect current :
Ac input current = 20 x ( Vacp - Vacn ) / 10mohm 74.10393.A21
OCPUVP OCPOVP
D

2
4,24,46,86 H_PROCHOT# PQ4406
Battery OCP setting DC output current = 50 x ( VBT+_1 - VBT+ ) / 10mohm

OUT1
2N7002K-2-GP OCP Battery OCP R3 R4OCP

+IN1
VEE

-IN1
check !! 84.2N702.J31
6 Cell (3S2P) 8A 32.4K 49.9K

D
2ND = 84.2N702.031 3D3V_AUX_S5
D

4
3
2
1
PQ4408 4,24,46,86 H_PROCHOT# 4 Cell (4S1P) 4.5A 95.3K 49.9K
EA40-HW SC
G
S

2N7002K-2-GP PR4412 3D3V_AUX_S5

UVPmon_CMP
UVPmon_Bmon+
84.2N702.J31 100KR2J-4-GP
Battery UVP R5 R6
check !!

1
2ND = 84.2N702.031 AC_IN# PWR_BAT_UVPmon_CMPOUT
6 Cell (3S2P) 9V 78.7K 49.9K
2

PR4433
PQ4410 R5 4 Cell (4S1P) 12V 46.4K 49.9K
G
S

PWR_BAT_UVPmon_CMPOUT 46K4R2F-2-GP
A A
BT+ PR4447 PWR_BAT_UVPMON_CMPOUT_Q PR4435 Wistron Confidential document, Anyone can not
4 3 UVP

2
AC_Protect_R 1 2AC_Protect 100KR2J-4-GP UVPmon_CMP 49K9R2F-L-GP Duplicate, Modify, Forward or any other purpose
PR4441 0R2J-L-GP 2 UVP 1 PWR_BAT_UVPMON_BT+_R 5 2 2 1 PC4424 application without get Wistron permission
EV
2

1
UVP SCD1U25V2KX-L-GP

1
PR4448 6 1 DY PR4432 PR4434
1

1
100KR2J-4-GP 120KR2J-L-GP 49K9R2F-L-GP
PC4426
R6 PR4436 Wistron Corporation
2 UVP 1 84.2N702.A3F 2N7002KDW-GP UVP UVP
SCD01U50V2KX-L-GP 300KR2F-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
modify schematic
2

2nd = 75.00601.07C Battery UVP setting Taipei Hsien 221, Taiwan, R.O.C.
UVP

2
DY UVP Title

UVP CHARGER_BQ24737
PR4440 BAT_IN_mon Size Document Number Rev
PWR_BAT_UVPmon_CMPOUT BAT_IN_mon 43 Custom
1 2
24 DC_Protect_EC 0R2J-L-GP EA40_HW ULT 1
Date: Friday, May 24, 2013 Sheet 44 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Plane.Regulator_3p3v5v

DCBATOUT 3D3V_PWR_DCBATOUT 3D3V_PWR 3D3V_S5 DCBATOUT 5V_PWR_DCBATOUT 5V_PWR 5V_S5

PG4504 PG4511 PG4514

PG4501 1 2 1 2 1 2
1 2
D GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR GAP-CLOSE-PWR-3-GP D
GAP-CLOSE-PWR PG4505 PG4512 PG4515

co
PG4502 1 2 1 2 1 2
1 2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR PG4506 PG4513 PG4516
PG4503 1 2 1 2 1 2
1 2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR PG4507 PG4517

nfi
1 2 1 2

GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
PG4508 PG4518
1 2 1 2

GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
PG4509 PG4519

de
1 2 1 2

GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

nti
5V_PWR_DCBATOUT

3D3V_PWR_DCBATOUT DCBATOUT

al,

1
PC4505 PC4504 PC4506

SCD1U25V3KX-L-GP

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP
2

2
1
PC4527
1

C PC4501 PC4502 PC4503 SCD01U50V2KX-L-GP C

2
SCD1U25V3KX-L-GP

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

8
7
6
5

5
6
7
8
2

D
D
D
D
D
D
D
D

PU4502 PU4504

12
SIS412DN-T1-GE3-GP SIS412DN-T1-GE3-GP

r
84.00412.037 PU4501 84.00412.037
2nd = 84.08067.A37 2nd = 84.08067.A37

VIN
efe
PC4510 Design Current = 6A

G
S
S
S
PR4501 PR4510 SCD1U25V3KX-L-GP
S
S
S
G

PL4501 PC4512 2D2R3F-L-GP 2D2R3F-L-GP PL4502 9A<OCP

74.51225.B73
1
2
3
4

4
3
2
1
IND-2D2UH-122-GP 2 1PWR_3D3V_BOOT1
1 2PWR_3D3V_BOOT2 9 17 PWR_5V_BOOT1 1 2PWR_5V_BOOT1_1 1 2 IND-2D2UH-122-GP
VBST2 VBST1
68.2R21B.10J 68.2R21B.10J
3D3V_PWR 2nd = 68.2R210.20B SCD1U25V3KX-L-GP PWR_3D3V_UGATE2 10 16 PWR_5V_UGATE1 2nd = 68.2R210.20B 5V_PWR
DRVH2 DRVH1
2 1 PWR_3D3V_PHASE2 8 18 PWR_5V_PHASE1 2 1
SW2 SW1
PWR_3D3V_LGATE2 11 15 PWR_5V_LGATE1
1

1
DRVL2 DRVL1

r
PC4513 PC4511 PT4503
PG4520 14 PWR_5V_VOUT1 PG4524 PG4525 SE220U6D3VM-30-GP
SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP
2

2
1

8
7
6
5

5
6
7
8

1
VO1
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
D
D
D
D
D
D
D
D

PT4502 PU4503 PWR_3D3V_FB2 4 2 PWR_5V_FB1 PU4505

Iomax=5A SE220U6D3VM-30-GP SIS412DN-T1-GE3-GP
VFB2 VFB1
SIS412DN-T1-GE3-GP

by
OCP>7.5A 84.00412.037 84.00412.037
2

2
2nd = 84.08067.A37 2nd = 84.08067.A37
77.52271.09L PWR_3D3V_EN 6 20 PWR_5V_EN 77.52271.09L
EN2 EN1

G
S
S
S
2ND = 77.52271.07L 2ND = 77.52271.07L
S
S
S
G
1
2
3
4

4
3
2
1
PWR_3D3V_ENTRIP2 5 1 PWR_5V_ENTRIP1
Close outcap CS2 CS1
PWR_3D3V_VOUT

3D3V_S5
Close outcap
VCLK
19 EA40-HW SC

PWR_5V_FB
1

PR4511

An
7 21
100KR2J-4-GP PGOOD GND
VREG3

VREG5

DY
net PWR_5V_VOUT1 , use 20mil
2
1

17 3V_5V_POK TPS51225CRUKR-1-GP
3

13

PR4502 5V_AUX_S5
B 6K8R2F-2-GP 3D3V_AUX_S5 B
1PWR_5V3D3V_VREG3

1PWR_5V3D3V_VREG5

R1 PG4522 PG4523

nie
1 2 1 2
2

1
GAP-CLOSE-PWR GAP-CLOSE-PWR PR4512
33KR2F-2-GP
R1
EA40-HW SB

2
1

PR4503
PC4509
SC4D7U6D3V3KX-L-GP

R2 10KR2F-L1-GP PC4508
SC10U10V5KX-L1-GP
2

2
2

1
CS
PR4513
21K5R2F-GP
Vout = 2 * ( 1 + R1/R2 )
Close to VFB Pin (pin5) = 2 * ( 1 + 6.8K / 10K) R2

2
= 3.36V

EA40-HW1 Close to VFB Pin (pin2)

5V OCP setting Vout = 2 * ( 1 + R1/R2 )

D
PR4514 = 2 * ( 1 +33K / 21K)
118KR2F-1-GP
36 3V_5V_EN 1 2 PWR_5V_ENTRIP1 = 5.14V
1

PC4127
1

SC18P50V2JN-1-GP
PR4117 DY
2

10KR2J-L-GP PQ4101
4 3 PWR_5V_ENTRIP1_C
2

PR4120
PWR_5V_EN 5 2 PWR_3D3V_EN 2 1 3V_5V_EN 36
6 1
A 10KR2J-L-GP A
1

PR4515 2N7002KDW-GP PC4108

121KR2F-L-GP 84.2N702.A3F
SC47P50V2JN-3GP

PWR_3D3V_ENTRIP2 1 2PWR_3D3V_ENTRIP2_C Wistron Confidential document, Anyone can not

2

2nd = 75.00601.07C Duplicate, Modify, Forward or any other purpose

application without get Wistron permission
EV

3D3V OCP setting Wistron Corporation

EA40-HW SB 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51225_5V/3D3V
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 45 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = CPU.Regulator

PWR_VCC_VREF

1
PR4601

2
NTC-100K-10-GP
modify schematic

1
PR4613 PR4615
D modify schematic D
2012-0814 PR4614

co
75R2F-2-GP

2
2012-0814 1MR2F-GP 8K87R2F-2-GP
PC4602 DY

1
SC4700P50V2KX-1GP

2
PR4602 1 2
13K3R2F-L1-GP
1 2

2
PR4612
PR4611

nfi
75KR2F-GP PR4616 PR4617 PR4618
1 2 1 2 150KR2F-L-GP 150KR2F-L-GP 150KR2F-L-GP
2 1 475KR2F-GP

1
PC4601
SC1000P50V3JN-GP-U
modify schematic
2012-0814

de
1 DY 75R2F-2-GP
2 PWR_VCC_B-RAMP
PR4603
PWR_VCC_F-Imax
3D3V_S0
PR4604 PR4619

PWR_VCC_THERM
PWR_VCC_O-USR

PWR_VCC_OCP-1
PWR_VCC_IMON
1 2PWR_VCC_SLEWA 1 2 IMVP_PWRGD

39KR2F-GP

nti
2KR2F-L1-GP
PR4605
DCBATOUT 2 1PWR_VCC_VBAT

10KR3F-L-GP
DY

16

15

14

13

12

11

10

9
PU4601 PR4631

al,
1 0R2J-L-GP
2

IMON

OCP-I

O-USR
VBAT

SLEWA

B-RAMP

F-IMAX
THERM
1.05VTT_PWRGD 7,36,37,48,86
PR4632
17 8 IMVP_VRON 1 0R2J-L-GP
2
47 PWR_VCC_CSP1 CSP1 VR_ON H_VR_EN 7
18 7 PWR_VCC_SKIP# 47
47 PWR_VCC_CSN1 CSN1 SKIP#
C 74.51622.A73 C
19 6 PWR_VCC_PWM1 47
PR4633 CSN2 TPS51622RSMR-1-GP PWM1
1 0R2J-L-GP
2 PWR_VCC_CSP2 20 5

r
3D3V_S5 CSP2 PWM2 PR4628
3D3V_S5 1 2 PWR_VCC_PU3 21 4 NC#4 1 0R2J-L-GP
2

efe
PR4630 0R2J-L-GP NC#21 MODE
DY
22 3 IMVP_PWRGD 7,17,26,36,86
NC#22 PGOOD
1 2 PWR_VCC_GFB 23 2 PWR_VCC_VDD
9 VSS_SENSE PR4610 0R2J-L-GP GFB VDD
1 2 PWR_VCC_VFB 24 1
7 VCC_SENSE PR4609 0R2J-L-GP VFB VDIO

VR_HOT#

ALERT#
DROOP

COMP

VREF

VCLK
GND

GND
V5A

PR4621

r
1R3F-GP
1 2
PR4221 = 1R
3D3V_S5
25

26

27

28

29

30

31

32

33

by
2012.0529 . wayler

1
PC4606
SC1U6D3V3KX-2GP
PWR_VCC_DROOP 1D05V_VTT

2
PC4607 SCD1U10V2KX-L1-GP
1 2
PC4603
1 2 PWR_VCC_COMP
SC100P50V2JN-L-GP PR4622

An
PR4606 1 110R2F-GP
2 H_CPU_SVIDDAT
PR4607
PWR_VCC_V5A

1 2 1 2 PWR_VCC_VREF
9K53R2F-GP PR4623
H_CPU_SVIDDAT 7 1 54D9R2F-L1-GP
2 H_CPU_SVIDCLK
10KR2F-L1-GP
EA40-HW SB
DY
2

VR_SVID_ALERT# 7 PR4624
B B
PC4604 2 75R2F-2-GP VR_SVID_ALERT#

nie
PR4620 1
1

1 2 PWR_VCC_D_C 1 2 H_CPU_SVIDCLK 7
SCD33U6D3V2KX-1-GP

PC4608 10KR2F-L1-GP Close to PU4601

H_PROCHOT# 4,24,44,86
SC1500P50V2KX-2GP
modify schematic
2012-0814 PR4608
1 2 5V_S5

CS
10R3F-GP
1

PC4605
SC1U10V3KX-L1-GP
2

EA40-HW SB

D
A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51622_CPUCORE(1/2)
Size Document Number Rev
C
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 46 of 102
5 4 3 2 1
 5 4 3 2 1

DCBATOUT PWR_DCBATOUT_VCCCORE1 EA40-HW SB

PG4701 PWR_DCBATOUT_VCCCORE1 PU4701 5V_S5 PC4704
1 2 SC2D2U10V3KX-L-GP
5 2 1 2
Mag . 10 x 10 x 4
VIN VDD
PT4701
GAP-CLOSE-PWR
PG4702
DCR 0.875 ~ 0.962 mOhm
1

1 2
46 PWR_VCC_SKIP#
1 2PWR_VCC_SKIP#1 1 SKIP# BOOT_R 6 PWR_VCC_BOOTR1
1 2VCC_BOOTR1_R
PC4705 TDC 35A , Isat : 68A
SE68U25VM-6-GP

2
PR4701 0R2J-L-GP SCD22U25V3KX-GP
GAP-CLOSE-PWR PR4702 2D2R2F-GP
2

PG4703 8 7 PWR_VCC_BOOT1 VCC_CORE

D 46 PWR_VCC_PWM1 PWM BOOT D
1 2 PL4701

co

PGND
GAP-CLOSE-PWR 3 4 PWR_VCC_VSW1 1 2
PG4704 PGND VSW
1 2
IND-D22UH-31-GP

1
CSD97374Q4M-GP-U

9
GAP-CLOSE-PWR PR4703

nfi
DY PG4705 2D2R2F-GP

2
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
1 2

PG4719

PG4720
DY

2
GAP-CLOSE-PWR

VCC_VSW1_GP
PG4706 VCC_VSW1_R

1
de
1 2

1
GAP-CLOSE-PWR PC4706
SC1500P50V2KX-2GP

2
PWR_DCBATOUT_VCCCORE1
DY

nti

1
PR4721
2K37R2F-GP
1

PC4701 PC4702 PC4703 EC4701

SCD1U50V3KX-L-GP

al,

2
C C
SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

PR4704
2

15K8R2F-GP
1 2

PR4706

r efe
1

PR4705
2K94R2F-GP

1
2VCC_CSN1_R
1 2

NTC-10K-26-GP

2
PWR_VCC_CSN1 46

r
PC4707
SCD15U10V2KX-GP PWR_VCC_CSP1 46

B by modify schematic
2012-0814
B

An
nie
CS EV
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

D
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51622_CPUCORE(2/2)
Size Document Number Rev
B
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 47 of 102
5 4 3 2 1
 5 4 3 2 1

1D05V_VTT 1D05V_PW R

PG4806
1 2

GAP-CLOSE-PW R
PG4807
SY8208D for 1D05V
1 2
DCBATOUT PW R_DCBATOUT_1D05V
PG4801 GAP-CLOSE-PW R
1 2 PG4808
D 1 2 D

co
GAP-CLOSE-PW R
PG4802 GAP-CLOSE-PW R
1 2 PG4809
1 2
GAP-CLOSE-PW R EC4801
PG4803 PT4801 GAP-CLOSE-PW R

nfi
1 2 PG4810

1
SE220U6D3VM-30-GP

SCD1U10V2KX-L1-GP
1 2
GAP-CLOSE-PW R
PG4804 DY GAP-CLOSE-PW R
2

2
1 2 PG4811
DY

de
1 2
GAP-CLOSE-PW R
GAP-CLOSE-PW R
PG4812
77.52271.09L 1 2
2ND = 77.52271.07L
GAP-CLOSE-PW R

EA40-HW SC

nti
C

PW R_DCBATOUT_1D05V
al,
EA40-HW SC C

EA40-HW SB

r efe
1

PC4804 PC4806 PC4807

Mag. R68 7*7*3
SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

Freq=360KHz Iomax = 6A
SCD01U50V2KX-L-GP

DCR: 5 ~ 5.5 mOhm

2

OCP >8A
PU4801
OCP setting Idc : 15.5 A , Isat : 25A

r
High 16A EA40-HW SC
PC4803 1D05V_PW R
PR4805 SCD1U25V3KX-L-GP
Float 12A 2D2R3F-L-GP
PL4801
EA40-HW SC

by
8 6 PW R_1D05V_BOOT 1 2 PW R_1D05V_BOOT_R 1 2 1 2
Low 8A IN BS
68.R681A.10A
PR4816 IND-D68UH-36-GP

1
3D3V_S0 2 1 10 PW R_1D05V_PHASE 2ND = 68.R6810.20J
LX

1
PC4811 PC4813 PC4814 PC4809

SCD1U50V3KX-L-GP
SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
2

2
An
1KR2F-L-GP PW R_1D05V_VFB
2 4

2
7,36,37,46,86 1.05VTT_PW RGD PG FB
PR4812 PR4804 1 2 PW R_1D05V_IMAX 3 7 PW R_1D05V_BYP PR4806 1 2 3D3V_S0
0R0402-PAD 0R2J-L-GP ILMT BYP 0R2J-L-GP
OCP setting

1
SC18P50V2JN-1-GP
1 2 PW R_1D05V_EN 1 PC4808
24,27,36,37,51 EC_PM_SLP_S3# EN PC4802
B DY B

SC1U6D3V2KX-L-1-GP
9 5 LDO_P5

nie

2
GND LDO

1
PC4815
R1
1

SC1U6D3V2KX-L-1-GP
PC4805

1
SY8208DQNC-GP-U PR4807
SC1KP50V2KX-L-1-GP

2
75KR2F-GP
2

74.08208.K73
2

2
PU4801 change to SY8208D
PW R_1D05V_VFB
EA40-HW SB

CS

1
EA40-HW SB PR4808
Vo=0.6x(1+R1/R2)
R2

100KR2F-L3-GP
=0.6x(1+75/100)
=1.05

2
modify schematic D EV
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DC to DC_1D05V(SY8208D)
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Friday, May 24, 2013 Sheet 48 of 102

5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Plane.Regulator_1p2v0p6v
DCBATOUT PWR_DCBATOUT_VDDQ
PG4901
1 2

GAP-CLOSE-PWR
PG4902
1 2

GAP-CLOSE-PWR
D PG4903 D

co
1 2
GAP-CLOSE-PWR

1
PG4904
2

GAP-CLOSE-PWR
RT8207L for VDDQ

nfi
EA40-HW SC
PR4904
5D1R2F-GP
PWR_VDDQ_VCC5 2 1 5V_S5

de

1
PC4903
OCP setting SC1U10V2KX-1GP PWR_DCBATOUT_VDDQ

2
1

1
PC4904

SC1KP50V2KX-L-1-GP
PR4911
PR4901 10K7R2F-GP PR4905 PC4914

nti
2

1
17,24 PM_SLP_S4# 1 0R2J-L-GP
2 PWR_VDDQ_EN 0R0603-PAD PC4911 PC4912 PC4913

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP
PWR_VDDQ_VDDP 1 2 5V_S5

SCD1U25V3KX-L-GP
2

2
1

1
PC4901
PC4905
SC47P50V2JN-3GP

SC1U10V2KX-1GP DY
2

2
PWR_VDDQ_CS

al,

5
6
7
8
D
D
D
D
3D3V_S5 PU4902
SIR172DP-T1-GE3-GP
PU4901 84.00172.037

1
PR4902 RT8207MZQW-GP-U 2nd = 84.08065.037
74.08207.C73

13

11

12
C C

G
S
S
S
10KR2F-L1-GP PC4906
PR4906 SCD1U25V3KX-L-GP CYNTEC. 0.68uH 7*7*3 IccMAX = 18.38A

CS

VDDP
VDD

4
3
2
1
2D2R3F-L-GP

r
Close to pin23 DCR= 5 ~ 5.5 mohm

2
BOOT 18 PWR_VDDQ_BOOT 1 2 PWR_VDDQ_PHASE_L 1 2 IccTDC = 12.86A
10 Idc=15.5A, Isat=25A

efe
51 RUNPWROK PGOOD OCP > 23.89A
PWR_DCBATOUT_VDDQ 1PR4903 2 PWR_VDDQ_TON 9 17 PWR_VDDQ_UGATE
620KR2F-GP TON UGATE
PWR_VDDQ_EN 8 1D35V_S3
20100728 S5 PL4901
PWR_VTT_EN 7 16 PWR_VDDQ_PHASE 1 2 EA40-HW SC
PG4905 S3 PHASE IND-D68UH-36-GP
1D35V_S3 1 2 PWR_VDDQ_VTTIN 19 68.R681A.10A
VLDOIN

5
6
7
8
2nd = 68.R6810.20J

D
D
D
D
1

GAP-CLOSE-PWR 15 PWR_VDDQ_LGATE PT4901

LGATE

1
PG4906 PC4902 PC4915 SE390U2D5VM-12-GP

SC1U16V3KX-5GP
SC10U6D3V5MX-L1-GP PU4903 77.53971.01L
1 2
DY
2

SIRA12DP-T1-GE3-GP 2nd = 79.3971V.6AL

by

2
GAP-CLOSE-PWR

G
1
VTTGND PGND
14 4 84.SRA12.037

S
S
S
2nd = 84.08062.037
PG4907

3
2
1
5 PWR_VDDQ_SENSE 2 1 1D35V_S3
VDDQ
20 6 PWR_VDDQ_FB GAP-CLOSE-PWR
Close to pin23 DDR_VREF_PWR VTT FB

1
2 PR4907
VTTSNS

VTTREF
40K2R2F-GP PC4907

An
SC18P50V2JN-1-GP
EA40-HW 1
Iomax=1A R1
GND

GND

2
2
OCP>1.5A
Close to output cap pin1, not
21

1
R2 PR4908 inside of the output cap
B PU4901 change to RT8207M 49K9R2F-L-GP
B

nie
Vout=0.75 x (1+R1/R2)
1PWR_VDDQ_VTTREF

=0.75 x ( 1+40/49.9)

2
PR4909
0R0402-PAD =1.35
1 2 DDR_VREF_S3 Vout setting

Close to PIN9
+0.675VS

CS
PC4908
SCD033U16V2KX-GP

Iomax: 1.2A
2

PG4908

D
0D675V_S0 1 2 DDR_VREF_PWR PR4910
12 DDR_PG_OUT 1 0R2J-L-GP
2 PWR_VTT_EN
GAP-CLOSE-PWR

PG4909
1 2

GAP-CLOSE-PWR
1

PC4909 PC4910
SC10U6D3V5MX-L1-GP

SC10U6D3V5MX-L1-GP
2

DY Wistron Confidential document, Anyone can not

A Duplicate, Modify, Forward or any other purpose A
application without get Wistron permission
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8207(VDDQ_VTT)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 49 of 102

5 4 3 2 1
 5 4 3 2 1

SYW232 for 1D8V_S0

co
D D

nfi
de
nti
C
al, C

r efe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

1D8V_S0 SYW232
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 50 of 102
5 4 3 2 1
 5 4 3 2 1

Check!! SYW232 for 1D5V_S0

3D3V_S5 PWR_1D5V_PVDD PWR_1D5V_PVDD
PG5101
1 2

GAP-CLOSE-PWR

co
D PG5102 D
1 2
Mag. 2D2uH 5.3 x 4.7 x 3

1
GAP-CLOSE-PWR PC5101 PC5102 PC5103
DCR=29 ~ 35mohm Iomax=3.2A

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC1U6D3V2KX-L-1-GP
nfi
PG5103 PU5101
1 2 Isat : 5.5 ~ 9 A OCP>5A

2
5 3 PWR_1D5V_PVDD
GAP-CLOSE-PWR NC#5 IN

de
1D5V_S0
8 1 PWR_1D5V_FB
SGND FB PL5101
2 PWR_1D5V_PG
PG PWR_1D5V_PHASE
4 PGND LX 6 1 2
9 7 PWR_1D5V_S0_EN IND-1UH-145-GP

nti
PGND EN CHIP IND 1UH VLS3015ET-1R0N

1
1D5V_Switch EA40-HW SB

1
SYW232DFC-GP
1D5V_Switch PR5104 PC5105
R1
al,

SC22P50V2JN-4GP
150KR2F-L-GP

2
3D3V_S0 1D5V_Switch

2
C C

1
PWR_1D5V_FB PC5106 PC5107

r
1

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
efe
PR5102 PR5101 1 2 PWR_1D5V_S0_EN
24,27,36,37,48 EC_PM_SLP_S3#

2
DY 100KR2J-4-GP 0R2J-L-GP 1D5V_Switch

1
PR5105
1D5V_PWR_EN

100KR2F-L3-GP
R21D5V_Switch
2

PC5104
SC22P50V2GN-GP

2
DY

2
PWR_1D5V_PG PR5103 1 2

by
RUNPWROK 49
0R2J-L-GP
1D5V_PWR_GOOD Close Pin1 1D5V_Switch
1D5V_Switch

Vo=0.6x(1+R1/R2)

An =0.6x(1+150/100)
=1.5

nie
B B

EA40-HW SC

CS
74.01339.B3F
PWR_1D5V_PVDD PU5102 1D5V_S0

1 VIN VOUT 5

D
2 VSS
3 4 Wistron Confidential document, Anyone can not
ON/OFF NC#4 Duplicate, Modify, Forward or any other purpose
PWR_1D5V_S0_EN application without get Wistron permission
EV
S-1339D15-M5001-GP
1

PR5106 1D5V_LDO
100KR2J-L-GP
Fix Vout=1D5V Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A DY Imax=300mA Taipei Hsien 221, Taiwan, R.O.C.
A
2

OCP = 400mA Title

1D5V_S0 SYW232
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 51 of 102
5 4 3 2 1
SSID = VIDEO
EA40-HW SB 3D3V_S0
LVDS1
31
1
DCBATOUT_LCD
INVERTER POWER DCBATOUT
2
3 DP_TXN1_CPU_C C5218 1 2SCD1U10V2KX-L1-GP F5201
DP_TXN1_CPU 8

1
4 DP_TXP1_CPU_C C5217 1 2SCD1U10V2KX-L1-GP 2 1
DP_TXP1_CPU 8
5 R5203 R5204

co
6 DP_TXN0_CPU_C C5207 1 2SCD1U10V2KX-L1-GP POLYSW -1D1A24V-GP-U 100KR2J-4-GP 100KR2J-4-GP
DP_TXN0_CPU 8

1
7 DP_TXP0_CPU_C C5206 1 2SCD1U10V2KX-L1-GP C5202 C5203 C5204 69.50007.A31 DY DY
DP_TXP0_CPU 8

SC4D7U25V5KX-L2-GP

SCD1U50V3KX-L-GP
2nd = 69.50007.A41

SC1KP50V2KX-L-1-GP
8

2
9 DP_AUXP_CPU_C C5201 1 2SCD1U10V2KX-L1-GP DP_AUXP_CPU 8

2
10 DP_AUXN_CPU_C C5205 1 2SCD1U10V2KX-L1-GP DP_AUXP_CPU_C
DP_AUXN_CPU 8
11 DP_AUXN_CPU_C

nfi
12 LCDVDD
13

1
14 LCD_Self_Test 1 TP5203
15 R5205 R5206
16 100KR2J-4-GP 100KR2J-4-GP
17 DP_HPD0_C DY DY

de
18

2
19
20
21
22 BLON_OUT_C
23 LCD_BRIGHTNESS 1 R5220 2 33R2J-L1-GP L_BKLT_CTRL 15
24

nti
25 DCBATOUT_LCD
26
27
28
29
30 Camera Power

al,
32 R5216
DP_HPD0_C 2 1KR2J-L2-GP
1 DP_HPD 15
ACES-CON30-18-GP-U EA40-HW SC
3D3V_S0 3D3V_CAMERA_S0

1
F5202 POLYSW -1D1A6V-9-GP
20.K0809.030 1 2 R5214
100KR2J-4-GP
69.48001.081

1
C5214
DP_HPD0_C 86

2
SC10U6D3V5MX-L1-GP
efe
BLON_OUT_C 86
LCD_BRIGHTNESS 86
2ND = 69.50011.081

2
DP_TXN1_CPU_C
DP_TXN1_CPU_C 86
DP_TXP1_CPU_C
DP_TXP1_CPU_C 86
DP_TXN0_CPU_C
DP_TXN0_CPU_C 86
DP_TXP0_CPU_C
DP_TXP0_CPU_C 86

r
DP_AUXP_CPU_C
DP_AUXP_CPU_C 86
DP_AUXN_CPU_C
DP_AUXN_CPU_C 86

by
EA40-HW SB
EA40-HW SB
R5210
2 1KR2J-L2-GP
1 BLON_OUT_C
24 BLON_OUT
MCCD1 LCDVDD 3D3V_S0
9 U5201

2
Layout 40 mil

1
1 1 5 R5211 C5213
15 LVDS_VDD_EN

An
EN VIN#5 100KR2J-4-GP SC100P50V2JN-L-GP
2
GND
2 3 4

2
USB_CAMERA_P VOUT VIN#4
3 1 R5225 2 0R0402-PAD USB_PP4 16

1
1
4 USB_CAMERA_N 1 R5224 2 0R0402-PAD USB_PN4 16

1
5 3D3V_CAMERA_S0 R5209 C5210 C5211 RT9724GB-GP C5212

SC56P50V2JN-2GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP
6 100KR2J-4-GP 74.09724.09F
7 INT_MIC_L_R 27,86 2ND = 74.03514.07F

2
nie
8 AUD_GND AUD_GND 27,86
2

10
ACES-CON8-13-GP-U1

20.F1295.008
2ND = 20.F2120.008

CS
EA40-HW SB R5207
3D3V_S0
Touch Conn. 1 2
DY 0R2J-L-GP LCDVDD
TOUCH1
R5208 5V_S0
9
1 Touch_PW R 1 2
0R2J-L-GP

D
2 USB_PN6 16 Touch
1

3 C5208 C5209
USB_PP6 16
SCD1U10V2KX-L1-GP

4 TC_G SC1U6D3V2KX-L-1-GP
5 Wistron Confidential document, Anyone can not Duplicate, Modify,
2

6 Forward or any other purpose application without get Wistron

TOUCH_EN 20,24
7 permission
TOUCH_DET# 20 EV
8
10

ETY-CON8-16-GP
Wistron Corporation
1

R5202 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

20.F1261.008 Taipei Hsien 221, Taiwan, R.O.C.
2ND = 20.F2191.008 0R3J-L1-GP
Touch Touch Title

LCD Connector
2

Size Document Number Rev

Custom
EA40_HW ULT 1
Date: Thursday, May 30, 2013 Sheet 52 of 102
 5 4 3 2 1

5V_CRT_S0 5V_HDMI
EA40-HW SC
5V_CRT_S0
DSUB1
CRT DDCDATA & DDCCLK level shift

1
D5301
CH551H-30PT-GP
9 VCC_CRT NC#4 4 83.R5003.C8F
NC#11 11 2ND = 83.R5003.H8H
3rd = 83.5R003.08F

2
1

C5302 CRT_DDCDATA_CON 12
CRT_DDCCLK_CON DDCDATA_ID1
15 DDCCLK_ID3
SCD01U50V2KX-L-GP

5
2

GND

3
4
CRT_R 1 6
CRT_G CRT_RED GND RN5301
D 2 7 D

co
CRT_B CRT_GREEN GND SRN10KJ-L-GP
3 CRT_BLUE GND 8
GND 10
CRT_VSYNC_CON 14 16
CRT_HSYNC_CON VSYNC GND
13 17

2
1
HSYNC GND CRT_DDCDATA_CON

nfi
EA40-HW SB D-SUB-15-187-GP CRT_DDCCLK_CON

20.21077.015 EA40-HW SC
2nd = 20.20492.015
3rd = 20.20929.015 DP_CRT_HSYNC_CON 1 R5301 2 33R2J-L1-GP CRT_HSYNC_CON

DP_CRT_R
de
1
L5301
2
68.00084.A71 CRT_R
DP_CRT_VSYNC_CON 1 R5302 2 33R2J-L1-GP CRT_VSYNC_CON

nti
CRT_DDCDATA_CON
BLM15BB470SN1D-2GP CRT_HSYNC_CON
CRT_VSYNC_CON
L5302

C5304
SC18P50V2JN-1-GP
68.00084.A71 CRT_DDCCLK_CON

C5305
SC18P50V2JN-1-GP
DP_CRT_G 1 2 CRT_G

1
C5303 C5306

al,
BLM15BB470SN1D-2GP

SC47P50V2JN-3GP

SC47P50V2JN-3GP
2

2
L5303
C DP_CRT_B
68.00084.A71 CRT_B C
1 2
1 R5303

1 R5304

1 R5305

C5301

C5307

C5308

C5309

C5310

C5311
r
BLM15BB470SN1D-2GP
1

1
efe
SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP
2

2
75R2F-2-GP 2

75R2F-2-GP 2

75R2F-2-GP 2

VBUCK_1D5V 1R5327 0R2J-L-GP

2 VDDD33_CORE 1R5323 2 DP_VDDD
CRT_S0 R5318 2 1
r
PTN3355 10KR2J-L-GP

by
EA40-HW SB
DP_VDDD
L5304
3D3V_S0
68.00084.B21
SCD1U10V2KX-L1-GP

0R2J-L-GP U_TDO DP_VDDD 2 1 EA40-HW SC

1
PTN3355 PTN3393 L5305 C5324 BLM15BD121SN1D-GP
1

C5331 CRT_S2 1 2 VBUCK_1D5V

1
SC47P50V2JN-3GP
IND-4D7UH-199-GP C5313 C5314 DP_27M_IN C5312 2 1

2
An

SC10U6D3V3MX-L-GP

SCD1U10V2KX-L1-GP
X5301
2

SC15P50V2JN-L-GP
PTN3355 0R2J-L-GP

2
CRT_S3 1R5324 2 1 4
R5309
PTN3355 1MR2J-L3-GP
B VDDA33_DP B
1R5321 2 DP_VDDD U5302 2 3

nie

1
1
SCD1U10V2KX-L1-GP

C5335 0R2J-L-GP 20120801

VDDD33_CORE 36 37 CRT_S0 R5306 2 1 DP_VDDD PTN3393
PTN3393 DP_VDDA VDDD33_CORE S0 CRT_S1 R5307 1
1 38 2 10KR2J-L-GP
PTN3355 DP_27M_OUT XTAL-27MHZ-137-GP C5315 2 1
2

VDDA33_AUX S1
1R5329 0R2J-L-GP
2 PCH_CRT_CLK 15
VDDA33_DP 14 VDDA33_DP S2 39 CRT_S2 0R2J-L-GP 1R5322 2 DP_VDD_DAC
DP_VDDD 21 40 CRT_S3 0R2J-L-GP SC15P50V2JN-L-GP
VDDD33_IO S3
PTN3355 2 1 C5325 DP_VDD_DAC 27 82.30034.A61
VDDA33_DAC PTN3393

1
PTN3393 SCD1U10V2KX-L1-GP DP_LDOCAP_AUX 2 C5323
LDOCAP_AUX

SCD1U10V2KX-L1-GP
20120725 LDOCAP_DIG 35 5 DP_RRX 2nd =
LDOCAP_DIG RRX

1
DP_PLT_RST# 1 3rd = 82.30034.921

CS
11 2

2
RESET# C5321 SC1U6D3V2KX-L-1-GP R5319
C5317
PTN3393
8
PCH_DPC_N0 1 2SCD1U10V2KX-L1-GP PCH_DPC_N0_U 7 ML0_N CLK_O 12 PTN3393 0R2J-L-GP
8
PCH_DPC_P0 C5316 1 2SCD1U10V2KX-L1-GP PCH_DPC_P0_U 6 33 DP_27M_IN CRT_PCH_HPD
ML0_P OSC_IN CRT_PCH_HPD 15
8
PCH_DPC_N1 C5319 1 2SCD1U10V2KX-L1-GP PCH_DPC_N1_U 10 34 DP_27M_OUT PTN3355

2
C5318 ML1_N OSC_OUT
8
PCH_DPC_P1 1 2SCD1U10V2KX-L1-GP PCH_DPC_P1_U 9 ML1_P
U_TCK R5331 2 1 10KR2J-L-GP DP_VDDD

1
C5322 1 2SCD1U10V2KX-L1-GP PCH_DPC_AUXN_U 4 U_TDO R5332 2 1 1MR2J-L3-GP
15 PCH_DPC_AUXN AUX_N
C5320 1 2SCD1U10V2KX-L1-GP PCH_DPC_AUXP_U 3 15 PTN3355 R5314
15 PCH_DPC_AUXP AUX_P TCK

D
PTN3355 13 16 100KR2J-4-GP
HPD TDO
1R5320 0R2J-L-GP
2 DP_VDDD CRT_PCH_HPD
TMS 17 PCH_CRT_DATA_C 1R5330 0R2J-L-GP
2 PCH_CRT_DATA 15
DP_VDDA
DP_CRT_B 26 18 PTN3355

2
DP_CRT_G BLU TRST#
28 GRN TDI 19

1
PTN3393 DP_CRT_R 31 C5332 C5327 C5328
RED

SCD1U10V2KX-L1-GP
DP_RRX 1 2 DP_LDOCAP_AUX R5315 1 2 DP_RSET 30 8 VBUCK_1D5V
RSET NC#8

SC2D2U10V3KX-L-GP
R5313 12KR2F-L-GP 1K2R2F-1-GP 23

2
NC#23
1

SC10U6D3V3MX-L-GP
DP_CRT_HSYNC_CON 25 29
HSYNC NC#29
1

EC5301 R5316 EA40-HW SB DP_CRT_VSYNC_CON 24 32 C5334 C5337 C5333 Wistron Confidential document, Anyone can not
VSYNC NC#32
1

SCD1U10V2KX-L1-GP

C5326 C5336 PTN3355 Duplicate, Modify, Forward or any other purpose

10KR2J-L-GP
SC47P50V2JN-3GP

application without get Wistron permission

SCD01U50V2KX-L-GP

SC2D2U10V3KX-L-GP

CRT_DDCCLK_CON 20 EV
2

2
SC1U6D3V2KX-L-1-GP

CRT_DDCDATA_CON SCL
A 22 41 A
2

SDA GND
SCD01U50V2KX-L-GP

PTN3355
PTN3393 LDOCAP_DIG 1R5326 0R2J-L-GP
2 VBUCK_1D5V PTN3393BS-GP Wistron Corporation
PTN3355 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SCD1U10V2KX-L1-GP

SC2D2U10V3KX-L-GP

Taipei Hsien 221, Taiwan, R.O.C.

71.03393.003
1

PTN3393 C5330 C5329

PTN3355 Title
1st = 3355_71.03355.003 CRT Board Connector
2

PTN3355
20120801 Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 53 of 102

5 4 3 2 1
 5 4 3 2 1

HDMI CONN
SSID = VIDEO HDMI Level Shifter & CONNECTOR HDMI1
22
20

HDMI_DATA2_R
UMA_Muxless : default setting used PS8101. if don't used PS8101 1

please change C5103~C5110 to 0 ohm resister 2

3 HDMI_DATA2_R#
4 HDMI_DATA1_R
D 5 D
6 HDMI_DATA1_R#
7 HDMI_DATA0_R

co
8
9 HDMI_DATA0_R#
10 HDMI_CLK_R
11
12 HDMI_CLK_R#
13
14

nfi
15 DDC_CLK_HDMI 5V_HDMI EA40-HW SC 5V_S0
16 DDC_DATA_HDMI
17 F5401
18 5V_HDMI 2 1
19 POLYSW-1D1A6V-9-GP

21

de
23 69.48001.081 3D3V_S0

HPD_HDMI_CON
SKT-HDMI23-91-GP 2ND = 69.50011.081

22.10296.961

nti
Q5401
EA40-HW SC MMBT3904-4-GP

C
R5402 84.T3904.C11
1 150KR2J-L1-GP
2 HDMI_HPD_B B 2ND = 84.03904.P11
3rd = 84.03904.L06
C C

E
al,

1
R5403
20KR2F-L3-GP
DY R5404
HDMI_HPD_E 1 0R2J-L-GP
2 HDMI_PCH_DET 15

1
r
R5405
10KR2J-L-GP

efe

2
C5401 1 2 SCD1U10V2KX-L1-GP HDMI_CLK_R#
8 DDBP_DATA3#
C5402 1 2 SCD1U10V2KX-L1-GP HDMI_CLK_R
8 DDBP_DATA3

r
C5403 1 2 SCD1U10V2KX-L1-GP HDMI_DATA0_R#
8 DDBP_DATA0#
C5404 1 2 SCD1U10V2KX-L1-GP HDMI_DATA0_R D5401
8 DDBP_DATA0 5V_S0
BAW56-5-GP

by
5V_DDC_HDMI1 1

3
C5405 1 2 SCD1U10V2KX-L1-GP HDMI_DATA1_R#
8 DDBP_DATA1# 3D3V_S0
C5406 1 2 SCD1U10V2KX-L1-GP HDMI_DATA1_R 5V_DDC_HDMI2 2
8 DDBP_DATA1
B B
C5407 1 2 SCD1U10V2KX-L1-GP HDMI_DATA2_R# 83.00056.Q11
8 DDBP_DATA2#
C5408 1 2 SCD1U10V2KX-L1-GP HDMI_DATA2_R 2nd = 83.00056.G11
8 DDBP_DATA2

4
3
An
RN5401
Close to HDMI Connector SRN2K2J-5-GP

1 R5406 2 470R2F-GP 1 R5407 2 470R2F-GP

1
2
1 R5408 2 470R2F-GP 1 R5409 2 470R2F-GP
1 R5410 2 470R2F-GP 1 R5411 2 470R2F-GP
R5412 470R2F-GP R5413 470R2F-GP Q5403

nie
1 2 1 2
4 3 DDC_CLK_HDMI
15 PCH_HDMI_CLK
EA40-HW -1 DDC_DATA_HDMI
15 PCH_HDMI_DATA
5 2

6 1

EC5407 2N7002KDW-GP
84.2N702.A3F
HDMI_PLL_GND 2nd = 75.00601.07C
1
SCD1U10V2KX-L1-GP

3rd = 84.2N702.F3F
Close to Level Shift

CS
2

DY
D

5V_S0 Wistron Confidential document, Anyone can not

Q5402 Duplicate, Modify, Forward or any other purpose
2N7002K-2-GP application without get Wistron permission
EV
A 84.2N702.J31 A

D
2ND = 84.2N702.031
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
G

Taipei Hsien 221, Taiwan, R.O.C.

Title

HDMI Level Shifter/Connector

Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 54 of 102

5 4 3 2 1
 5 4 3 2 1

D D

co
nfi
de
nti
C
al, C

refe
r by
B An B

nie
CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Display Port
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 55 of 102
5 4 3 2 1
 SSID = SATA SATA HDD Connector
DY
R5602
0R2J-L-GP
1 2 HDD_DSLP_R
20 HDD_DSLP

HDD1
EA40-HW SB 22 21
5V_HDD_S0 1 NP1

co
5V_S5 U5602 5V_HDD_S0
2
1 GND OUT#8 8 3

2
2 7 C5605 C5606 4
IN#2 OUT#7

SCD1U10V2KX-L1-GP
SC10U10V5KX-L1-GP
3 IN#3 OUT#6 6 5

1
C5612 4 5 C5613 C5611 6

1
1

EN/EN# OCB

nfi

SCD1U10V2KX-L1-GP
7

SC10U10V3MX-GP
SC1U10V3KX-L1-GP 8

2
SY6288C4CAC-GP 9
2

10
11
74.06288.C79 12

de
13
2nd = 74.02001.A79 14
24 HDD_PW R_EN 19 SATA_TXP0
SCD01U50V2KX-L-GP 1 2 C5601 SATA_TXP0_C 15
SCD01U50V2KX-L-GP 1 2 C5602 SATA_TXN0_C 16
19 SATA_TXN0
17
SCD01U50V2KX-L-GP 1 2 C5603 SATA_RXN0_C 18
19 SATA_RXN0
2

SCD01U50V2KX-L-GP 1 2 C5604 SATA_RXP0_C 19

nti
19 SATA_RXP0
R5601 20 NP2
100KR2J-4-GP 24 23
AC coupling caps near connector<100 mils
EA40-HW SB FOX-CON20-1-GP-U1
1

20.F1546.020
2nd = 20.F1473.020

al,
3rd = 20.F2307.020

r
SATA Zero Power ODD
ODD Connector
efe Need to confirm
74.06288.079 100 mil
ODD_PW R_5V

r
20 SATA_ODD_PW RGT
ZPO
3D3V_S0 SY6288CCAC-GP

by
5V_S0
EA40-HW SC RN5601 4 5
SATA_ODD_PW RGT EN/EN# OCB
1 4 3 IN#3 OUT#6 6
2 3 SATA_ODD_DA# 2 7
ODD1 IN#2 OUT#7
1 8
GND OUT#8

1
R5605 R5606 SRN10KJ-L-GP TC5601

1
1 0R5J-5-GP SATA_ODD_DA#_C 2 TC5605

SC10U10V5KX-L1-GP
5V_S0 2 P2 P4 1 SATA_ODD_DA# 20

An
ODD_PW R_5V +5V MD 0R2J-L-GP U5601
NONZPO

SC10U10V5KX-L1-GP
P3 P1 SATA_ODD_PRSNT# 19
ZPO

2
+5V DP
NONZPO Current

2
S1
SCD01U50V2KX-L-GP 1 GND
2 C5607 SATA_TXN2_C S3 S4
19 SATA_TXN2
SCD01U50V2KX-L-GP 1 2 C5608 SATA_TXP2_C S2
A- GND
S7 EA40-HW SB limit Active
19 SATA_TXP2

1
A+ GND
GND P5 DY 3D3V_S0 High EA40-HW SB
P6 10KR2J-L-GP
GND

nie
SCD01U50V2KX-L-GP 1 2 C5609 SATA_RX2N_C
19 SATA_RXN2
SCD01U50V2KX-L-GP 1 2 C5610 SATA_RX2P_C
S5
S6
B- GND 14
15 R5608 MIN
19 SATA_RXP2 B+ GND
=>2.01A
2

1
ZPO

10KR2J-L-GP
AC coupling caps near connector<100 mils NP1
NP1 R5609 ZPO
NP2
NP2
EA40-HW SB ZPO
SKT-SATA7P-6P-126-GP

2
22.10300.I31

CS
SATA_ODD_DA#_C

ODD_PWRGT#
2nd = 22.10300.H91

D
6

4
Q5601 Wistron Confidential document, Anyone can not
ZPO 2N7002KDW -GP Duplicate, Modify, Forward or any other purpose
84.2N702.A3F application without get Wistron permission
EV
2nd = 75.00601.07C

3
3rd = 84.2N702.F3F
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SATA_ODD_PW RGT SATA_ODD_DA#
20 SATA_ODD_PW RGT
Title

HDD / ODD / NGFF_SSD

Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 56 of 102
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

E-SATA
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 57 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = Wireless
EA40-HW SB
Mini Card Connector(802.11a/b/g/n) Q5802
DMP2130L-7-GP
5V_S5

1D5V_S0 R5816 S
1 21D5V_W LAN +5V_MINI_DEBUG D
0R2J-L-GP

G
84.02130.031

1
3D3V_IOAC EA40-HW SB
1D5V_Switch

G
R5802
W LAN1 2 R5813 1 100KR2J-4-GP
DY
D 53 10KR2F-L1-GP R5804 D

2
co
NP1 W LAN_RST# 1 2
R5801 0R2J-L-GP PLT_RST# 17,24,30,36,65,73,86,88
IOAC
1 W LAN_PCIE_W AKE#_C 0R2J-L-GP
1 2 1 R5805 2 DEBUG_DET#
W LAN_PCIE_W AKE# 24 W LAN_PERST# 24
2
0R2J-L-GP
3 1 R5809 2 Q5803

nfi
PCIE_W AKE# 17,24,30

1
4 DY EC5802 G
5 0R2J-L-GP

SC47P50V2JN-3GP
6 24 BLUETOOTH_EN D

2
7 CLK_PCIE_W LAN_REQ# 18
8 S +5V_MINI_DEBUG

de
9
10 2N7002K-2-GP
Debug Card Circuit
11 CLK_PCIE_W LAN# 18 84.2N702.J31
12 2nd = 84.2N702.031
13 CLK_PCIE_W LAN 18
14
15

nti
16
17 E51_RXD_R R5807 0R2J-L-GP
1 2 E51_RXD 24
18
19 E51_TXD_R R5806 0R2J-L-GP
1 2 E51_TXD 24
20 W IFI_RF_EN_R R5814 2 1KR2J-L2-GP
1 W IFI_RF_EN 24

al,
21
22 W LAN_RST#
23 PCIE_RXN3 16
24
25 PCIE_RXP3 16
C C
26
27
28

r
29
30 3D3V_S0 3D3V_IOAC

efe
31 PCIE_TXN3 16
32 DEBUG_DET# 3D3V_S5
DEBUG_DET# 61
33 PCIE_TXP3 16 R5803 non-IOAC
34
35 EA40-HW SB 1 2
36 USB_PN5 16
37 C5806 0R2J-L-GP

SC1U6D3V2KX-L-1-GP
r
38 USB_PP5 16

1
39
40
41 EA40-HW SB DY IOAC

by

2
42 W MAX_LED#_C 2 R5808 1 0R2J-L-GP U5801
43 IOAC
44 W LAN_LED#_R_1 2 R5815 1 0R2J-L-GP 1 8
W LAN_LED# 61 GND OUT#8
45 2 R5810 1 2 IN#2 OUT#7 7
46 AP_DET# 24 EA40-HW SB 3 IN#3 OUT#6 6

1
47 10KR2F-L1-GP 24 W LAN_PW R_EN# 4 5
R5811 EN/EN# OCB
48

An
1

49 10KR2F-L1-GP
50 R5812 SY6288DCAC-GP
51 +5V_MINI_DEBUG 10KR2F-L1-GP 74.06288.A79
+5V_MINI_DEBUG 61
2
52 DY 2nd = 74.02301.079
NP2 3D3V_IOAC
2

B 54 B

SKT-MINI52P-149-GP-U

62.10043.I31
2nd = 62.10043.I51

3rd = 62.10043.K81 W IFI_RF_EN_R

nie 3D3V_IOAC
EA40-HW SB
1D5V_S0
EA40-HW SB

CS C5805

1
1

SC1U6D3V2KX-L-1-GP
EC5801

1
C5802 C5803 C5804

2
SC47P50V2JN-3GP

SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

SCD1U16V2KX-L-GP
2

2
A
D EV
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINICARD(WLAN)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 58 of 102

5 4 3 2 1
 5 4 3 2 1

SSID = Wireless Mini Card Connector(mSATA)

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

WWAN CONN
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 59 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = mSATA
Mini Card Connector(mSATA)

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

mSATA Connector
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 60 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = User.Interface
WLAN_LED
PLED1

STDBY_LED#_R 2

1 5V_S5

3
FRONT_PW RLED#_R
From module
D
Power button LED STDBY_LED#_Q 1 R6101 2 360R2F-GP D

co
FRONT_PW RLED#_Q 1 R6102 2 100R2F-L1-GP-U LED-BO-22-GP
CHARGE_LED#_Q 1 R6103 2 360R2F-GP 83.00326.M70 2nd = 83.01212.A70 W LAN_LED# 58
DC_BATFULL#_Q 1 R6104 2 100R2F-L1-GP-U
CHLED1

Q6101 CHARGE_LED#_R 2 5V_AUX_S5

nfi
3 FRONT_PW RLED#_Q
1 R1 EA40-HW -1 1
24 PW RLED
2
R2 DC_BATFULL#_R 3
LTC043ZUB-FS8-GP
84.00043.011

de

D
2nd = 84.00143.D1K LED-BO-22-GP
83.00326.M70 2nd = 83.01212.A70
Q6107

Power STDBY_LED FRONT_PW RLED#_Q 1 R6107 2300R2F-GP FRONT_PW RLED#_EA K

PW LED1
ZENER DIODI

A
2N7002K-2-GP
84.2N702.J31

nti
5V_S5
- +
LED DICE 2ND = 84.2N702.031

G
S
Q6103 LED-B-159-GP
3 STDBY_LED#_Q
1 R1
24 STDBY_LED 83.00193.N70

al,
2 W LAN_TEST_LED 24
R2
LTC043ZUB-FS8-GP
84.00043.011
2nd = 83.19117.070 for factory test
C
2nd = 84.00143.D1K C

Battery LED2(DC_BATFULL)
19

rSATA_LED#

Q6105

efe SATA HDD LED

HLED1 PW 1

5
3D3V_S0 ZENER SW -TACT-130-GP-U
R2
Q6104 2 KBC_PW RBTN# 2 1
24,27,86 KBC_PW RBTN#
3 DC_BATFULL#_Q 1

r
R1 R1
1 3 SATA_LED#_1 1 R6105 2 MEDIA_LED#_R K A 5V_S0
24 DC_BATFULL 390R2F-2GP
2
R2 4 3
LTC043ZUB-FS8-GP LTC043ZUB-FS8-GP

by
84.00043.011 2nd = 84.00143.D1K

6
2nd = 84.00143.D1K LED-B-162-GP
84.00043.011
Battery LED1(CHARGE) 83.00320.B70
2nd = 83.01211.070
EA40-HW -1

An
3D3V_IOAC

Q6106
CHARGE_LED#_Q
62.40009.731
3
R1
24 CHARGE_LED 1
W LAN_LED#
RFLED1 2nd = 62.40089.441
2 1 R6106 2 W LAN_LED#_R K A
B R2 100R2F-L1-GP-U ORANGE
B

nie
LTC043ZUB-FS8-GP LED-O-36-GP-U
84.00043.011
2nd = 84.00143.D1K 83.00270.D70

CS
D EV
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LED Bard/Power Button

Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 61 of 102

5 4 3 2 1
 5 4 3 2 1

SSID = KBC 3D3V_S0

86
86
TP_DATA
TP_CLK

SWR EA40-HW 1M
TOUCH PAD TOUCH PAD

1
2
SWL 3D3V_S0
RN6203 EA40-HW 1

co
D D
SRN4K7J-8-GP

EC6202 20.K0665.006

1
SC56P50V2JN-2GP

4
3
TPAD1

nfi
SWR1 SWL1 7

2
1 2 1 2
RN6202 1
5 5 20120816 SRN33J-5-GP-U

de
1 4 TP_CLK 2
24 TPCLK
3 4 3 4 2 3 TP_DATA 3
24 TPDATA
4
SW-TACT-5P-16-GP SW-TACT-5P-16-GP SWR 5
86 SWR

EC6201

EC6203
62.40089.411 62.40089.411 SWL 6
86 SWL

1
nti 8

2
SC47P50V2JN-3GP

SC47P50V2JN-3GP
EA40-HW SC ETY-CON6-22-GP

C
al, C

r
EA40-HW SB

efe ACES-CON4-50-GP
5V_S0

r
EA40-HW SB
6

by
4
Internal KeyBoard 3
2
KB_BL_DET_R
R6204
1 2
Connector KB_BL_DET 24

1
1 KB_LED_PWM_D 100KR2J-4-GP
C6201

An
5 DY

2
1

SCD1U25V2KX-L-GP
ELKB1 R6202
200KR2F-L-GP
20.K0615.026
B 2nd = 20.K0449.026 B

nie
20.K0722.004
27

28

2
KB1
2nd = 20.K0397.004
ACES-CON26-13-GP-U

D
DY
1

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

Q6201
R6203 DMN3052L-7-GP
24 KB_BL_PWM 1 2KB_BL_PWM_R G

CS
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7

C6202
SCD1U10V2KX-L1-GP
0R2J-L-GP

S
1
DY EA40-HW SB
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL0

KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9

DY

D
KROW[0..7] 24,86

2
KCOL[0..17] 24,86 Wistron Confidential document, Anyone can not
DY
Duplicate, Modify, Forward or any other purpose
MB PIN DEFINE 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 application without get Wistron permission
EV
KB PIN DEFINE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

A Wistron Corporation A

26 K/B 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad

Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 62 of 102
5 4 3 2 1
 5 4 3 2 1

EA40-HW SC
5V_USB
DCBATOUT

co
D D
PTWO-CON14-1-GP-U1
16
1

1
EC6301 EC6302 EC6303 EC6304 EC6305 EC6306 EC6307 EC6308 EC6309 14
SCD1U50V3KX-L-GP

SCD1U50V3KX-L-GP

SCD1U50V3KX-L-GP

SCD1U50V3KX-L-GP

SCD1U50V3KX-L-GP

SCD1U50V3KX-L-GP

SCD1U50V3KX-L-GP

SCD1U50V3KX-L-GP

SCD1U50V3KX-L-GP
13

nfi
12
2

2
11
10
9
8 USB_PN0 16,86

de
7 USB_PP0 16,86
6
5 USB_PN2 16,86
4 USB_PP2 16,86
3

nti
2

1
15 EA40-HW SB

al,
USBBD1

20.K0426.014
C C

EA40-HW SC

r efe Low Active 2A

r
5V_USB
5V_S5 U6301

by
1 GND OUT#8 8
2 IN#2 OUT#7 7
3 IN#3 OUT#6 6

C6302
SCD1U16V2KX-L-GP
4 EN/EN# OCB 5

1
C6303
C6301

SC10U10V5KX-L1-GP
An
SC1U10V3KX-L1-GP SY6288DCAC-GP

2
74.06288.A79
2nd = 74.02301.079
B B
3rd =

nie
24,34 USB_PWR_EN#
EA40-HW SB
4th =
DY

CS
EV D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board Connector
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 63 of 102

5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
al,
3D3V_AUX_S5

C C

1
efe
C6401
SCD1U10V2KX-L1-GP

2
LID1

r
24 LID_CLOSE#_1 1 VDD
3

by
R6401 GND
1 100R2J-L-GP
2 LID_CLOSE#_1 2
24 LID_CLOSE# VOUT
APX9132HAI-TRG-GP
74.09132.C7B

An
C6402

2nd = 74.05712.0BB
1

3rd = 74.01810.0BB
2

nie
B B
SC47P50V2JN-3GP

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Hall Sensor
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 64 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de 3D3V_S0

DB1

nti 18,24,88 LPC_AD0

18,24,88 LPC_AD1
1
2
3
4

al,
18,24,88 LPC_AD2
18,24,88 LPC_AD3 5
18,24,88 LPC_FRAME# 6
17,24,30,36,58,73,86,88 PLT_RST# 7
C 8 C
9

r
18 CLK_PCI_LPC
10

efe
11
12

MLX-CON10-7-GP
20.D0183.110

r LAB

by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Dubug connector
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 65 of 102
5 4 3 2 1
 5 4 3 2 1

D D

co
nfi
de
nti
C

al, C

refe(Blanking)

r by
B An B

nie
CS
EV
D Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SENSOR HUB
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 66 of 102

5 4 3 2 1
 5 4 3 2 1

Free Fall Sensor
Note
- no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
- solder stencil opening to 90% of the PCB pad size

co
D D
- mount the sensor near the center of mass of the NB as possible as you can

nfi
de
nti
C
al, C

r efe
r by
B An B

nie
CS
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
SDO="H"; address="3Ah"
*SDO="L"; address="38h"
EV

D
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
A
*CS="H"; mode="I2C" A

CS="L"; mode="SPI" Title

G Sensor
Size Document Number Rev
A
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 67 of 102
5 4 3 2 1
 5 4 3 2 1

D D

co
nfi
de
nti
al,
C C

refe
B
r by B

An
nie
CS Wistron Confidential document, Anyone can not

D
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (1/5)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 68 of 102

5 4 3 2 1
 5 4 3 2 1

D D

co
nfi
de
nti
al,
C C

refe
B
r by B

An
nie
CS Wistron Confidential document, Anyone can not

D
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (2/5)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 69 of 102

5 4 3 2 1
 5 4 3 2 1

D D

co
nfi
de
nti
al,
C C

refe
B
r by B

An
nie
CS Wistron Confidential document, Anyone can not

D
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (3/5)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 70 of 102

5 4 3 2 1
 5 4 3 2 1

D D

co
nfi
de
nti
al,
C C

refe
B
r by B

An
nie
CS Wistron Confidential document, Anyone can not

D
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (4/5)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 71 of 102

5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (5/5)
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 72 of 102
5 4 3 2 1
 5 4 3 2 1

1D05V_VGA_S0

C7334
SC4D7U6D3V3KX-L-GP
Muxless

C7361
SC1U6D3V2KX-L-1-GP
Muxless
1

1
C7374 C7373

SC10U6D3V3MX-L-GP
Muxless

SC10U6D3V3MX-L-GP
Muxless
3D3V_VGA_S0
VGA1A 1 OF 17

2
1
1/17 PCI_EXPRESS
3D3V_VGA_S0
R7302
Muxless 10KR2J-L-GP GK107/GF108

Muxless GK208/GF117

G AJ11 NC

2
D PEX_WAKE# D
AG19
VGA_RST# PEX_IOVDD_1
D 84.2N702.J31 AJ12 AG21

co
18 PEG_CLKREQ# PEX_RST# PEX_IOVDD_2
2ND = 84.2N702.031 PEX_IOVDD_3
AG22
S PEG_CLKREQ#_1 AK12 AG24
PEX_CLKREQ# PEX_IOVDD_4
AH21
Q7301 PEX_IOVDD_5
18 CLK_PCIE_VGA AL13 AH25
2N7002K-2-GP PEX_REFCLK PEX_IOVDD_6
18 CLK_PCIE_VGA# AK13
PEX_REFCLK# 20120816
C7301 1 2 SCD1U10V2KX-L1-GP PEG_C_RXP0 AK14
16 PEG_RXP0 PEX_TX0

nfi
C7302 1 2 SCD1U10V2KX-L1-GP PEG_C_RXN0 AJ14
16 PEG_RXN0 PEX_TX0# 1D05V_VGA_S0
Muxless
16 PEG_TXP0 Muxless AN12
PEX_RX0 EA40-HW SB
16 PEG_TXN0 AM12 AG13
PEX_RX0# PEX_IOVDDQ_1
AG15
C7303 PEG_C_RXP1 PEX_IOVDDQ_2
16 PEG_RXP1 1 2 SCD1U10V2KX-L1-GP AH14 AG16
C7304 PEX_TX1 PEX_IOVDDQ_3
16 PEG_RXN1 1 2 SCD1U10V2KX-L1-GP PEG_C_RXN1 AG14 AG18
PEX_TX1# PEX_IOVDDQ_4

C7333
SC4D7U6D3V3KX-L-GP
Muxless

C7360
SC1U6D3V2KX-L-1-GP
Muxless
Muxless AG25

de

1
PEX_IOVDDQ_5 C7371 C7372
16 PEG_TXP1 Muxless AN14
PEX_RX1 PEX_IOVDDQ_6
AH15

SC10U6D3V3MX-L-GP
Muxless

SC10U6D3V3MX-L-GP

Muxless
16 PEG_TXN1 AM14 AH18
PEX_RX1# PEX_IOVDDQ_7
AH26

2
C7305 PEX_IOVDDQ_8
16 PEG_RXP2 1 2 SCD1U10V2KX-L1-GP PEG_C_RXP2 AK15 AH27
C7306 PEG_C_RXN2 PEX_TX2 PEX_IOVDDQ_9
16 PEG_RXN2 1 2 SCD1U10V2KX-L1-GP AJ15 AJ27
PEX_TX2# PEX_IOVDDQ_10
Muxless PEX_IOVDDQ_11
AK27
16 PEG_TXP2 Muxless AP14
PEX_RX2 PEX_IOVDDQ_12
AL27
AP15 AM28

nti
16 PEG_TXN2 PEX_RX2# PEX_IOVDDQ_13
AN28
C7307 PEG_C_RXP3 PEX_IOVDDQ_14
16 PEG_RXP3 1 2 SCD1U10V2KX-L1-GP AL16
C7308 PEG_C_RXN3 PEX_TX3
16 PEG_RXN3 1 2 SCD1U10V2KX-L1-GP AK16
PEX_TX3#
Muxless
16 PEG_TXP3 Muxless AN15
PEX_RX3
16 PEG_TXN3 AM15
PEX_RX3#

al,
AK17
PEX_TX4
AJ17
PEX_TX4#
AN17
C PEX_RX4 C
AM17
PEX_RX4#
AH17
3D3V_VGA_S0 PEX_TX5 GF108 GK208/GK107/GF117
AG17
PEX_TX5#
NC AH12 3D3V_VGA_S0
PEX_PLL_HVDD
U7301 AP17

r
PEX_RX5

C7367
SCD1U10V2KX-L1-GP
Muxless

C7366
SC4D7U6D3V3KX-L-GP
Muxless
15 DGPU_HOLD_RST# 1 AP18 AG12
B PEX_RX5# PEX_SVDD_3V3
5

efe
VCC
17,24,30,36,58,65,86,88 PLT_RST# 2 AK18
A PEX_TX6

1
DY 4 VGA_RST# AJ18
Y PEX_TX6#
3
GND
AN18

2
74LVC1G08GW-1-GP PEX_RX6
AM18
PEX_RX6#
73.01G08.L04
AL19
PEX_TX7
AK19
PEX_TX7#
AN20

r
PEX_RX7
AM20
PEX_RX7#
3D3V_VGA_S0 AK20
PEX_TX8
AJ20
PEX_TX8#

by
L4 NVVDD_SENSE 82
VDD_SENSE
AP20
PEX_RX8
1

AP21
R7303 PEX_RX8#
L5 NVGND_SENSE 82
10KR2J-L-GP GND_SENSE
AH20
PEX_TX9
DY AG20
PEX_TX9#
2

AN21
VGA_RST# PEX_RX9
15 DGPU_HOLD_RST# 1 R7361 2 AM21
PEX_RX9#

An
0R2J-L-GP AK21
PEX_TX10
Muxless AJ21
PEX_TX10#
P8
NC_3V3AUX
AN23
B PEX_RX10 B
AM23
PEX_RX10#
AL22
PEX_TX11
AK22
PEX_TX11#

nie
AP23 DY 200R2F-L1-GP
PEX_RX11
AP24
PEX_RX11# VGAPEX_AJ26
AJ26 1 R7304 2
PEX_TSTCLK_OUT VGAPEX_AK26
AK23 AK26
PEX LANES 8 TO 15 NC FOR GF117/GK208

PEX_TX12 PEX_TSTCLK_OUT#
AJ23
PEX_TX12#
AN24
PEX_RX12
AM24
PEX_RX12# 1D05V_VGA_S0
AH23
PEX_TX13
AG23 AG26

CS
PEX_TX13# PEX_PLLVDD
AN26
PEX_RX13

C7369
SCD1U10V2KX-L1-GP
Muxless

C7368
SC4D7U6D3V3KX-L-GP
Muxless

C7370
SC1U6D3V2KX-L-1-GP
Muxless
AM26

1
PEX_RX13#
AK24
PEX_TX14
AJ24 AK11 TESTMODE 1 R7307 2

2
PEX_TX14# TESTMODE 10KR2J-L-GP
AP26
PEX_RX14
Muxless
AP27
PEX_RX14#

D
AL25
PEX_TX15
AK25 R7305
PEX_TX15#
AN27 AP29 PEX_TERMP 1 2
PEX_RX15 PEX_TERMP 2K49R2F-2-L-GP
AM27
PEX_RX15#
Muxless
N14P-GS-A1-GP

A 71.0N14P.00U Muxless A
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU(PEG)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 73 of 102
5 4 3 2 1
 5 4 3 2 1

VGA1J 10 OF 17
5/17 IFPAB
ALL PINS NC FOR GF117

DP(GK208) LVDS

DPA_L3 AN6 VGA1K 11 OF 17

IFPA_TXC#
DPA_L3 AM6 6/17 IFPC
IFPA_TXC
AJ8
IFPAB_RSET
D ALL PINS NC FOR GF117 D

co
DPA_L2 IFPA_TXD0# AN3
DPA_L2 IFPA_TXD0 AP3
AF8 IFPC_RSET
IFPAB_PLLVDD AH8 DVI/HDMI DP
IFPAB_PLLVDD
DPA_L1 IFPA_TXD1# AM5
DPA_L1 IFPA_TXD1 AN5
1

IFPC_PLLVDD AF7 I2CW_SDA AG2

IFPC_PLLVDD IFPC_AUX_I2CW_SDA#

nfi
R7413 I2CW_SCL AG3
10KR2J-L-GP IFPC_AUX_I2CW_SCL
DPA_L0 AK6
IFPA_TXD2#

1
DY DPA_L0 AL6 R7415
IFPA_TXD2 10KR2J-L-GP
TXC AG4
2

IFPC_L3#
DY TXC IFPC_L3 AG5
AH6
IFPA_TXD3#
AJ6 AH4
LVDS

2
IFPA_TXD3 TXD0 IFPC_L2#

de
IFPC TXD0 IFPC_L2
AH3

DPB_L3 AH9 TXD1 AJ2

IFPB_TXC# IFPC_L1#
DPB_L3 AJ9 TXD1 AJ3

IFPAB_IOVDD AG8
IFPA_IOVDD
IFPB_TXC
HDMI TXD2
IFPC_L1

IFPC_L0#
AJ1
DPB_L2 IFPB_TXD4# AP5 TXD2 IFPC_L0 AK1

nti
AG9 IFPB_IOVDD DPB_L2 IFPB_TXD4 AP6

DPB_L1 AL7 IFPC_IOVDD AF6 P2

IFPB_TXD5# IFPC_IOVDD GPIO15
1

DPB_L1 AM7
R7412 IFPB_TXD5

1
10KR2J-L-GP R7411 N14P-GS-A1-GP

al,
DY DPB_L0 AM8 10KR2J-L-GP
IFPB_TXD6#
DPB_L0 AN8 DY 71.0N14P.00U Muxless
2

IFPB_TXD6

2
AL8
IFPB_TXD7#
IFPB_TXD7 AK8
C C

IFPAB
N14P-GS-A1-GP

71.0N14P.00U Muxless
GPIO14
N4

r efe
r
VGA1M 13 OF 17
8/17 IFPEF

by
ALL PINS NC FOR GF117
VGA1L 12 OF 17
7/17 IFPD
DVI-DL DVI-SL/HDMI DP

ALL PINS NC FOR GF117

I2CY_SDA I2CY_SDA IFPE_AUX_I2CY_SDA# AB4

An
I2CY_SCL I2CY_SCL IFPE_AUX_I2CY_SCL AB3 AN2 IFPD_RSET
IFPEF_PLLVDD AB8 DVI/HDMI DP
IFPEF_PLLVDD
1

R7414 AC5
10KR2J-L-GP TXC TXC IFPE_L3#
AD6 AC4 IFPD_PLLVDD AG7 I2CX_SDA AK2
IFPEF_RSET TXC TXC IFPE_L3 IFPD_PLLVDD IFPD_AUX_I2CX_SDA#
DY I2CX_SCL IFPD_AUX_I2CX_SCL
AK3
AC3
NC FOR GK208 TXD0 TXD0 IFPE_L2#
AC2

nie
2

IFPE_L2

1
B TXD0 TXD0 B
R7410 TXC AK5
10KR2J-L-GP IFPD_L3#
TXD1 TXD1 IFPE_L1# AC1 TXC IFPD_L3 AK4
AD1 DY
IFPE TXD1 TXD1 IFPE_L1
TXD0 IFPD_L2#
AL4
AD3 IFPD TXD0 AL3
2
TXD2 TXD2 IFPE_L0# IFPD_L2
AD2
TXD2 TXD2 IFPE_L0
TXD1 AM4
NC FOR GK208 EDP TXD1
IFPD_L1#
IFPD_L1
AM3

DP TXD2 IFPD_L0# AM2

CS
TXD2 AM1
IFPD_L0
HPD_E HPD_E R1
GPIO18

IFPD_IOVDD AG6 M6
IFPD_IOVDD GPIO17

R7409 N14P-GS-A1-GP
1

10KR2J-L-GP

D
IFPDE_PLL_IO_VDD AC7 DY 71.0N14P.00U Muxless
IFPE_IOVDD
I2CZ_SDA AF2
IFPF_AUX_I2CZ_SDA#
I2CZ_SCL AF3
IFPF_AUX_I2CZ_SCL
AC8
2

IFPF_IOVDD
TXC AF1
NC FOR GK208 IFPF_L3#
TXC AG1
IFPF_L3
1

R7407 TXD3 TXD0 AD5

10KR2J-L-GP IFPF_L2#
TXD3 TXD0 AD4
IFPF_L2
DY
TXD4 TXD1 AF5
IFPF
2

IFPF_L1#
TXD4 TXD1
IFPF_L1 AF4

AE4 Wistron Confidential document, Anyone can not

A TXD5 TXD2 IFPF_L0# A
AE3 Duplicate, Modify, Forward or any other purpose
TXD5 TXD2 IFPF_L0 application without get Wistron permission
EV
NC FOR GK208

HPD_F
GPIO19
P3 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

N14P-GS-A1-GP Title

71.0N14P.00U Muxless GPU (DIGITALOUT)

Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 74 of 102
5 4 3 2 1
 5 4 3 2 1

VGA1B 2 OF 17
2/17 FBA
VGA1C 3 OF 17
78,79 M DA[63..0] EA40-HW SC 3/17 FBB

M DA0 FB_CLAM P ALL PINS NC FOR GF117/GK208

L28 E1 1 R7525 2
M DA1 FBA_D0 FB_CLAMP 0R2J-L-GP EC_FB_CLAM P 24,76,83
M29

1
M DA2 L29 FBA_D1 80,81 M DB[63..0] M DB0 G9
FBA_D2 Muxless_GC6 FBB_D0
M DA3 M28 R7524 M DB1 E9
FBA_D3 FBB_D1
M DA4 N31 10KR2J-L-GP M DB2 G8
M DA5 FBA_D4 FB_PLLVDD_16m il M DB3 FBB_D2
P29 K27 F9
M DA6 R29
FBA_D5 FB_DLL_AVDD Muxless M DB4 F11
FBB_D3

2
M DA7 FBA_D6 M DB5 FBB_D4
P28 G11
M DA8 J28 FBA_D7 M DB6 F12 FBB_D5
M DA9 FBA_D8 M DB7 FBB_D6 4 OF 17 VGA1D
H29 G12

1
FBA_D9 FBB_D7 1D5V_VGA_S0
D M DA10 J29 M DB8 G6 14/17 FBVDDQ D
FBA_D10 FBB_D8
M DA11 H28 C7522 M DB9 F5
M DA12 G29 FBA_D11 SCD1U10V2KX-L1-GP M DB10 E6 FBB_D9 AA27

2
M DA13 FBA_D12 M DB11 FBB_D10 FBVDDQ_1
E31 Muxless F6 AA30
FBA_D13 FBB_D11 FBVDDQ_2

C7504
SCD1U10V2KX-L1-GP
VRAM_B

C7505
SCD1U10V2KX-L1-GP
VRAM_B

C7506
SCD1U10V2KX-L1-GP
Muxless

C7507
SCD1U10V2KX-L1-GP
Muxless

C7512
SCD1U10V2KX-L1-GP
Muxless

C7510
SC4D7U6D3V3KX-L-GP
Muxless

C7511
SC4D7U6D3V3KX-L-GP
Muxless
M DA14 E32 M DB12 F4 AB27
M DA15 F30 FBA_D14 M DB13 G4 FBB_D12 FBVDDQ_3 AB33 C7508 C7509
FBA_D15 FBB_D13 FBVDDQ_4

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP
M DA16 C34 M DB14 E2 AC27

1
M DA17 D32 FBA_D16 M DB15 F3 FBB_D14 FBVDDQ_5 AD27
M DA18 FBA_D17 M DB16 FBB_D15 FBVDDQ_6
B33 C2 AE27
M DA19 FBA_D18 M DB17 FBB_D16 FBVDDQ_7
C33 D4 AF27

2
M DA20 F33 FBA_D19 M DB18 D3 FBB_D17 FBVDDQ_8 AG27
FBA_D20 FBB_D18 FBVDDQ_9
M DA21 F32 M DB19 C1 B13 Muxless Muxless
M DA22 FBA_D21 M DB20 FBB_D19 FBVDDQ_10
H33 B3 B16
M DA23 H32 FBA_D22 M DB21 C4 FBB_D20 FBVDDQ_11 B19
FBA_D23 FBB_D21 FBVDDQ_12
M DA24 P34 M DB22 B5 E13
M DA25 P32 FBA_D24 M DB23 C5 FBB_D22 FBVDDQ_13 E16
FBA_D25 FBB_D23 FBVDDQ_14
M DA26 P31 M DB24 A11 E19 EA40-HW SB
M DA27 FBA_D26 M DB25 FBB_D24 FBVDDQ_15
P33 C11 H10
M DA28 L31 FBA_D27 M DB26 D11 FBB_D25 FBVDDQ_16 H11
FBA_D28 FBB_D26 FBVDDQ_17
M DA29 L34 M DB27 B11 H12
M DA30 L32 FBA_D29 M DB28 D8 FBB_D27 FBVDDQ_18 H13
M DA31 FBA_D30 M DB29 FBB_D28 FBVDDQ_19
L33 A8 H14
M DA32 FBA_D31 M DB30 FBB_D29 FBVDDQ_20
AG28 C8 H15
M DA33 FBA_D32 M DB31 FBB_D30 FBVDDQ_21
AF29 U30 B8 H16
FBA_D33 FBA_CMD0 -FBA_CS0 78 FBB_D31 FBVDDQ_22
M DA34 AG29 T31 M DB32 F24 H18
M DA35 AF28 FBA_D34 FBA_CMD1 U29 M DB33 G23 FBB_D32 D13 FBVDDQ_23 H19
M DA36 FBA_D35 FBA_CMD2 FBA_ODT 0 78 M DB34 FBB_D33 FBB_CMD0 -FBB_CS0 80 FBVDDQ_24
AD30 R34 E24 E14 H20
M DA37 FBA_D36 FBA_CMD3 FBA_CKE0 78 M DB35 FBB_D34 FBB_CMD1 FBVDDQ_25
AD29 R33 G24 F14 H21
M DA38 FBA_D37 FBA_CMD4 FBA_A14 78,79 M DB36 FBB_D35 FBB_CMD2 FBB_ODT 0 80 FBVDDQ_26
AC29 U32 D21 A12 H22
FBA_D38 FBA_CMD5 FBA_RST 78,79 FBB_D36 FBB_CMD3 FBB_CKE0 80 FBVDDQ_27
M DA39 AD28 U33 M DB37 E21 B12 H23
M DA40 AJ29 FBA_D39 FBA_CMD6 U28 FBA_A9 78,79 M DB38 G21 FBB_D37 FBB_CMD4 C14 FBB_A14 80,81 FBVDDQ_28 H24
M DA41 FBA_D40 FBA_CMD7 FBA_A7 78,79 M DB39 FBB_D38 FBB_CMD5 FBB_RST 80,81 FBVDDQ_29
AK29 V28 F21 B14 H8
M DA42 FBA_D41 FBA_CMD8 FBA_A2 78,79 M DB40 FBB_D39 FBB_CMD6 FBB_A9 80,81 FBVDDQ_30
AJ30 V29 G27 G15 H9
M DA43 FBA_D42 FBA_CMD9 FBA_A0 78,79 M DB41 FBB_D40 FBB_CMD7 FBB_A7 80,81 FBVDDQ_31
AK28 V30 D27 F15 L27
FBA_D43 FBA_CMD10 FBA_A4 78,79 FBB_D41 FBB_CMD8 FBB_A2 80,81 FBVDDQ_32
M DA44 AM29 U34 M DB42 G26 E15 M27
FBA_D44 FBA_CMD11 FBA_A1 78,79 FBB_D42 FBB_CMD9 FBB_A0 80,81 FBVDDQ_33

co
M DA45 AM31 U31 M DB43 E27 D15 N27
M DA46 FBA_D45 FBA_CMD12 FBA_BA0 78,79 M DB44 FBB_D43 FBB_CMD10 FBB_A4 80,81 FBVDDQ_34
AN29 V34 E29 A14 P27
M DA47 FBA_D46 FBA_CMD13 -FBA_WE 78,79 M DB45 FBB_D44 FBB_CMD11 FBB_A1 80,81 FBVDDQ_35
AM30 V33 F29 D14 R27
M DA48 FBA_D47 FBA_CMD14 FBA_A15 78,79 M DB46 FBB_D45 FBB_CMD12 FBB_BA0 80,81 FBVDDQ_36
AN31 Y32 E30 A15 T27
FBA_D48 FBA_CMD15 -FBA_CAS 78,79 FBB_D46 FBB_CMD13 -FBB_WE 80,81 FBVDDQ_37
M DA49 AN32 AA31 M DB47 D30 B15 T30
M DA50 AP30 FBA_D49 FBA_CMD16 AA29 -FBA_CS1 79 M DB48 A32 FBB_D47 FBB_CMD14 C17 FBB_A15 80,81 FBVDDQ_38 T33
M DA51 FBA_D50 FBA_CMD17 M DB49 FBB_D48 FBB_CMD15 -FBB_CAS 80,81 FBVDDQ_39
AP32 AA28 C31 D18 V27
M DA52 FBA_D51 FBA_CMD18 FBA_ODT 1 79 M DB50 FBB_D49 FBB_CMD16 -FBB_CS1 81 FBVDDQ_40
AM33 AC34 C32 E18 W27
M DA53 FBA_D52 FBA_CMD19 FBA_CKE1 79 M DB51 FBB_D50 FBB_CMD17 FBVDDQ_41
AL31 AC33 B32 F18 W30
FBA_D53 FBA_CMD20 FBA_A13 78,79 FBB_D51 FBB_CMD18 FBB_ODT 1 81 FBVDDQ_42
M DA54 AK33 AA32 M DB52 D29 A20 W33
C M DA55 FBA_D54 FBA_CMD21 FBA_A8 78,79 M DB53 FBB_D52 FBB_CMD19 FBB_CKE1 81 FBVDDQ_43 C
AK32 AA33 A29 B20 Y27
M DA56 FBA_D55 FBA_CMD22 FBA_A6 78,79 M DB54 FBB_D53 FBB_CMD20 FBB_A13 80,81 FBVDDQ_44
AD34 Y28 C29 C18
M DA57 FBA_D56 FBA_CMD23 FBA_A11 78,79 M DB55 FBB_D54 FBB_CMD21 FBB_A8 80,81
AD32 Y29 B29 B18
M DA58 FBA_D57 FBA_CMD24 FBA_A5 78,79 M DB56 FBB_D55 FBB_CMD22 FBB_A6 80,81
AC30 W31 B21 G18 F1
FBA_D58 FBA_CMD25 FBA_A3 78,79 FBB_D56 FBB_CMD23 FBB_A11 80,81 FB_VDDQ_SENSE
M DA59 AD33 Y30 M DB57 C23 G17
FBA_D59 FBA_CMD26 FBA_BA2 78,79 FBB_D57 FBB_CMD24 FBB_A5 80,81 1D5V_VGA_S0
M DA60 AF31 AA34 M DB58 A21 F17
M DA61 FBA_D60 FBA_CMD27 FBA_BA1 78,79 M DB59 FBB_D58 FBB_CMD25 FBB_A3 80,81
AG34 Y31 C21 D16 F2
M DA62 AG32 FBA_D61 FBA_CMD28 Y34 FBA_A12 78,79 M DB60 B24 FBB_D59 FBB_CMD26 A18 FBB_BA2 80,81 FB_GND_SENSE
M DA63 FBA_D62 FBA_CMD29 FBA_A10 78,79 M DB61 FBB_D60 FBB_CMD27 FBB_BA1 80,81
AG33 Y33 C24 D17
FBA_D63 FBA_CMD30 -FBA_RAS 78,79 FBB_D61 FBB_CMD28 FBB_A12 80,81
V31 M DB62 B26 A17 2 R7501 1 FB_CAL_PD_VDDQ J27
FBA_CMD31 M DB63 C26 FBB_D62 FBB_CMD29 B17 FBB_A10 80,81 FB_CAL_PD_VDDQ
40D2R2F-GP
FBB_D63 FBB_CMD30 -FBB_RAS 80,81
Muxless

nfi
P30 NC R32 E17
78 DQM A0 F31 FBA_DQM0 FBA_CMD_RFU0 AC32 FBB_CMD31 FB_CAL_PU_GND H27
78 DQM A1 FBA_DQM1 NC FBA_CMD_RFU1 FB_CAL_PU_GND
F34 80 DQM B0 E11 C12
78 DQM A2 FBA_DQM2 GF117/GK208
FBB_DQM0 FBB_CMD_RFU0
M32 80 DQM B1 E3 C20
78 DQM A3 FBA_DQM3 GK107/GF108 FBB_DQM1 FBB_CMD_RFU1 FB_CAL_T ERM _GND H25
AD31 80 DQM B2 A3
79 DQM A4 FBA_DQM4 1D5V_VGA_S0 FBB_DQM2 FB_CAL_TERM_GND
AL29 80 DQM B3 C9
79 DQM A5 FBA_DQM5 FBB_DQM3 1D5V_VGA_S0
AM32 81 DQM B4 F23
79 DQM A6 FBA_DQM6 FBA_DEBUG0_R28 FBB_DQM4
AF34 R28 R7522 1 2 60D4R2F-GP F27 N14P-GS-A1-GP
79 DQM A7 FBA_DQM7 FBA_DEBUG0 81 DQM B5 FBB_DQM5
AC28 FBA_DEBUG0_AC28 R7523 1 2 60D4R2F-GP C30
FBA_DEBUG1 81 DQM B6 FBB_DQM6
DY 81 DQM B7 A24 G14 FBB_DEBUG0_G14 R7526 1 2 60D4R2F-GP 71.0N14P.00U Muxless

1
FBB_DQM7 FBB_DEBUG0

Muxless
78 QSAP_0 M31 DY G20 FBB_DEBUG0_G20 R7527 1 2 60D4R2F-GP R7503 R7502
FBA_DQS_WP0 FBB_DEBUG1

Muxless
78 QSAP_1 G31 DY
FBA_DQS_WP1

42D2R2F-GP

51D1R2F-GP
E33 R30 D10 DY
78 QSAP_2 FBA_DQS_WP2 FBA_CLK0 CLKA0 78 80 QSBP_0 FBB_DQS_WP0
78 QSAP_3 M33 R31 80 QSBP_1 D5
FBA_DQS_WP3 FBA_CLK0# CLKA0# 78 FBB_DQS_WP1
79 QSAP_4 AE31 AB31 80 QSBP_2 C3 D12

2
FBA_DQS_WP4 FBA_CLK1 CLKA1 79 FBB_DQS_WP2 FBB_CLK0 CLKB0 80
79 QSAP_5 AK30 AC31 80 QSBP_3 B9 E12
FBA_DQS_WP5 FBA_CLK1# CLKA1# 79 FBB_DQS_WP3 FBB_CLK0# CLKB0# 80
79 QSAP_6 AN33 81 QSBP_4 E23 E20
FBA_DQS_WP6 FBB_DQS_WP4 FBB_CLK1 CLKB1 81
79 QSAP_7 AF33 81 QSBP_5 E28 F20
FBA_DQS_WP7 FBB_DQS_WP5 FBB_CLK1# CLKB1# 81
81 QSBP_6 B30
FBB_DQS_WP6
81 QSBP_7 A23
FBB_DQS_WP7
78 QSAN_0 M30 K31
FBA_DQS_RN0 FBA_WCK1
78 QSAN_1 H30 L30

de
FBA_DQS_RN1 FBA_WCK1#
78 QSAN_2 E34 H34 80 QSBN_0 D9 F8
FBA_DQS_RN2 FBA_WCK23 FBB_DQS_RN0 FBB_WCK1
78 QSAN_3 M34 J34 80 QSBN_1 E4 E8
FBA_DQS_RN3 FBA_WCK23# FBB_DQS_RN1 FBB_WCK1#
79 QSAN_4 AF30 AG30 80 QSBN_2 B2 A5
FBA_DQS_RN4 FBA_WCK45 FBB_DQS_RN2 FBB_WCK23
79 QSAN_5 AK31 AG31 80 QSBN_3 A9 A6
FBA_DQS_RN5 FBA_WCK45# FBB_DQS_RN3 FBB_WCK23#
79 QSAN_6 AM34 AJ34 81 QSBN_4 D22 D24
FBA_DQS_RN6 FBA_WCK67 FBB_DQS_RN4 FBB_WCK45
79 QSAN_7 AF32 AK34 81 QSBN_5 D28 D25
FBA_DQS_RN7 FBA_WCK67# FBB_DQS_RN5 FBB_WCK45#
81 QSBN_6 A30 B27
FBB_DQS_RN6 FBB_WCK67
J30 81 QSBN_7 B23 C27
FBA_WCKB1 FBB_DQS_RN7 FBB_WCK67#
THE FBA_WCKBxx J31
FBA_WCKB1#
PINS ARE USED J32 D6
FBA_WCKB23 FBB_WCKB1
ONLY ON GK107 J33 D7
FBA_WCKB23# THE FBB_WCKBxx FBB_WCKB1#
THEY ARE NC AH31 C6
B FBA_WCKB45 PINS ARE USED FBB_WCKB23 B
FOR GK208/GF108 AJ31 B6
FBA_WCKB45# 1D05V_VGA_S0 ONLY ON GK107 FBB_WCKB23#
/GF117 AJ32 F26
FBA_WCKB67 THEY ARE NC FBB_WCKB45
AJ33 E26
FBA_WCKB67# L7502 FOR GF108 FBB_WCKB45#
A26
FB_PLLVDD_16m il ( FBB_WCKB67
H26 U27 1 ( 2 A27
FB_VREF FBA_PLL_AVDD FBB_WCKB67#
C7517
SCD1U10V2KX-L1-GP
Muxless

C7518
SCD1U10V2KX-L1-GP
Muxless

C7519
SC10U6D3V3MX-L-GP
Muxless

C7520
SC10U6D3V3MX-L-GP
Muxless

BLM 18KG300T N1D-GP H17 FB_PLLVDD_16m il

NC
1

FBB_PLL_AVDD
N14P-GS-A1-GP CHIP BEAD BLM 18KG300T N1D M URAT A
Muxless Muxless GF108 GK107
71.0N14P.00U 68.00084.H41 N14P-GS-A1-GP
2

nti
2nd = 68.00334.051

1
71.0N14P.00U Muxless
C7523
SCD1U10V2KX-L1-GP

2
Muxless

Group A Group B
FBB_CKE0

al,
CKE0 FBA_CKE0 CKE0
CLKA1 CLKA0 FBB_CKE1
CKE1 FBA_CKE1 CKE1
CLKB1 CLKB0
1

Reset FBA_RST FBB_RST Reset

R7504 R7505

1
162R2F-GP 162R2F-GP ODT0 FBA_ODT 0 FBB_ODT 0 ODT0
Muxless Muxless R7506 R7507
ODT1 FBA_ODT 1 FBB_ODT 1 ODT1 162R2F-GP 162R2F-GP
2

VRAM_B VRAM_B
CLKA1# CLKA0#
1

2
R7508
10KR2J-L-GP
Muxless

R7509
10KR2J-L-GP
Muxless

R7510
10KR2J-L-GP
Muxless

R7511
10KR2J-L-GP
Muxless

R7512
10KR2J-L-GP
Muxless

R7513
10KR2J-L-GP
VRAM_B

R7514
10KR2J-L-GP
VRAM_B

R7515
10KR2J-L-GP
VRAM_B

R7516
10KR2J-L-GP
VRAM_B

R7517
10KR2J-L-GP
VRAM_B

CLKB1# CLKB0#
A A

FBCLK Termination place on VRAM side FBCLK Termination place on VRAM side
2

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
EV application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., Hsichih,
T aipei Hsien 221, T aiwan, R.O.C.

r
T itle

GPU (VRAM I/F)

Size Docum ent Num ber Rev
Custom
EA40_HW ULT 1

efe
Date: M onday, M ay 13, 2013 Sheet 75 of 102
5 4 3 2 1

r by
An
nie
CS
D
 5 4 3 2 1

3D3V_VGA_S0

1D05V_VGA_S0 PLLVDD_PWR

L7601

3
4
BLM18KG300TN1D-GP
RN7606 1 ( 2
(
SRN4K7J-8-GP CHIP BEAD BLM18KG300TN1D MURATA
VGA1N 14 OF 17 Muxless Muxless

C7605
SCD1U10V2KX-L1-GP
Muxless

C7602
SC4D7U6D3V3KX-L-GP
Muxless

C7608
SC10U6D3V3MX-L-GP
Muxless
4/17 DACA 68.00084.H41
2nd = 68.00334.051

2
1

1
GF108/GK107 GF108/GK107
GK208
GF117 GF117 GK208

3D3V_VGA_S0_DACA_VDD_16MIL AG10 NC NC R4 VGASCL_R4

DACA_VDD I2CA_SCL VGASDA_R5
NC R5

2
DACA_VREF_AP9 I2CA_SDA VGA1O 15 OF 17
AP9 TSEN_VREF
DACA_VREF 11/17 XTAL_PLL
AP8 NC NC AM9

1
DACA_RSET DACA_HSYNC
NC AN9
1

R7641 DACA_VSYNC
D AD8 D
R7629 10KR2J-L-GP PLLVDD
AE8

co
10KR2J-L-GP SP_PLLVDD
Muxless NC DACA_RED
AK9
Muxless AD7 NC
2
VID_PLLVDD
NC AL10
2

DACA_GREEN
GF108/GK107 GF117
NC AL9 GK208
DACA_BLUE

N14P-GS-A1-GP TP7609TPAD34 VIDEO_CLK_XTAL_SS H1 J4 N12P_XTAL_OUTBUFF

XTAL_SSIN XTAL_OUTBUFF
71.0N14P.00U Muxless
H3 H2

nfi
XTAL_IN XTAL_OUT

1
N14P-GS-A1-GP R7605

1
R7604 10KR2J-L-GP
3D3V_VGA_S0 10KR2J-L-GP
71.0N14P.00U Muxless
Muxless
3D3V_VGA_S0
DY

2
2
27MHZ_IN 1 R7606 2 27MHZ_OUT
Q7601 DY

2
2N7002KDW-GP
4
3

1MR2J-L3-GP R7607
84.2N702.A3F

de
RN7605 2nd = 75.00601.07C EA40-HW SC 390R2J-3-L-GP
SRN4K7J-8-GP 3rd = 84.2N702.F3F Muxless
Muxless SMBC_THERM_NV 1 6 SML1_CLK 18,24,26

1
2 5 X8601
1
2

SMBC_THERM_NV
SMBD_THERM_NV 3 4 SMBD_THERM_NV 1 4
18,24,26 SML1_DATA
Muxless
2 3 27MHZ_OUT_R

1
nti

1
C7610
XTAL-27MHZ-137-GP
SC15P50V2JN-L-GP C7611

2
SC15P50V2JN-L-GP

2
82.30034.A61
2nd =
EA40-HW SC 3rd = 82.30034.921

Muxless

al,
3D3V_VGA_S0 3D3V_VGA_S0 3D3V_S0
3D3V_S0

2
Q7602

2
2N7002KDW-GP R7648
Q7606
84.2N702.A3F R7650 R7649 10KR2J-L-GP
2nd = 75.00601.07C 10KR2J-L-GP 10KR2J-L-GP G Muxless_GC6
C C
3rd = 84.2N702.F3F Muxless_GC6 Muxless_GC6

1
Q7604
D

1
24 DGPUHOT 1 R7628 2 DGPUHOT_R G 1 6
0R0402-PAD FB_CLAMP_TGL_REQ# S
D DGPUHOT# 2 5 FB_CLAMP_MON_S
24,75,83 EC_FB_CLAMP EC_FB_CLAMP_TGL_REQ# 24

r
3D3V_VGA_S0 2N7002K-2-GP
S 3 4
84.2N702.J31
2ND = 84.2N702.031

efe
2

2N7002K-2-GP
Muxless_GC6 Muxless_GC6
84.2N702.J31 R7647
2ND = 84.2N702.031 10KR2J-L-GP
Muxless Muxless_GC6
1

FB_CLAMP_MON

3D3V_VGA_S0 3D3V_VGA_S0

3D3V_VGA_S0

r
4
3

4
3

EA40-HW SC
Muxless RN7608
VGA1Q 17 OF 17 SRN4K7J-8-GP
RN7607
SRN4K7J-8-GP

10/19 MISC1 Muxless

T4 SMBC_THERM_NV

by
I2CS_SCL
1

T3 SMBD_THERM_NV
1
2

1
2

I2CS_SDA
R7612
10KR2J-L-GP
Muxless

R7613
10KR2J-L-GP
Muxless

R7614
10KR2J-L-GP
Muxless

R2 VGASCL_R2
I2CC_SCL VGASDA_R3
R3
I2CC_SDA
2

NC R7 VGASCL_R7
THERMDN_TP I2CB_SCL VGASDA_R6
TP7613 1 K4 NC R6
THERMDN I2CB_SDA
1 THERMDP_TP K3
TP7614 THERMDP GF117 GK107/GF108
EA40-HW SC GK208

10KR2J-L-GP 1 R7622 2 JTAG_TCK_TP AM10 EA40-HW SC

N14P_JTAG_TMS JTAG_TCK
TP7607 1 DY AP11
JTAG_TMS
N14P_JTAG_TDI

An
TP7615 1 AM11
N14P_JTAG_TDO JTAG_TDI
TP7606 1 AP12
N14P_GPIO_JTAG_TRST AN11 JTAG_TDO FB_CLAMP_MON
1 2 P6
JTAG_TRST# GPIO0
M3
R7621 GPIO1
L6
10KR2J-L-GP GPIO2 GPIO3_P5
P5 1 TP7617
GPIO3
Muxless GPIO4
P7
L7
GPIO5 FB_CLAMP_TGL_REQ#
M7
GPIO6 N14P_GPIO7_H5
GK208 N8 1 TP7616
GPIO7 GPIO8_OVERT#
OVERT M1
GPIO8 GPIO9_ALERT#
B M2 B
GPIO9
L1
GPIO10

nie
M5 VGA_CORE_VID 82
GPIO11 DGPUHOT#
N3
GPIO12 GPIO16_R8
M4 1 R7639 2 VGA_CORE_PSI 82
GPIO13
GPIO16 NC GPIO16 R8
GPIO16 0R2J-L-GP
GPIO20 NC NC P4
GPIO20
GPIO8 NC NC P1 Muxless
GPIO21
GK208 GF117 GK107 GF108

N14P-GS-A1-GP
71.0N14P.00U Muxless

VGA1P
12/17 MISC2
16 OF 17
3D3V_VGA_S0

CS
2

D
R7645
10KR2J-L-GP
DY
H6 ROM_CS#
1

ROM_CS#
H5 ROM_SI_D3

STRAP0 J2
ROM_SI
ROM_SO
H7
H4
ROM_SO_C4
ROM_SLK_D4
4.99Kohm 64.49915.6DL
STRAP1
STRAP2
J7
J6
STRAP0
STRAP1
ROM_SCLK
10Kohm 64.10025.L0L
STRAP3
STRAP4
J5
J3
STRAP2
STRAP3 NC 15Kohm 64.15025.6DL 3D3V_VGA_S0
STRAP4
GK107/GF117
NC
GF108 20Kohm 64.20025.6DL 3D3V_VGA_S0 3D3V_VGA_S0

GK208
24.9Kohm 64.24925.6DL
L2 30.1Kohm 64.30125.6DL
1

1
BUFRST#
34.8Kohm 64.34825.6DL
1

R7630 R7632 R7634 R7637 R7638

R7626 R7624 R7625 45K3R2F-L-GP 10KR2F-L1-GP 10KR2F-L1-GP 10KR2F-L1-GP 10KR2F-L1-GP
STRAP_REF0_GND_N9 J1
MULTI_STRAP_REF CEC
L3 45Kohm 64.45325.6DL 4K99R2F-L-GP
N14_GV2
10KR2F-L1-GP
DY
4K99R2F-L-GP
N14_GV2
MM_GV2 MM M MM DY
2

2
A STRAP0 A
2

CEC IS NC FOR ROM_SLK_D4 STRAP1

1

R7616 GK107/GK208/GF117 ROM_SI_D3 EA40-HW 1 STRAP2 STRAP4

40K2R2F-GP ROM_SO_C4 STRAP3

1
N14_GV2
1

N14M_GE: R7619
1

N14P-GS-A1-GP R7618 R7627 R7617 10KR2F-L1-GP

STRAP0=1
2

71.0N14P.00U Muxless 10KR2F-L1-GP 10KR2F-L1-GP 10KR2F-L1-GP R7631 R7633 R7635 R7640 Muxless
N14M_GE N14M_GE STRAP1=2 10KR2F-L1-GP 34K8R2F-1-GP 15KR2F-GP 4K99R2F-L-GP

2
STRAP2=4 MM MM_GV2 MM_GV2 MM_GV2
2

EV
2

STRAP3=8
M__GV2_Memory
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU (GPIO/STRAP)
Size Document Number Rev
Wistron Confidential document, Anyone can not Custom
Duplicate, Modify, Forward or any other purpose EA40_HW ULT 1
application without get Wistron permission Date: Monday, May 13, 2013 Sheet 76 of 102

5 4 3 2 1
 5 4 3 2 1

VGA1F 6 OF 17
15/17 GND_1/2
A2 AM25 VGA1G 7 OF 17
VGA_CORE 8 OF 17 GND_1 GND_71
VGA1H AA17 AN1 16/17 GND_2/2
GND_5 GND_72
13/17 NVVDD AA18 AN10
GND_6 GND_73
AA20 AN13 N19 T28
GND_7 GND_74 GND_141 GND_170
AA12 AA22 AN16 N2 T32
VDD_1 GND_8 GND_75 GND_142 GND_171

C7704
SC4D7U6D3V3KX-L-GP
Muxless

C7703
SC4D7U6D3V3KX-L-GP
Muxless

C7702
SC4D7U6D3V3KX-L-GP
Muxless

C7701
SC4D7U6D3V3KX-L-GP
Muxless
AA14 AB12 AN19 N21 T5
VDD_2 GND_9 GND_76 GND_143 GND_172
AA16 AB14 AN22 N23 T7
VDD_3 GND_10 GND_77 GND_144 GND_173

1
AA19 AB16 AN25 N28 U12
VDD_4 GND_11 GND_78 GND_145 GND_174
AA21 AB19 AN30 N30 U14
VDD_5 GND_12 GND_79 GND_146 GND_175
AA23 AB2 AN34 N32 U16

2
VDD_6 GND_13 GND_80 GND_147 GND_176
AB13 AB21 AN4 N33 U19
VDD_7 GND_14 GND_81 GND_148 GND_177
AB15 A33 AN7 N5 U21
VDD_8 GND_2 GND_82 GND_149 GND_178
AB17 AB23 AP2 N7 U23
D VDD_9 GND_15 GND_83 GND_150 GND_179 D
AB18 AB28 AP33 P13 V12

co
VDD_10 GND_16 GND_84 GND_151 GND_180
AB20 AB30 B1 P15 V14
VDD_11 GND_17 GND_85 GND_152 GND_181
AB22 AB32 B10 P17 V16
VDD_12 GND_18 GND_86 GND_153 GND_182
AC12 AB5 B22 P18 V19
VDD_13 GND_19 GND_87 GND_154 GND_183
AC14 AB7 B25 P20 V21
VDD_14 GND_20 GND_88 GND_155 GND_184
AC16 AC13 B28 P22 V23
VDD_15 GND_21 GND_89 GND_156 GND_185
AC19 AC15 B31 R12 W13
VDD_16 GND_22 GND_90 GND_157 GND_186
AC21 AC17 B34 R14 W15
VDD_17 GND_23 GND_91 GND_158 GND_187
AC23 AC18 B4 R16 W17

nfi
VDD_18 GND_24 GND_92 GND_159 GND_188

C7708
SC4D7U6D3V3KX-L-GP
Muxless

C7707
SC4D7U6D3V3KX-L-GP
Muxless

C7706
SC4D7U6D3V3KX-L-GP
Muxless

C7705
SC4D7U6D3V3KX-L-GP
Muxless
M12 AA13 B7 R19 W18
VDD_19 GND_3 GND_93 GND_160 GND_189
M14 AC20 C10 R21 W20
VDD_20 GND_25 GND_94 GND_161 GND_190
1

1
M16 AC22 C13 R23 W22
VDD_21 GND_26 GND_95 GND_162 GND_191
M19 AE2 C19 T13 W28
VDD_22 GND_27 GND_96 GND_163 GND_192
M21 AE28 C22 T15 Y12
2

2
VDD_23 GND_28 GND_97 GND_164 GND_193
M23 AE30 C25 T17 Y14
VDD_24 GND_29 GND_98 GND_165 GND_194
N13 AE32 C28 T18 Y16
VDD_25 GND_30 GND_99 GND_166 GND_195

de
N15 AE33 C7 T2 Y19
VDD_26 GND_31 GND_100 GND_167 GND_196
N17 AE5 D2 T20 Y21
VDD_27 GND_32 GND_101 GND_168 GND_197
N18 AE7 D31 T22 Y23
VDD_28 GND_33 GND_102 GND_169 GND_198
N20 AH10 D33
VDD_29 GND_34 GND_103
N22 AA15 E10
VDD_30 GND_4 GND_104
P12 AH13 E22
VDD_31 GND_35 GND_105
P14 AH16 E25
VDD_32 GND_36 GND_106
P16 AH19 E5
VDD_33 GND_37 GND_107

nti
P19 AH2 E7
VDD_34 GND_38 GND_108
P21 AH22 F28 AG11 AH11
VDD_35 GND_39 GND_109 GND_F GND_H
P23 AH24 F7
VDD_36 GND_40 GND_110
C7720
SCD1U10V2KX-L-GP
Muxless

C7719
SCD1U10V2KX-L-GP
Muxless

C7718
SCD1U10V2KX-L-GP
Muxless

C7717
SCD1U10V2KX-L-GP
Muxless
R13 AH28 G10
VDD_37 GND_41 GND_111
R15 AH29 G13
VDD_38 GND_42 GND_112
1

1
R17 AH30 G16
VDD_39 GND_43 GND_113
R18 AH32 G19
VDD_40 GND_44 GND_114
R20 AH33 G2
2

2
VDD_41 GND_45 GND_115

al,
R22 AH5 G22
VDD_42 GND_46 GND_116
T12 AH7 G25 C16
VDD_43 GND_47 GND_117 GND_OPT_1
T14 AJ7 G28 W32
VDD_44 GND_48 GND_118 GND_OPT_2
T16 AK10 G3
VDD_45 GND_49 GND_119
T19 AK7 G30 Optional CMD GNDs (2)
VDD_46 GND_50 GND_120
T21 AL12 G32 NC for 4-Lyr cards
C VDD_47 GND_51 GND_121 C
T23 AL14 G33
VDD_48 GND_52 GND_122 N14P-GS-A1-GP
U13 AL15 G5
VDD_49 GND_53 GND_123
U15
VDD_50
AL17
GND_54 GND_124
G7 Muxless
U17 AL18 K2

r
VDD_51 GND_55 GND_125 71.0N14P.00U
C7731
SC10U6D3V3MX-L-GP
Muxless

C7730
SC10U6D3V3MX-L-GP
Muxless

C7729
SC10U6D3V3MX-L-GP
Muxless

C7728
SC10U6D3V3MX-L-GP
Muxless

C7727
SC10U6D3V3MX-L-GP
Muxless

U18 AL2 K28

VDD_52 GND_56 GND_126
U20 AL20 K30
VDD_53 GND_57 GND_127
1

efe
U22 AL21 K32
VDD_54 GND_58 GND_128
V13 AL23 K33
VDD_55 GND_59 GND_129
V15 AL24 K5
2

VDD_56 GND_60 GND_130

V17 AL26 K7
VDD_57 GND_61 GND_131
V18 AL28 M13
VDD_58 GND_62 GND_132
V20 AL30 M15
VDD_59 GND_63 GND_133
V22 AL32 M17
VDD_60 GND_64 GND_134
W12 AL33 M18
VDD_61 GND_65 GND_135
W14 AL5 M20
VDD_62 GND_66 GND_136
W16 AM13 M22
VDD_63 GND_67 GND_137

r
W19 AM16 N12
VDD_64 GND_68 GND_138
W21 AM19 N14
VDD_65 GND_69 GND_139
W23 AM22 N16
VDD_66 GND_70 GND_140
C7732
SC22U4V3MX-GP
DY

C7733
SC22U4V3MX-GP
DY

C7736
SC22U4V3MX-GP
DY

C7737
SC22U4V3MX-GP
DY

Y13
VDD_67
Y15

by
VDD_68
1

Y17
VDD_69 N14P-GS-A1-GP
Y18
VDD_70
Y20 71.0N14P.00U Muxless
2

VDD_71
Y22
VDD_72

N14P-GS-A1-GP
Muxless
71.0N14P.00U

An
VGA1I 9 OF 17
9/17 XVDD

CONFIGURABLE
POWER
CHANNELS
B B
U1
XVDD_1

nie
U2
XVDD_2
U3
XVDD_3
U4
XVDD_4
U5
XVDD_5
U6
XVDD_6
U7
XVDD_7
U8
XVDD_8

VGA1E 5 OF 17 V1
XVDD_9
17/17 NC/VDD33 V2
XVDD_10
V3
XVDD_11

CS
GK208 3D3V_VGA_S0 V4
GK107 XVDD_12
GF117 V5
XVDD_13
AJ28 3V3MISC J8 V6
NC#AJ28 3V3MISC_1 XVDD_14
C15 3V3MISC K8 V7
NC#C15 3V3MISC_2 XVDD_15
C7710
SC1U6D3V2KX-L-1-GP
Muxless

C7709
SC1U6D3V2KX-L-1-GP
Muxless

C7734
SCD1U10V2KX-L1-GP
Muxless

C7735
SCD1U10V2KX-L1-GP
Muxless

C7739
SCD1U10V2KX-L1-GP
Muxless

C7740
SC4D7U6D3V3KX-L-GP
Muxless

D19 V8
NC#D19 XVDD_16
D20 L8
NC#D20 VDD33_1
1

D23 M8
NC#D23 VDD33_2 W2
D26 XVDD_17
NC#D26 W3
H31 XVDD_18
2

NC#H31 W4
V32 XVDD_19
NC#V32

D
W5
XVDD_20
AC6 W7
DNU#AC6 DO NOT XVDD_21
AJ4 W8
DNU#AJ4 CONNECT XVDD_22
AJ5
DNU#AJ5 THESE
AL11
DNU#AL11 PINS
T8
DNU#T8
Y1
XVDD_23
N14P-GS-A1-GP Y2
XVDD_24
Muxless XVDD_25
Y3
71.0N14P.00U Y4
XVDD_26
Y5
XVDD_27
Y6
XVDD_28
Y7
XVDD_29
A Y8 A
XVDD_30
Wistron Confidential document, Anyone can not
AA1 Duplicate, Modify, Forward or any other purpose
XVDD_31 application without get Wistron permission
AA2
XVDD_32 EV
AA3
XVDD_33
AA4
XVDD_34
AA5
XVDD_35
XVDD_36
AA6 Wistron Corporation
AA7 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
XVDD_37
AA8 Taipei Hsien 221, Taiwan, R.O.C.
XVDD_38
N14P-GS-A1-GP Title
Muxless GPU (POWER/GND)
71.0N14P.00U
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 77 of 102
5 4 3 2 1
 5 4 3 2 1

1D5V_VGA_S0
1D5V_VGA_S0
VRAM4
VRAM3 MDA[63..0] 75,79
MDA[63..0] 75,79 K8 E3 MDA26
MDA23 VDD DQL0 MDA27
K8 E3 K2 F7
VDD DQL0 MDA19 VDD DQL1 MDA28
K2 VDD DQL1 F7 N1 VDD DQL2 F2
N1 F2 MDA22 R9 F8 MDA30
VDD DQL2 MDA16 VDD DQL3 MDA24
R9 VDD DQL3 F8 B2 VDD DQL4 H3
B2 H3 MDA21 D9 H8 MDA31
D VDD DQL4 MDA18 VDD DQL5 MDA25 D
D9 H8 G7 G2

co
VDD DQL5 MDA20 VDD DQL6 MDA29
G7 VDD DQL6 G2 R1 VDD DQL7 H7
R1 H7 MDA17 N9
VDD DQL7 VDD MDA7
N9 VDD DQU0 D7
D7 MDA12 A8 C3 MDA0
DQU0 MDA8 VDDQ DQU1 MDA6
A8 VDDQ DQU1 C3 A1 VDDQ DQU2 C8
A1 C8 MDA15 C1 C2 MDA2
VDDQ DQU2 VDDQ DQU3

nfi
C1 C2 MDA10 C9 A7 MDA4
VDDQ DQU3 MDA13 VDDQ DQU4 MDA3
C9 A7 D2 A2
VDDQ DQU4 MDA9 VDDQ DQU5 MDA5
D2 VDDQ DQU5 A2 E9 VDDQ DQU6 B8
E9 B8 MDA14 F1 A3 MDA1
VDDQ DQU6 MDA11 VDDQ DQU7
F1 A3 H9
VDDQ DQU7 VDDQ
H9 H2 C7 QSAP_0 75
VDDQ VDDQ DQSU

de
H2 C7 QSAP_1 75 B7 QSAN_0 75
VDDQ DQSU VRAM1_VREF DQSU#
B7 QSAN_1 75 H1
VRAM1_VREF DQSU# VREFDQ
H1 VREFDQ M8 VREFCA DQSL F3 QSAP_3 75
M8 F3 QSAP_2 75 VRAM_ZQ1 L8 G3 QSAN_3 75
VRAM_ZQ2 VREFCA DQSL ZQ DQSL#
L8 G3 QSAN_2 75

2
ZQ DQSL#
K1 FBA_ODT0 75
ODT
2

K1 R7806 N3

nti
ODT FBA_ODT0 75 75,79 FBA_A0 A0
R7804 75,79 FBA_A0 N3 243R2F-L1-GP 75,79 FBA_A1 P7
A0 A1
243R2F-L1-GP 75,79 FBA_A1 P7 A1 75,79 FBA_A2 P3 A2 CS# L2 -FBA_CS0 75
75,79 FBA_A2 P3 L2 -FBA_CS0 75 VRAM_A 75,79 FBA_A3 N2 T2 FBA_RST 75,79

1
A2 CS# A3 RESET#
VRAM_A 75,79 FBA_A3 N2 T2 FBA_RST 75,79 75,79 FBA_A4 P8
1

A3 RESET# A4
75,79 FBA_A4 P8 75,79 FBA_A5 P2
A4 A5
75,79 FBA_A5 P2 75,79 FBA_A6 R8

al,
A5 A6
75,79 FBA_A6 R8 75,79 FBA_A7 R2 L9
A6 A7 NC#L9
75,79 FBA_A7 R2 L9 75,79 FBA_A8 T8 L1
A7 NC#L9 A8 NC#L1
75,79 FBA_A8 T8 L1 75,79 FBA_A9 R3 J9
A8 NC#L1 A9 NC#J9
C 75,79 FBA_A9 R3 J9 75,79 FBA_A10 L7 J1 C
A9 NC#J9 A10/AP NC#J1
75,79 FBA_A10 L7 A10/AP NC#J1 J1 75,79 FBA_A11 R7 A11
75,79 FBA_A11 R7 75,79 FBA_A12 N7
A11 A12/BC#
75,79 FBA_A12 N7 A12/BC# 75,79 FBA_A13 T3 A13 VSS J8
T3 J8 T7 M1

r
75,79 FBA_A13 A13 VSS 75,79 FBA_A14 A14 VSS
75,79 FBA_A14 T7 A14 VSS M1 75,79 FBA_A15 M7 A15 VSS M9

efe
75,79 FBA_A15 M7 A15 VSS M9 VSS J2
J2 75,79 FBA_BA0 M2 P9
VSS BA0 VSS
75,79 FBA_BA0 M2 BA0 VSS P9 75,79 FBA_BA1 N8 BA1 VSS G8
75,79 FBA_BA1 N8 BA1 VSS G8 75,79 FBA_BA2 M3 BA2 VSS B3
75,79 FBA_BA2 M3 B3 1D5V_VGA_S0 T1
BA2 VSS VSS
VSS T1 VSS A9
A9 75 CLKA0 J7 T9
VSS CK VSS

1
75 CLKA0 J7 CK VSS T9 75 CLKA0# K7 CK# VSS E1
K7 E1 R7803 P1

r
75 CLKA0# CK# VSS VSS
P1 1K33R2F-GP K9
VSS 75 FBA_CKE0 CKE
75 FBA_CKE0 K9 CKE VRAM_A VSSQ G1
G1 F9

2
VSSQ VSSQ

by
F9 75 DQMA0 D3 E8 VRAM1_VREF
VSSQ VRAM1_VREF DMU VSSQ
75 DQMA1 D3 E8 75 DQMA3 E7 E2
DMU VSSQ DML VSSQ

1
75 DQMA2 E7 DML VSSQ E2 VSSQ D8

1
D8 D1 C7817

1
VSSQ R7805 VSSQ
D1 75,79 -FBA_W E L3 B9 SCD01U50V2KX-L-GP

2
VSSQ 1K33R2F-GP C7802 WE# VSSQ
75,79 -FBA_W E L3
WE# VSSQ
B9 75,79 -FBA_CAS K3
CAS# VSSQ
B1 VRAM_A
75,79 -FBA_CAS K3 B1 VRAM_A SCD01U50V2KX-L-GP 75,79 -FBA_RAS J3 G9

2
CAS# VSSQ RAS# VSSQ
75,79 -FBA_RAS J3 G9 VRAM_A

An
RAS# VSSQ
H5TQ1G63DFR-11C-GP EA40-HW SB
H5TQ1G63DFR-11C-GP
B EA40-HW SB VRAM_A B
VRAM_A
72.51G63.H0U

nie
72.51G63.H0U
1D5V_VGA_S0 1D5V_VGA_S0
1D5V_VGA_S0
C7801
SCD1U10V2KX-L-GP
VRAM_A

C7803
SCD1U10V2KX-L-GP
VRAM_A

C7804
SCD1U10V2KX-L-GP
VRAM_A

C7805
SCD1U10V2KX-L-GP
VRAM_A

C7806
SCD1U10V2KX-L-GP
VRAM_A

C7810
SCD1U10V2KX-L-GP
VRAM_A

C7811
SCD1U10V2KX-L-GP
VRAM_A

C7812
SCD1U10V2KX-L-GP
VRAM_A

C7813
SCD1U10V2KX-L-GP
VRAM_A

C7814
SCD1U10V2KX-L-GP
VRAM_A
FOR VRAM1
CS
1

1
C7809
SC10U6D3V3MX-L-GP FOR VRAM2
2

2
VRAM_A

A
D EV
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM1,2 (1/4)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 78 of 102
5 4 3 2 1
 5 4 3 2 1

1D5V_VGA_S0
1D5V_VGA_S0
VRAM1
MDA[63..0] 75,78 VRAM2
K8 E3 MDA58 MDA[63..0] 75,78
VDD DQL0 MDA57 MDA43
K2 VDD DQL1 F7 K8 VDD DQL0 E3
N1 F2 MDA62 K2 F7 MDA42
VDD DQL2 MDA60 VDD DQL1 MDA45
R9 VDD DQL3 F8 N1 VDD DQL2 F2
B2 H3 MDA63 R9 F8 MDA40
VDD DQL4 MDA61 VDD DQL3 MDA46
D9 VDD DQL5 H8 B2 VDD DQL4 H3
G7 G2 MDA56 D9 H8 MDA41
VDD DQL6 MDA59 VDD DQL5 MDA44
R1 VDD DQL7 H7 G7 VDD DQL6 G2
N9 R1 H7 MDA47
VDD MDA51 VDD DQL7
D D7 N9 D

co
DQU0 MDA53 VDD MDA33
A8 VDDQ DQU1 C3 DQU0 D7
A1 C8 MDA50 A8 C3 MDA37
VDDQ DQU2 MDA52 VDDQ DQU1 MDA32
C1 VDDQ DQU3 C2 A1 VDDQ DQU2 C8
C9 A7 MDA48 C1 C2 MDA36
VDDQ DQU4 MDA54 VDDQ DQU3 MDA35
D2 VDDQ DQU5 A2 C9 VDDQ DQU4 A7
E9 B8 MDA49 D2 A2 MDA39

nfi
VDDQ DQU6 MDA55 VDDQ DQU5 MDA34
F1 VDDQ DQU7 A3 E9 VDDQ DQU6 B8
H9 F1 A3 MDA38
VDDQ VDDQ DQU7
H2 VDDQ DQSU C7 QSAP_6 75 H9 VDDQ
DQSU# B7 QSAN_6 75 H2 VDDQ DQSU C7 QSAP_4 75
VRAM3_VREF H1 B7 QSAN_4 75
VREFDQ VRAM3_VREF DQSU#

de
M8 VREFCA DQSL F3 QSAP_7 75 H1 VREFDQ
VRAM_ZQ3 L8 G3 QSAN_7 75 M8 F3 QSAP_5 75
ZQ DQSL# VRAM_ZQ4 VREFCA DQSL
L8 ZQ DQSL# G3 QSAN_5 75
ODT K1 FBA_ODT1 75
2

75,78 FBA_A0 N3 A0 ODT K1 FBA_ODT1 75

2
R7901 75,78 FBA_A1 P7 75,78 FBA_A0 N3
A1 R7904 A0
243R2F-L1-GP P3 L2 P7

nti
75,78 FBA_A2 A2 CS# -FBA_CS1 75 75,78 FBA_A1 A1
75,78 FBA_A3 N2 A3 RESET# T2 FBA_RST 75,78 243R2F-L1-GP 75,78 FBA_A2 P3 A2 CS# L2 -FBA_CS1 75
VRAM_A 75,78 FBA_A4 P8 75,78 FBA_A3 N2 T2 FBA_RST 75,78
1

A4 A3 RESET#
75,78 FBA_A5 P2 VRAM_A 75,78 FBA_A4 P8

1
A5 A4
75,78 FBA_A6 R8 A6 75,78 FBA_A5 P2 A5
75,78 FBA_A7 R2 A7 NC#L9 L9 75,78 FBA_A6 R8 A6

al,
75,78 FBA_A8 T8 A8 NC#L1 L1 75,78 FBA_A7 R2 A7 NC#L9 L9
75,78 FBA_A9 R3 A9 NC#J9 J9 75,78 FBA_A8 T8 A8 NC#L1 L1
75,78 FBA_A10 L7 A10/AP NC#J1 J1 75,78 FBA_A9 R3 A9 NC#J9 J9
75,78 FBA_A11 R7 A11 75,78 FBA_A10 L7 A10/AP NC#J1 J1
75,78 FBA_A12 N7 A12/BC# 75,78 FBA_A11 R7 A11
C C
75,78 FBA_A13 T3 A13 VSS J8 75,78 FBA_A12 N7 A12/BC#
75,78 FBA_A14 T7 A14 VSS M1 75,78 FBA_A13 T3 A13 VSS J8
75,78 FBA_A15 M7 M9 T7 M1

r
A15 VSS 75,78 FBA_A14 A14 VSS
VSS J2 75,78 FBA_A15 M7 A15 VSS M9
M2 P9 J2

efe
75,78 FBA_BA0 BA0 VSS VSS
75,78 FBA_BA1 N8 G8 1D5V_VGA_S0 75,78 FBA_BA0 M2 P9
BA1 VSS BA0 VSS
75,78 FBA_BA2 M3 BA2 VSS B3 75,78 FBA_BA1 N8 BA1 VSS G8
VSS T1 75,78 FBA_BA2 M3 BA2 VSS B3

1
VSS A9 VSS T1
75 CLKA1 J7 T9 R7902 A9
CK VSS 1K33R2F-GP VSS
75 CLKA1# K7 CK# VSS E1 75 CLKA1 J7 CK VSS T9
VSS P1 VRAM_A 75 CLKA1# K7 CK# VSS E1

r
75 FBA_CKE1 K9 P1

2
CKE VSS
VSSQ G1 75 FBA_CKE1 K9 CKE
F9 VRAM3_VREF G1 VRAM3_VREF
VSSQ VSSQ
D3 E8 F9

by
75 DQMA6 DMU VSSQ VSSQ

1
75 DQMA7 E7 DML VSSQ E2 75 DQMA4 D3 DMU VSSQ E8

1
D8 R7903 75 DQMA5 E7 E2 C7917
VSSQ 1K33R2F-GP C7902 DML VSSQ
D1 D8 SCD01U50V2KX-L-GP

2
VSSQ VSSQ
75,78 -FBA_W E L3 B9 VRAM_A SCD01U50V2KX-L-GP D1 VRAM_A

2
WE# VSSQ VSSQ
75,78 -FBA_CAS K3 CAS# VSSQ B1 2 VRAM_A 75,78 -FBA_W E L3 WE# VSSQ B9
75,78 -FBA_RAS J3 RAS# VSSQ G9 75,78 -FBA_CAS K3 CAS# VSSQ B1
75,78 -FBA_RAS J3 G9

An
RAS# VSSQ
EA40-HW SB
H5TQ1G63DFR-11C-GP EA40-HW SB
H5TQ1G63DFR-11C-GP
VRAM_A
B
VRAM_A B
72.51G63.H0U

nie
1D5V_VGA_S0 72.51G63.H0U
1D5V_VGA_S0

1D5V_VGA_S0
C7901
SCD1U10V2KX-L-GP
VRAM_A

C7903
SCD1U10V2KX-L-GP
VRAM_A

C7904
SCD1U10V2KX-L-GP
VRAM_A

C7905
SCD1U10V2KX-L-GP
VRAM_A

C7906
SCD1U10V2KX-L-GP
VRAM_A

C7910
SCD1U10V2KX-L-GP
VRAM_A

C7911
SCD1U10V2KX-L-GP
VRAM_A

C7912
SCD1U10V2KX-L-GP
VRAM_A

C7913
SCD1U10V2KX-L-GP
VRAM_A

C7914
SCD1U10V2KX-L-GP
VRAM_A
FOR VRAM3
1

CS
1

1
FOR VRAM4
2

2
1

C7909
SC10U6D3V3MX-L-GP
2

VRAM_A

A
D EV
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM3,4 (2/4)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 79 of 102

5 4 3 2 1
 5 4 3 2 1

1D5V_VGA_S0
VRAM8
1D5V_VGA_S0
VRAM7 MDB[63..0] 75,81
MDB[63..0] 75,81 K8 E3 MDB3
MDB20 VDD DQL0 MDB7
K8 VDD DQL0 E3 K2 VDD DQL1 F7
K2 F7 MDB17 N1 F2 MDB0
VDD DQL1 MDB18 VDD DQL2 MDB5
N1 VDD DQL2 F2 R9 VDD DQL3 F8
R9 F8 MDB19 B2 H3 MDB1
VDD DQL3 MDB22 VDD DQL4 MDB6
B2 VDD DQL4 H3 D9 VDD DQL5 H8
D9 H8 MDB21 G7 G2 MDB2
VDD DQL5 MDB23 VDD DQL6 MDB4
G7 VDD DQL6 G2 R1 VDD DQL7 H7
R1 H7 MDB16 N9
VDD DQL7 VDD MDB30
N9 VDD DQU0 D7
D D7 MDB14 A8 C3 MDB25 D

co
DQU0 MDB8 VDDQ DQU1 MDB31
A8 VDDQ DQU1 C3 A1 VDDQ DQU2 C8
A1 C8 MDB15 C1 C2 MDB27
VDDQ DQU2 MDB10 VDDQ DQU3 MDB28
C1 VDDQ DQU3 C2 C9 VDDQ DQU4 A7
C9 A7 MDB12 D2 A2 MDB26
VDDQ DQU4 MDB9 VDDQ DQU5 MDB29
D2 VDDQ DQU5 A2 E9 VDDQ DQU6 B8
MDB13 MDB24

nfi
E9 VDDQ DQU6 B8 F1 VDDQ DQU7 A3
F1 A3 MDB11 H9
VDDQ DQU7 VDDQ
H9 VDDQ H2 VDDQ DQSU C7 QSBP_3 75
H2 VDDQ DQSU C7 QSBP_1 75 DQSU# B7 QSBN_3 75
B7 QSBN_1 75 VRAM5_VREF H1
VRAM5_VREF DQSU# VREFDQ
H1 VREFDQ M8 VREFCA DQSL F3 QSBP_0 75

de
M8 F3 QSBP_2 75 VRAM_ZQ6 L8 G3 QSBN_0 75
VRAM_ZQ5 VREFCA DQSL ZQ DQSL#
L8 ZQ DQSL# G3 QSBN_2 75
ODT K1 FBB_ODT0 75
2

2
ODT K1 FBB_ODT0 75 75,81 FBB_A0 N3 A0
R8001 75,81 FBB_A0 N3 R8002 75,81 FBB_A1 P7
A0 A1
243R2F-L1-GP 75,81 FBB_A1 P7 A1 243R2F-L1-GP 75,81 FBB_A2 P3 A2 CS# L2 -FBB_CS0 75

nti
75,81 FBB_A2 P3 A2 CS# L2 -FBB_CS0 75 75,81 FBB_A3 N2 A3 RESET# T2 FBB_RST 75,81
VRAM_B 75,81 FBB_A3 N2 T2 FBB_RST 75,81 VRAM_B 75,81 FBB_A4 P8
1

1
A3 RESET# A4
75,81 FBB_A4 P8 A4 75,81 FBB_A5 P2 A5
75,81 FBB_A5 P2 A5 75,81 FBB_A6 R8 A6
75,81 FBB_A6 R8 A6 75,81 FBB_A7 R2 A7 NC#L9 L9
75,81 FBB_A7 R2 L9 75,81 FBB_A8 T8 L1

al,
A7 NC#L9 A8 NC#L1
75,81 FBB_A8 T8 A8 NC#L1 L1 75,81 FBB_A9 R3 A9 NC#J9 J9
75,81 FBB_A9 R3 A9 NC#J9 J9 75,81 FBB_A10 L7 A10/AP NC#J1 J1
75,81 FBB_A10 L7 A10/AP NC#J1 J1 75,81 FBB_A11 R7 A11
75,81 FBB_A11 R7 A11 75,81 FBB_A12 N7 A12/BC#
C 75,81 FBB_A12 N7 A12/BC# 75,81 FBB_A13 T3 A13 VSS J8 C
75,81 FBB_A13 T3 A13 VSS J8 75,81 FBB_A14 T7 A14 VSS M1
75,81 FBB_A14 T7 A14 VSS M1 75,81 FBB_A15 M7 A15 VSS M9

r
75,81 FBB_A15 M7 A15 VSS M9 VSS J2
J2 75,81 FBB_BA0 M2 P9

efe
VSS BA0 VSS
75,81 FBB_BA0 M2 BA0 VSS P9 75,81 FBB_BA1 N8 BA1 VSS G8
75,81 FBB_BA1 N8 G8 1D5V_VGA_S0 75,81 FBB_BA2 M3 B3
BA1 VSS BA2 VSS
75,81 FBB_BA2 M3 BA2 VSS B3 VSS T1
VSS T1 VSS A9

1
VSS A9 75 CLKB0 J7 CK VSS T9
75 CLKB0 J7 T9 R8003 75 CLKB0# K7 E1
CK VSS 1K33R2F-GP CK# VSS
75 CLKB0# K7 CK# VSS E1 VSS P1
VRAM_B

r
VSS P1 75 FBB_CKE0 K9 CKE
75 FBB_CKE0 K9 G1

2
CKE VSSQ
VSSQ G1 VSSQ F9
F9 VRAM5_VREF D3 E8

by
VSSQ 75 DQMB3 DMU VSSQ
75 DQMB1 D3 DMU VSSQ E8 75 DQMB0 E7 DML VSSQ E2

1
75 DQMB2 E7 DML VSSQ E2 VSSQ D8

1
D8 R8004 D1 VRAM5_VREF
VSSQ 1K33R2F-GP C8002 VSSQ
VSSQ D1 75,81 -FBB_WE L3 WE# VSSQ B9
75,81 -FBB_WE L3 B9 VRAM_B SCD01U50V2KX-L-GP 75,81 -FBB_CAS K3 B1

2
WE# VSSQ CAS# VSSQ

1
75,81 -FBB_CAS K3 B1 VRAM_B 75,81 -FBB_RAS J3 G9
2
CAS# VSSQ RAS# VSSQ C8017
75,81 -FBB_RAS J3 RAS# VSSQ G9

An
SCD01U50V2KX-L-GP

2
H5TQ1G63DFR-11C-GP VRAM_B
H5TQ1G63DFR-11C-GP EA40-HW SB
VRAM_B
VRAM_B
EA40-HW SB
72.51G63.H0U

nie
B B
72.51G63.H0U
1D5V_VGA_S0 1D5V_VGA_S0
1D5V_VGA_S0
C8001
SCD1U10V2KX-L-GP
VRAM_B

C8003
SCD1U10V2KX-L-GP
VRAM_B

C8004
SCD1U10V2KX-L-GP
VRAM_B

C8005
SCD1U10V2KX-L-GP
VRAM_B

C8006
SCD1U10V2KX-L-GP
VRAM_B

CS

C8010
SCD1U10V2KX-L-GP
VRAM_B

C8011
SCD1U10V2KX-L-GP
VRAM_B

C8012
SCD1U10V2KX-L-GP
VRAM_B

C8013
SCD1U10V2KX-L-GP
VRAM_B

C8014
SCD1U10V2KX-L-GP
VRAM_B
FOR VRAM5
1

1
FOR VRAM6
1
2

C8009

2
SC10U6D3V3MX-L-GP
2

VRAM_B

D Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM5,6 (3/4)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 80 of 102

5 4 3 2 1
 5 4 3 2 1

1D5V_VGA_S0
VRAM5
1D5V_VGA_S0
MDB[63..0] 75,80 VRAM6
K8 E3 MDB34 MDB[63..0] 75,80
VDD DQL0 MDB33 MDB58
K2 VDD DQL1 F7 K8 VDD DQL0 E3
N1 F2 MDB36 K2 F7 MDB57
VDD DQL2 MDB37 VDD DQL1 MDB59
R9 VDD DQL3 F8 N1 VDD DQL2 F2
B2 H3 MDB35 R9 F8 MDB56
VDD DQL4 MDB38 VDD DQL3 MDB63
D9 VDD DQL5 H8 B2 VDD DQL4 H3
G7 G2 MDB32 D9 H8 MDB61
VDD DQL6 MDB39 VDD DQL5 MDB60
R1 VDD DQL7 H7 G7 VDD DQL6 G2
N9 R1 H7 MDB62
VDD MDB48 VDD DQL7
D D7 N9 D

co
DQU0 MDB53 VDD MDB41
A8 VDDQ DQU1 C3 DQU0 D7
A1 C8 MDB50 A8 C3 MDB47
VDDQ DQU2 MDB55 VDDQ DQU1 MDB42
C1 VDDQ DQU3 C2 A1 VDDQ DQU2 C8
C9 A7 MDB51 C1 C2 MDB45
VDDQ DQU4 MDB54 VDDQ DQU3 MDB40
D2 VDDQ DQU5 A2 C9 VDDQ DQU4 A7
MDB49 MDB43

nfi
E9 VDDQ DQU6 B8 D2 VDDQ DQU5 A2
F1 A3 MDB52 E9 B8 MDB44
VDDQ DQU7 VDDQ DQU6 MDB46
H9 VDDQ F1 VDDQ DQU7 A3
H2 VDDQ DQSU C7 QSBP_6 75 H9 VDDQ
DQSU# B7 QSBN_6 75 H2 VDDQ DQSU C7 QSBP_5 75
VRAM7_VREF H1 B7 QSBN_5 75
VREFDQ DQSU#

de
M8 F3 QSBP_4 75 VRAM7_VREF H1
VRAM_ZQ7 VREFCA DQSL VREFDQ
L8 ZQ DQSL# G3 QSBN_4 75 M8 VREFCA DQSL F3 QSBP_7 75
VRAM_ZQ8 L8 G3 QSBN_7 75
ZQ DQSL#
2

ODT K1 FBB_ODT1 75

2
R8101 75,80 FBB_A0 N3 K1
A0 ODT FBB_ODT1 75
243R2F-L1-GP 75,80 FBB_A1 P7 R8104 75,80 FBB_A0 N3
A1 A0

nti
75,80 FBB_A2 P3 A2 CS# L2 -FBB_CS1 75 243R2F-L1-GP 75,80 FBB_A1 P7 A1
VRAM_B 75,80 FBB_A3 N2 T2 FBB_RST 75,80 75,80 FBB_A2 P3 L2 -FBB_CS1 75
1

A3 RESET# A2 CS#
75,80 FBB_A4 P8 VRAM_B 75,80 FBB_A3 N2 T2 FBB_RST 75,80

1
A4 A3 RESET#
75,80 FBB_A5 P2 A5 75,80 FBB_A4 P8 A4
75,80 FBB_A6 R8 A6 75,80 FBB_A5 P2 A5
75,80 FBB_A7 R2 L9 75,80 FBB_A6 R8

al,
A7 NC#L9 A6
75,80 FBB_A8 T8 A8 NC#L1 L1 75,80 FBB_A7 R2 A7 NC#L9 L9
75,80 FBB_A9 R3 A9 NC#J9 J9 75,80 FBB_A8 T8 A8 NC#L1 L1
75,80 FBB_A10 L7 A10/AP NC#J1 J1 75,80 FBB_A9 R3 A9 NC#J9 J9
75,80 FBB_A11 R7 A11 75,80 FBB_A10 L7 A10/AP NC#J1 J1
C 75,80 FBB_A12 N7 A12/BC# 75,80 FBB_A11 R7 A11 C
75,80 FBB_A13 T3 A13 VSS J8 75,80 FBB_A12 N7 A12/BC#
75,80 FBB_A14 T7 A14 VSS M1 75,80 FBB_A13 T3 A13 VSS J8

r
75,80 FBB_A15 M7 A15 VSS M9 75,80 FBB_A14 T7 A14 VSS M1
J2 75,80 FBB_A15 M7 M9

efe
VSS A15 VSS
75,80 FBB_BA0 M2 BA0 VSS P9 VSS J2
75,80 FBB_BA1 N8 BA1 VSS G8 75,80 FBB_BA0 M2 BA0 VSS P9
75,80 FBB_BA2 M3 BA2 VSS B3 75,80 FBB_BA1 N8 BA1 VSS G8
T1 1D5V_VGA_S0 75,80 FBB_BA2 M3 B3
VSS BA2 VSS
VSS A9 VSS T1
75 CLKB1 J7 CK VSS T9 VSS A9

1
75 CLKB1# K7 CK# VSS E1 75 CLKB1 J7 CK VSS T9
R8102

r
VSS P1 75 CLKB1# K7 CK# VSS E1
K9 1K33R2F-GP P1
75 FBB_CKE1 CKE VSS
VSSQ G1 VRAM_B 75 FBB_CKE1 K9 CKE
F9 G1 VRAM7_VREF

2 by
VSSQ VSSQ
75 DQMB6 D3 DMU VSSQ E8 VSSQ F9
75 DQMB4 E7 E2 VRAM7_VREF 75 DQMB5 D3 E8
DML VSSQ DMU VSSQ

1
VSSQ D8 75 DQMB7 E7 DML VSSQ E2
1

D1 D8 C8117
VSSQ VSSQ
1
L3 B9 R8103 D1 SCD01U50V2KX-L-GP
75,80 -FBB_WE

2
WE# VSSQ 1K33R2F-GP C8118 VSSQ
75,80 -FBB_CAS K3 CAS# VSSQ B1 75,80 -FBB_WE L3 WE# VSSQ B9 VRAM_B
75,80 -FBB_RAS J3 G9 VRAM_B SCD01U50V2KX-L-GP 75,80 -FBB_CAS K3 B1
2
RAS# VSSQ CAS# VSSQ

An
VRAM_B 75,80 -FBB_RAS J3 G9
2

RAS# VSSQ
H5TQ1G63DFR-11C-GP EA40-HW SB
H5TQ1G63DFR-11C-GP
VRAM_B EA40-HW SB
VRAM_B

nie
B B
1D5V_VGA_S0 72.51G63.H0U
72.51G63.H0U
1D5V_VGA_S0 1D5V_VGA_S0
C8101
SCD1U10V2KX-L-GP
VRAM_B

C8102
SCD1U10V2KX-L-GP
VRAM_B

C8103
SCD1U10V2KX-L-GP
VRAM_B

C8104
SCD1U10V2KX-L-GP
VRAM_B

C8105
SCD1U10V2KX-L-GP
VRAM_B

C8106
SCD1U10V2KX-L-GP
VRAM_B

FOR VRAM7
1

CS
C8110
SCD1U10V2KX-L-GP
VRAM_B

C8111
SCD1U10V2KX-L-GP
VRAM_B

C8112
SCD1U10V2KX-L-GP
VRAM_B

C8113
SCD1U10V2KX-L-GP
VRAM_B

C8114
SCD1U10V2KX-L-GP
VRAM_B
2

1
C8109
SC10U6D3V3MX-L-GP FOR VRAM8
2

2
VRAM_B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
D
EV
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM7,8 (4/4)
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 81 of 102

5 4 3 2 1
 5 4 3 2 1

DCBATOUT PWR_DCBATOUT_VGA_CORE
PG8201 Main source 2nd source
1 2

GAP-CLOSE-PWR 84.03664.037
PG8202 PU8202 PWR_DCBATOUT_VGA_CORE
1 2
FDMS3664S
84.03664.037
GAP-CLOSE-PWR PU8203 FDMS3664S
PG8203
1 2 84.03664.037 Muxless Muxless

1
PU8204 FDMS3664S PC8208 PC8209 PC8220

SC10U25V5KX-GP

SC10U25V5KX-GP
GAP-CLOSE-PWR

SCD1U50V3KX-L-GP
PG8204 EC8201 EC8202 84.03664.037

2
D D

SCD1U50V3KX-L-GP

SCD1U50V3KX-L-GP
PU8205

co
1 2 FDMS3664S Muxless

2
GAP-CLOSE-PWR
PG8205 PU8203 2 PU8204 2
1 2 3 3
1 4 1 4
GAP-CLOSE-PWR 10 10

nfi
PG8206 9 9
1 2 5V_S0 7 7
8 6 8 6
GAP-CLOSE-PWR 5 5

1
PG8207
1 2 PR8223 Mag. 1.0uH 10*10*4

de
2D2R3J-2-GP
GAP-CLOSE-PWR FDMS3600-02-RJK0215-COLAY-GP FDMS3600-02-RJK0215-COLAY-GP DCR=2.9~3.3mohm
Muxless
PG8208 1st = 84.03664.037 1st = 84.03664.037 Idc=18A, Isat=36A

2
1 2 2nd = 84.00920.037 2nd = 84.00920.037 EA40-HW VGA_CORE
SC
VGA_PVCC
GAP-CLOSE-PWR
PC8202
Muxless DY

1
SE68U25VM-6-GP

PT8202 PL8201
3rd = 84.08107.B37

nti
3rd = 84.08107.B37
1

2 1PWR_VGA_CORE_TON_1 PC8207 1 2
PU8201 SCD1U16V3KX-3GP IND-D68UH-36-GP

2
Muxless SCD1U50V3KX-L-GP RT8812AGQW-GP Muxless 2nd = 68.R6810.20J
2

74.08812.073

18
1 2PWR_VGA_CORE_UGATE1_R Muxless
PR8202 PR8201 PR8218

PVCC
al,
2D2R2F-GP
Muxless 499KR2F-1-GP 0R3J-L1-GP Muxless Design Current
PWR_DCBATOUT_VGA_CORE 1 2 1 2
PWR_VGA_CORE_TON PWR_VGA_CORE_UGATE1 = 26A
Muxless 9 TON UGATE1 2
DY OCP> 39A
EA40-HW SB
C 1 2 13 1 PWR_VGA_CORE_BOOT1
1 2 PWR_VGA_CORE_BOOT1_1
1 2 C
3D3V_VGA_S0 PGOOD BOOT1
PR8203 10KR2J-L-GP PR8210 PC8211 SCD1U50V3KX-L-GP PWR_DCBATOUT_VGA_CORE
Muxless 0R3J-L1-GP Muxless Muxless

r
PWR_VGA_CORE_EN 3 20 PWR_VGA_CORE_PHASE1
15,24,83,86 DGPU_PWROK EN PHASE1

efe
PWR_VGA_CORE_PSI 4 Muxless 19 PWR_VGA_CORE_LGATE1
PR8207 1 PSI LGATE1
76 VGA_CORE_VID 2 Muxless Muxless

1
0R2J-L-GP
Muxless 1 PR8224 2 Muxless PC8212 PC8213 PC8221
OCP setting

SC10U25V5KX-GP

SC10U25V5KX-GP

SCD1U50V3KX-L-GP
1 DY2 9K31R2F-GP

2
PC8203 PWR_VGA_CORE_VID 5 14 PWR_VGA_CORE_UGATE2
1 2 PWR_VGA_CORE_UGATE2_R PU8205 2 PU8206 2 Muxless
SC1000P50V3JN-GP-U VID UGATE2 PR8219 3 3
DY 0R3J-L1-GP Muxless

r
1 4 1 4
PWR_VGA_CORE_RGND 1 2 PWR_VGA_CORE_VREF 8 15 PWR_VGA_CORE_BOOT2 1 2 10 10
PC8201 SCD1U10V2KX-L-GP VREF BOOT2 PR8211

PWR_VGA_CORE_BOOT2_1
9 9
0R3J-L1-GP Muxless 7 7
1

by
PWR_VGA_CORE_REFIN7 16 PWR_VGA_CORE_PHASE2 8 6 8 6
PR8206 REFIN PHASE2
5 5
20KR2F-L3-GP
Muxless PWR_VGA_CORE_REFADJ
6 REFADJ 17 PWR_VGA_CORE_LGATE2 Mag. 1.0uH 10*10*4
LGATE2
2

PR8222
DCR=2.9~3.3mohm
2

FDMS3600-02-RJK0215-COLAY-GP FDMS3600-02-RJK0215-COLAY-GP
20KR2F-L3-GP
PWR_VGA_CORE_SS 11 12 PWR_VGA_CORE_VSNS 1st = 84.03664.037 1st = 84.03664.037 Idc=18A, Isat=36A
Muxless SS VSNS
2nd = 84.00920.037 2nd = 84.00920.037 EA40-HW SC
PR8208
2

An
1

1
1 2 PWR_VGA_CORE_VREF_R PC8205 DY 21 10 PWR_VGA_CORE_RGND PC8216 Muxless DY PL8202
2KR2F-L1-GP GND RGND
1 2
3rd = 84.08107.B37 3rd = 84.08107.B37
1

SCD1U50V3KX-L-GP
Muxless SC1000P50V3JN-GP-U IND-D68UH-36-GP

2
Muxless 2nd = 68.R6810.20J
1

3D3V_VGA_S0 VGA_CORE
B Muxless B
PC8223 EA40-HW SC

nie
SC2700P50V2KX-1-GP
2

Muxless Muxless
PWR_VGA_CORE_RGND
10KR2J-L-GP VGA_CORE
PR8258
Muxless Muxless

1
PT8207 PT8208
2

SE390U2D5VM-13-GP

SE390U2D5VM-13-GP
PC8204
1

ESR=6mohm

ESR=6mohm

ESR=6mohm
PR8257 1 2 PWR_VGA_CORE_PSI
76 VGA_CORE_PSI

2
PR8209 0R2J-L-GP
Muxless PR8212

CS
18KR2F-GP SCD01U50V2KX-L-GP 100R2F-L1-GP-U
2

Muxless DY Muxless
1

PC8226 PR8221
2

2
DY PR8259 0R0402-PAD
SCD1U50V3KX-L-GP

10KR2J-L-GP 1 2
2

NVVDD_SENSE 73
PWR_VGA_CORE_RGND

PWR_VGA_CORE_RGND

EA40-HW SB DY Del in 20120806 from Joey

1
PC8222
2

DY
PC8219 SC47P50V2JN-3GP

D
SC47P50V2JN-3GP PR8220 2nd = 77.53971.01L
2

0R0402-PAD
1 2 2nd = 77.53971.01L
3D3V_VGA_S0 NVGND_SENSE 73
Muxless
PR8256
1

1
10KR2J-L-GP PC8217
1 2 PWR_VGA_CORE_EN DY SC47P50V2JN-3GP PR8213
100R2F-L1-GP-U
2

Muxless Muxless
1

PC8225

2
1 2 DGPU_PWR_EN_D1
1 Wistron Confidential document, Anyone can not
83 DGPU_PWR_EN
SCD1U50V3KX-L-GP

PR8260 DY Duplicate, Modify, Forward or any other purpose

2

0R3J-L1-GP application without get Wistron permission

A 3 Muxless EV
A

2
DY
Wistron Corporation
PD8201 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
BAW56-5-GP Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8812A_VGA_CORE
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 82 of 102

5 4 3 2 1
 5 4 3 2 1

SY8208D for VGA_1D5V(For VRAM GDDR3) 1D5V_VGA_S0

PG8305
VGA1D5V_PWR

1 2
DCBATOUT PWR_DCBATOUT_VGA1D5V
GAP-CLOSE-PWR
PG8306
1 2

PG8302 GAP-CLOSE-PWR
1 2 PG8307
1 2

1
GAP-CLOSE-PWR
PG8303 PT8301 GAP-CLOSE-PWR

SE220U2VDM-8GP
1 2 DY PG8308

2
1 2
GAP-CLOSE-PWR
PG8304 GAP-CLOSE-PWR
1 2 PG8309
1 2
GAP-CLOSE-PWR
D GAP-CLOSE-PWR D
79.22719.20L PG8310

co
PWR_DCBATOUT_VGA1D5V
EA40-HW SB 1 2

GAP-CLOSE-PWR
PG8311
PL4801 change to 68.R681A.10A(Size 1 2
1

PC8304 PC8306 PC8307 issue and not face in ) GAP-CLOSE-PWR

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD01U50V2KX-L-GP

OCP setting PU8301

Freq=800KHz EA40-HW SC Iomax = 6A
2

nfi
High 16A
Muxless Muxless Muxless 3D3V_S0 PC8303
CYNTEC. 5*5*3 OCP >8A
Float 12A SCD1U25V3KX-L-GP DCR: 11~12mOhm
8 6 PWR_VGA1D5V_BOOT
1 PR8305 2 PWR_VGA1D5V_BOOT_R
1 2 Idc : 8.5 A , Isat : 14A
Low 8A IN BS
2

2D2R3F-L-GP VGA1D5V_PWR
PL8301
PR8331
EA40-HW SB 10KR2J-L-GP Muxless
Muxless 10 PWR_VGA1D5V_PHASE 1 2
LX
Muxless
1

de
1D5V_VGA_PG PWR_VGA1D5V_VFB 3D3V_S0 IND-D68UH-40-GP
2 4
PG FB

1
PC8309

1
PR8304 1 2 PWR_VGA1D5V_IMAX 3 7 PWR_VGA1D5V_BYP PR8306
1 2 PC8311 PC8312 PC8313 PC8314
ILMT BYP Muxless

SCD1U50V3KX-L-GP
0R2J-L-GP 0R2J-L-GP PG8301

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
OCP setting Muxless Muxless DY

2
DGPU_PWROK_1D5V 1 Muxless
EN GAP-CLOSE-PWR-3-GP
ENable

1 PWR_VGA1D5V_VFB_R2
9 5 PWR_VGA1D5V_LDO PC8305S
GND LDO

C1U6D3V2KX-L-1-GP
1
SY8208DQNC-GP-U

nti
PC8302S

2
Muxless

C1U6D3V2KX-L-1-GP
74.08208.K73

1
Muxless Muxless Muxless
EA40-HW SC
Muxless

2
Muxless
PR8307
PU8301 change to SY8208D New footprint

1
EA40-HW SB 158KR2F-L-GP PC8308
PU8301 change to 74.08208.K73 R1 DY

SC18P50V2JN-1-GP
EA40-HW SB Muxless

2
al,

2
PWR_VGA1D5V_VFB

1
PR8308
100KR2F-L3-GP R2
C C
Muxless

2
Vo=0.6x(1+R1/R2)
=0.6x(1+150/100)

r
=1.5

EA40-HW 1
3D3V_S0 to 3D3V_VGA_S0
1D05V_VTT to 1D05V_VGA_S0
efe
r
1D05V_VTT 3D3V_S0
U8301 1D05V_VGA_S0

15
GND PG8313
1 14
VIN1#1 VOUT1#14 1D05V_VGA_OUT2
2 13 1 2

by
5V_S0 DGPU_PWROK_R VIN1#2 VOUT1#13 VTT_CT_105VC_2
3 12
ON1 CT1 GAP-CLOSE-PWR
4 11
DGPU_PWR_EN VBIAS GND VTT_CT_3VC_1
5 10
ON2 CT2 PG8312 3D3V_VGA_S0
6 9
VIN2#6 VOUT2#9 3D3V_VGA_OUT1 PG8314
7 8 1 2
VIN2#7 VOUT2#8
1 2
1

GAP-CLOSE-PWR C8307
SCD1U10V2KX-L1-GP

TPS22966DPUR-GP C8305 C8303 GAP-CLOSE-PWR

1

2
SC330P50V2KX-3GP

SC330P50V2KX-3GP

C8313
2

SC22U6D3V3MX-1-GP

C8312 C8302 C8308 C8304 DY

Muxless
SC1U6D3V2KX-L-1-GP

PG8315
2

1
1

1
SC1U6D3V2KX-L-1-GP

1 2
SC22U6D3V3MX-1-GP

C8306

SCD1U10V2KX-L1-GP
An
GAP-CLOSE-PWR
2

2
SC22U6D3V3MX-1-GP

DY DY C8314

SC22U6D3V3MX-1-GP
DY
2

1
DY DY

Muxless Muxless Muxless

3D3V_S0

B B

nie
Muxless
1

R8302
10KR2F-L1-GP

R8311 DGPU_PWR_EN_G Muxless

1 2 G
2

15 DGPU_PWR_EN# 0R2J-L-GP
Muxless
D DGPU_PWR_EN
DGPU_PWR_EN 82
1

C8311 S
SC1KP50V2KX-L-1-GP

DY
Q8305
2

2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031 EA40-HW SC
Muxless

CS
86 DGPU_PWROK_R R8314 1 2
NON_GC6 0R2J-L-GP

D8301
R8312 1 2 DGPU_PWROK_R 1
15,24,82,86 DGPU_PWROK 0R2J-L-GP
Muxless
3 DGPU_PWROK_1D5V
DGPU_PWROK_1D5V 86
1

C8316 2
24,75,76 EC_FB_CLAMP
1
SC1KP50V2KX-L-1-GP

DY
BAT54C-12-GP R8313
2

100KR2J-4-GP
Muxless_CG6

D
Muxless_GC6
2

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DISCRETE VGA POWER

Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Friday, May 24, 2013 Sheet 83 of 102

5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Switchable GFX LCD(1/2)

Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 84 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Switchable GFX LCD(2/2)

Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 85 of 102
5 4 3 2 1
 5 4 3 2 1

EA40-HW SC Check test point

EA40-HW SC 24,44 AC_IN# EC8601 1 2 DY 24,27,61 Kbc_Pwrbtn# EC8617 1 2
3D3V_S0 1 AFTP1 SCD1U25V2KX-L-GP SC47P50V2JN-3GP
SPR1 SPR2 SPR3 SPR4 SPR5 24,44 AC_IN# EC8620 1 2 DY 24,27,61 Kbc_Pwrbtn# EC8618 1 2
H3 H1 H2 H10 H9 H6 3D3V_AUX_S5 1 AFTP7 SCD1U25V2KX-L-GP SC47P50V2JN-3GP
HOLE394R115-1-GP
HOLE394R115-1-GP
HOLE394R115-1-GP
HOLE394R115-1-GP HOLE335R115-GP HOLE335R115-GP 83 DGPU_PWROK_1D5V EC8602 1 2 24,27,61 Kbc_Pwrbtn# EC8619 1 2
SPRING-97-GP SPRING-13-GP-U SPRING-13-GP-U SPRING-43-GP-U 1 AFTP8 SC47P50V2JN-3GP SC47P50V2JN-3GP
3D3V_S5
7,17,26,36,46 IMVP_PWRGD EC8603 1 2 4,24,44,46 H_Prochot# EC8629 1 2
5V_S5 1 AFTP9 SC47P50V2JN-3GP SC47P50V2JN-3GP
7,17,26,36,46 IMVP_PWRGD EC8604 1 2 24 Prochot_Ec EC8630 1 2

1
1 AFTP10 SC47P50V2JN-3GP SC47P50V2JN-3GP

1
17,24 PM_PWRBTN# EC8605 1 2 EC8631 1 2
7,17,26,36,46 IMVP_PWRGD 15,24,82,83 Dgpu_Pwrok
4,36 H_CPUPWRGD 1 AFTP11 SC47P50V2JN-3GP SC47P50V2JN-3GP
7,36,37,46,48 1.05VTT_PWRGD EC8606 1 2
SPR1 DY 1 AFTP12 SC47P50V2JN-3GP
24,36 S5_ENABLE EC8621 1 2 EC8638 1 2
7,36,37,46,48 1.05VTT_PWRGD 15,24,82,83 Dgpu_Pwrok
34.15J03.001 1 AFTP13 SC47P50V2JN-3GP SC47P50V2JN-3GP
D
ZZ.00PAD.D01 34.15F09.002 34.15F09.002 34.43E24.001
17,24,30,36,58,65,73,88 PLT_RST#
24,36 ALL_SYS_PWRGD EC8607 1 2
SC47P50V2JN-3GP
83 Dgpu_Pwrok_R EC8636 1 2
SC47P50V2JN-3GP
D

34.43E24.001 EC8608 1 2 EC8637 1 2

zz.00pad.2n1

co
24,36 ALL_SYS_PWRGD 17,36 Pch_Pwrok
SC47P50V2JN-3GP SC47P50V2JN-3GP
EC8609 1 EC8642 1
放 放 Dimm Door打
Test Point放 打打打打打打 17,24 Kbc_Dpwrok 2
SC47P50V2JN-3GP
17,36 Pch_Pwrok 2
SC47P50V2JN-3GP
4,37 Sm_Dramrst# EC8610 1 2
SC47P50V2JN-3GP
17,24,30,36,58,65,73,88 PLT_RST# EC8611 1 2 17 Pch_Dpwrok EC8640 1 2
SC47P50V2JN-3GP SC470P50V2KX-3GP
H7 H8 EC8612 1 EC8641 1
24,36 ALL_SYS_PWRGD 2 17 Sys_Pwrok_R 2
HT65B85X925R29-S-GP HT65B85X925R29-S-GP H12 H13 H14 H15 H16 SC47P50V2JN-3GP SC470P50V2KX-3GP

nfi
HOLE276R154-GP HOLE276R154-GP HOLE276R154-GP HOLE276R154-GP HOLE276R154-GP H5 17,36 Pch_Pwrok EC8613 1 2

HOLE355X355R111-S1-GP
SC47P50V2JN-3GP
5V_Sys_Out_2 EC8614 1 2
AD_JK 1 AFTP2 SCD1U10V2KX-L1-GP

1
5V_S0 EC8615 1 2
1

AD_JK 1 AFTP3 SCD1U10V2KX-L1-GP 1D05v_Vga_S0 EC8648 1 2

1

1
5V_S5 EC8616 1 2 SC1KP50V2KX-L-1-GP
1 AFTP5 SCD1U10V2KX-L1-GP 1D05v_Vga_S0 EC8649 1 2
5V_S5 EC8622 1 2 SC1KP50V2KX-L-1-GP
1 AFTP6 SCD1U10V2KX-L1-GP

de
5V_S5 EC8647 1 2 Vga_Core EC8650 1 2
change back to SC screw hole 1/29 SCD1U10V2KX-L1-GP SC1KP50V2KX-L-1-GP
ZZ.00PAD.2T1 DC IN connector 3D3V_AUX_S5 EC8623 1 2
SCD1U10V2KX-L1-GP
Vga_Core EC8651 1 2
SC1KP50V2KX-L-1-GP
ZZ.00PAD.E01 ZZ.00PAD.571 3D3V_AUX_S5 EC8624 1 2
SCD1U10V2KX-L1-GP
Vga_Core EC8652 1 2
SC1KP50V2KX-L-1-GP
3D3V_AUX_S5 EC8625 1 2 Vga_Core EC8653 1 2
SCD1U10V2KX-L1-GP SC1KP50V2KX-L-1-GP
EC8626 1 2
24 EC_VSTBY
SC47P50V2JN-3GP

nti
BT+ 1 AFTP30 EC8627 1 2
24 EC_VSTBY
SC47P50V2JN-3GP 1D5v_Vga_S0 EC8655 1 2
1 AFTP31 BT+ 1 AFTP29 EC8628 1 2 SC1KP50V2KX-L-1-GP
24,27,61 KBC_PWRBTN# 24 EC_VSTBY
SC47P50V2JN-3GP 1D5v_Vga_S0 EC8656 1 2
SC1KP50V2KX-L-1-GP
1 AFTP44 1D5v_Vga_S0 EC8657 1 2
43 BAT_IN#_1
EA40-HW SB 1 AFTP45 SC1KP50V2KX-L-1-GP
43 BATA_SCL_1
1 AFTP46 1D5v_Vga_S0 EC8658 1 2
43 BATA_SDA_1
43 BAT_G 1 AFTP50 SC1KP50V2KX-L-1-GP

al,
1D5v_Vga_S0 EC8659 1 2
EA40-HW SC SC1KP50V2KX-L-1-GP
C AFTP25 EC8660 1 C
1 1D5v_Vga_S0 2
SC1KP50V2KX-L-1-GP
1 AFTP28 1D5v_Vga_S0 EC8661 1 2
1 AFTP94 SC1KP50V2KX-L-1-GP
30,33 SD_DATA0
1D5v_Vga_S0 EC8662 1 2
1 AFTP96 1 AFTP56 AFTE14P-GP SC1KP50V2KX-L-1-GP
30,33 SD_DATA1 24,26 FAN1_PWM
Battery connector 1D5v_Vga_S0 EC8663 1 2
1 AFTPB0 5V_S0 1 AFTP57 AFTE14P-GP SC1KP50V2KX-L-1-GP
30,33 SD_DATA2 EC8664 1
1D5v_Vga_S0 2
30,33 SD_DATA3 1 AFTPB1 26 FAN_TACH1_C 1 AFTP58 AFTE14P-GP SC1KP50V2KX-L-1-GP

r
1D5v_Vga_S0 EC8665 1 2
SC1KP50V2KX-L-1-GP
1 AFTPB2 EC8666 1 2
CARD_3V3
FAN connector 1D5v_Vga_S0

efe
SC1KP50V2KX-L-1-GP
1 AFTPB3 1D5v_Vga_S0 EC8667 1 2
30,33 SD_CMD
1 AFTP39 SC1KP50V2KX-L-1-GP
27,29 AUD_SPK1_L-
1 AFTPB4
30,33 SD_CLK
1 AFTP40
27,29 AUD_SPK1_L+
1 AFTPB5
33 SD_WP_Q
1 AFTP41
27,29 AUD_SPK1_R-
1 AFTPB6
33 SD_CD#_Q
DCBATOUT_LCD 1 AFTP26 1 AFTP42
27,29 AUD_SPK1_R+
1 AFTP27
DCBATOUT_LCD
Speaker connector 24 LID_CLOSE#_1
EC8633 1 2
AFTP21 EC8676 1 SC33P50V2JN-3GP

r
1 15 PCH_CRT_CLK 2DY
SC33P50V2JN-3GP
Card reader connector 1 AFTP24
15 PCH_CRT_DATA
EC8677 1 2DY 62 SWR
EC8634 1 2
1 AFTP90 SC33P50V2JN-3GP SC33P50V2JN-3GP
27,29 AUD_HP1_JACK_L2
5V_CRT_S0 EC8678 1 2DY EC8635 1 2
62 SWL
1 AFTP43 SC33P50V2JN-3GP SC33P50V2JN-3GP
27,29 AUD_HP1_JACK_R2

by
1 AFTP22 1 AFTP91 EC8639 1 2
52 BLON_OUT_C 27,29 AUD_HP1_JD# 18 CLK_PCI_LPC
EC8681 1 2DY SC33P50V2JN-3GP
61 DEBUG_DET#
1 AFTP20 1 AFTP92 SC33P50V2JN-3GP 17,24,30,36,58,65,73,88 PLT_RST# EC8643 1 2
52 LCD_BRIGHTNESS 27,29 COMBO_MIC
1 AFTPB7 EC8680 1 2DY SC33P50V2JN-3GP
31 RJ45_1 61 +5V_MINI_DEBUG
1 AFTP34 SCD1U10V2KX-L1-GP EC8644 1 2
52 DP_HPD0_C 18,24,65 LPC_FRAME#
1 AFTPB8 3D3V_S0 EC8679 1 2DY SC33P50V2JN-3GP
31 RJ45_2 AFTP23 SCD1U10V2KX-L1-GP EC8645 1
1 2
31 RJ45_3
1 AFTPB9 EA40-HW SB
LCDVDD
Lout connector 18,24,65 LPC_AD3
SC33P50V2JN-3GP
EC8684 1 2DY EC8646 1 2
17,24 PM_PWRBTN# 18,24,65 LPC_AD2
1 AFTPC0 SC33P50V2JN-3GP SC33P50V2JN-3GP
31 RJ45_4 AFTP32 EC8685 1 EC8654 1
1 4,36 H_CPUPWRGD 2DY 2

An
52 DP_TXN1_CPU_C 18,24,65 LPC_AD1
B 1 AFTPC1 SC33P50V2JN-3GP SC33P50V2JN-3GP B
31 RJ45_5 AFTP33 AFTP64 EC8682 1 EC8668 1
52 DP_TXP1_CPU_C 1 24,62 KCOL0 1 2DY 18,24,65 LPC_AD0 2
1 AFTPC2 24,36 S5_ENABLE SC33P50V2JN-3GP SC33P50V2JN-3GP
31 RJ45_6 AFTP36 AFTP65 EC8683 1
52 DP_TXN0_CPU_C 1 24,62 KCOL1 1 17,24,30,36,58,65,73,88 PLT_RST# 2DY
1 AFTPC3 SC33P50V2JN-3GP EC8670 1 2
31 RJ45_7 15 CRT_PCH_HPD
1 AFTP37 1 AFTP66 3D3V_S0 EC8686 1 2DY SC33P50V2JN-3GP
52 DP_TXP0_CPU_C 24,62 KCOL2
1 AFTPC4 SCD1U10V2KX-L1-GP
31 RJ45_8 AFTP47 AFTP67 EC8687 1 EC8671 1
52 DP_AUXP_CPU_C 1 24,62 KCOL3 1 3D3V_AUX_S5 2DY 24 AD_OFF 2DY
SCD1U10V2KX-L1-GP SC33P50V2JN-3GP
1 AFTPC5 1 AFTP48 1 AFTP68 3D3V_S5 EC8689 1 2DY EC8672 1 2 DY
31 LAN_ACT_LED#_C 52 DP_AUXN_CPU_C 24,62 KCOL4 17 PM_SLP_A#_R
SCD1U10V2KX-L1-GP SC33P50V2JN-3GP

nie
1 AFTPC6 1 AFTP69 5V_S5 EC8688 1 2DY EC8673 1 2
31 10M/100M/1G_LED#_C 24,62 KCOL5 17 PM_SLP_A#
SCD1U10V2KX-L1-GP SC33P50V2JN-3GP
EDP+MIC+TOUCH connector 24,62 KCOL6 1 AFTP70
1 AFTPC7 EC8690 1 2DY EC8674 1 2
31 CONN_PWR 73 PSW_CLR# 15 L_BKLT_CTRL
1 AFTP71 SC33P50V2JN-3GP SC33P50V2JN-3GP
24,62 KCOL7
1 AFTPC8 EC8675 1 2
31 CONN_PWR2 15 DP_HPD
1 AFTP72 EC8691 1 2DY SC33P50V2JN-3GP
24,62 KCOL8 24 LID_CLOSE#_1
SC33P50V2JN-3GP
EA40-HW SB 1 AFTP35 1 AFTP73 EC8692 1 2DY
27,52 INT_MIC_L_R 24,62 KCOL9 24 PWRLED SC33P50V2JN-3GP 3D3V_AUX_S5 EC8632 1 2
1 AFTP38 1 AFTP74 EC8693 1 2DY SCD1U10V2KX-L1-GP
LAN_RJ45 connector 27,52 AUD_GND 24,62 KCOL10 24 STDBY_LED SC33P50V2JN-3GP
1 AFTP75 EC8694 1 2DY EC8669 1 2
AMIC 24,62 KCOL11 24 DC_BATFULL SC33P50V2JN-3GP
3D3V_S0
SCD1U10V2KX-L1-GP

CS
1 AFTP76 EC8695 1 2DY
24,62 KCOL12 24 CHARGE_LED SC33P50V2JN-3GP
1 AFTP77 3D3V_AUX_S5 EC86A2 1 2 DY
24,62 KCOL13
SCD1U10V2KX-L1-GP
1 AFTP78 EC8696 1 2DY RTC_AUX_S5 EC86A3 1 2 DY
24,62 KCOL14 18 CLK_PCI_LPC
3D3V_S0 1 AFTP49 SC33P50V2JN-3GP SCD1U10V2KX-L1-GP
EA40-HW SB 1 AFTP79
24,62 KCOL15
17,24,30,36,58,65,73,88 PLT_RST# EC8697 1 2DY
1 AFTP80 SC33P50V2JN-3GP
24,62 KCOL16
5V_USB 1 AFTP93 1 AFTP98
62 TP_DATA
1 AFTP81
24,62 KCOL17
5V_USB 1 AFTPA3 1 AFTPA0 EC8699 1 2DY
62 TP_CLK 15 PCH_CRT_CLK
SC33P50V2JN-3GP

D
1 AFTPA8 1 AFTP95 1 AFTP82 EC8698 1 2DY
62 SWR 24,62 KROW0 15 PCH_CRT_DATA
SC33P50V2JN-3GP
1 AFTPA9 1 AFTP97 1 AFTP83
62 SWL 24,62 KROW1
1 AFTPD5 1 AFTPD1 1 AFTP99 1 AFTP84 17,24,30,36,58,65,73,88 PLT_RST# EC86A1 1 2DY
16,63 USB_PN0 15 TP_IN# 24,62 KROW2
A SC33P50V2JN-3GP A
1 AFTPD6 1 AFTPD2 1 AFTP85
16,63 USB_PP0 24,62 KROW3
1 AFTPD7 1 AFTPD3 1 AFTP86
16,63 USB_PN2 Touch Pad connector 24,62 KROW4
1 AFTPD8 1 AFTPD4 1 AFTP87
16,63 USB_PP2 24,62 KROW5
1 AFTP88
24,62 KROW6 EV
EA40-HW SC
1 AFTP89
24,62 KROW7
USBBD connector Normal KB connector Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

UNUSED PARTS/EMI Capacitors

Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Wednesday, May 22, 2013 Sheet 86 of 102
5 4 3 2 1
 5 4 3 2 1

D D

co
nfi
de
nti
C

al, C

refe
r by
B An B

nie
CS
D Wistron Confidential document, Anyone can not
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A EV A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

NFC
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 87 of 102

5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
al,
3D3V_S5

C C

1
DY
3D3V_S5

r
3D3V_S0

efe
TPM1
10KR2J-L-GP
R8801

2
1 2 INT_SERIRQ 20,24
R8802
LPCPD# 2 0R2J-L-GP

r
3 4 1 PM_SUS_STAT# 17
5 6 LPC_AD0 18,24,65
7 8

by
LPC_AD1 18,24,65
9 10 LPC_FRAME# 18,24,65 DY
11 12 CLK_PCI_TPM 18
17,24,30,36,58,65,73,86 PLT_RST# 13 14 LPC_AD2 18,24,65
17,24 PM_CLKRUN#_EC 15 16 LPC_AD3 18,24,65

An
FOX-CONN16D-GP
20.F2190.016

DY

nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
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application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPM
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 88 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
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application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Finger Print
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 89 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
B An B

nie
CS
Wistron Confidential document, Anyone can not
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EV

D
application without get Wistron permission

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A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Express Card
Size Document Number Rev
A
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 90 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
B An B

nie
CS
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
EV

D
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Smart Card socket

Size Document Number Rev
A
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 91 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
B An B

nie
CS
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
EV

D
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Switchable GFX eDP

Size Document Number Rev
A
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 92 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
B An B

nie
CS
Wistron Confidential document, Anyone can not
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EV

D
application without get Wistron permission

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21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Bottom Docking
Size Document Number Rev
A
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 93 of 102
5 4 3 2 1
 A B C D E

4 4

co
nfi
de
nti
3

al, 3

refe
r by
2 An 2

nie
CS
EV
D Wistron Confidential document, Anyone can not
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application without get Wistron permission
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Inter LAN WG1217LM

Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 94 of 102

A B C D E
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
B An B

nie
CS
Wistron Confidential document, Anyone can not
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EV

D
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

LAN Switch
Size Document Number Rev
A
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 95 of 102
5 4 3 2 1
 5 4 3 2 1

co
D D

nfi
de
nti
C
al, C

refe
r by
An
nie
B B

CS
EV
D
Wistron Confidential document, Anyone can not
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application without get Wistron permission

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A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH_XDP
Size Document Number Rev
A4
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 96 of 102
5 4 3 2 1
 A B C D E

4 4

co
nfi
de
nti
3 al, 3

refe
r by
2
An 2

nie
CS
D Wistron Confidential document, Anyone can not
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application without get Wistron permission
EV
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

table of content
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 97 of 102
 5 4 3 2 1

D D

co
nfi
de
nti
C

al, C

refe
r by
B An B

nie
CS
D Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A EV A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change History
Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 98 of 102
5 4 3 2 1
 5 4 3 2 1

SHARK BAY POWER UP SEQUENCE DIAGRAM

Intel-Power Up Sequence

D RTC_AUX_S5 -7 D

co
RTC_RST# AC AD+
Adapter in
(AC mode) 3D3V_AUX/5V_AUX 38

ECREST

5V_CHARGER_EN

nfi
3V_5V_EN AD_OFF_R SWITCH
40
-2 5V_CHARGER
5V_S5/3D3V_S5 3D3V_S5 -1
3V_5V_EN EN (3D3V_S5)
3V_5V_POK
3D3V_AUX -5 3V_5V_EN TPS22966 5V_S5
3D3V_AUX
PM_SLP_SUS SWITCH 36
-2 -1

de
TPS51225
3D3V_SUS 3V_5V_POK
PGOOD
RSMRST# DCBATOUT
AD+ SWITCH VIN
-5 3D3V_S5
PM_SUSWARN# 40 5V_AUX
5V_AUX
-4
AC_PRESENT 5V_CHARGER PM_SLP_SUS# TPS22966 3D3V_SUS

nti
5V_CHARGER_EN
EN (5V_S5) SWITCH 36
41 -3 2 3
(AC mode) (DC mode) KBC_PWRBTN_EC#

3V_5V_POK 5V_CHARGER_EN

PM_PWRBTN#
-7
-7_AC -4
3D3V_DSW

al,
DC 3V_5V_EN -2
BT+ ISL9519
Battery -6
PM_PWRBTN# 39 Charger
AC_IN
40 GPC4 GPE0
C PM_SLP_A# C

PM_SLP_S4# KBC_PWRBTN# 1b
1 GPE4 KBC

r
1D35V_VDDQ IT8587 PM_RSMRST#
PM_SLP_S4# GPB7 RSMRST#
GPD1
PM_PWRBTN#

efe
DDR_PG_CTRL PM_SLP_S3# GPG6 PWRBTN# Shark Bay
GPD0
CPU
PWR_VTT_EN Delay 99ms
1c
4 GPI7 GPD5 27
0D675V_S0
16
SYS_PWROK
PLTRST#
PM_SLP_S3# 5a 15
ALL_SYS_PWRGD EC_SLP_S4# APWROK PWROK
1D05V_VTT
EC_PM_SLP_S3#

r
8 5b
1.05VTT_PWRGD
14
5V_S0

by
3D3V_S0

1D5V_S0

VR_EN

VCC_Core DCBATOUT

An
DCBATOUT
VIN
DDR_PG_OUT 0D675V_S0
S3 VTT 8
VIN
10
DGPU_PWR_EN#(Discrete only)
TPS51117 + VCC_CORE
EC_SLP_S4# 1D35V_S3 OUTPUT
3D3V_VGA_S0(Discrete only) S5 TPS51206 VOUT 6 VR
B
VGA_CORE(Discrete only) VDDQ_VREF
TPS51622 11 B
5a

nie
VTTREF 9 VR_EN
VR_ON PGOOD IMVP_PWRGD
DGPU_PWROK(Discrete only)
RUNPWROK
46 PGOOD
1D5V_VGA_S0(Discrete only)

1D05V_VGA_S0(Discrete only) DCBATOUT

7
1D05V_VTT
VIN 1D05V_S0 3D3V_S0
5b VOUT B E

CS
SY8208 1.05VTT_PWRGD
EC_PM_SLP_S3# PGOOD
EN DGPU_PWR_EN# TPS22966 3D3V_VGA_S0 DGPU_PWROK TPS22966 1D05V_VGA_S0
46
7a SWITCH 36 SWITCH 83
A D

3D3V_S5

1.05VTT_PWRGD
7

D
VIN 1D5V_S0 DCBATOUT DCBATOUT
5b VOUT
ALL_SYSTEM_PWRGD
SYW232 PWR_1D5V_PG
EC_PM_SLP_S3# PGOOD C E
EN VIN VIN
H_VR_EN 46
CPU CORE Power 7a VGA_CORE 1D5V_VGA_S0
OUTPUT OUTPUT
+VCC_CORE <3ms
D
CLK_CPU_BCLK
RT8812 D SY8208 F
CLKIN_BCLK Stable B 3D3V_VGA_S0 DGPU_PWROK
en PGOOD DGPU_PWROK en PGOOD 1D5V_VGA_PG
5V_S5
IMVP_PWRGD
7
PCH_PWROK EC_PM_SLP_S3# TPS22966 5V_S0
A A
SWITCH 36
5b
3D3V_S5
H_CPUPWRGD
7
To KBC GPI7 delay 99ms to PCH TPS22965 3D3V_S0
ALL_SYSTEM_PWRGD Wistron Confidential document, Anyone can not
SYS_PWRGD SWITCH 36 Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
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PLT_RST#

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Sequence
Size Document Number Rev
A1
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 99 of 102

5 4 3 2 1
 5 4 3 2 1

Power Shape
Regulator LDO Switch
Adapter
DCBATOUT

+AD
D
RT8812 SY8208 D

co
P1403EV8 TPS51622 RT8207M
SY8208

VGA_CORE 1D5V_VGA_S0
P1403EV8

nfi
Charger
VCC_CORE
1D05V_VTT
1D35V_S3

de
BQ24737RGRR

Battery 0D675V_S0

nti TPS51225CRUKR

C 5V_CHARGER
al, 3D3V_S5 C

TPS22966DPUR
r efe
5V_S5

SY6288
5V_S0

G5244A31U
r
SYW232DFC by
TPS22965DSGR SY6288

B 5V_USB
3D3V_SUS 1D5V_S0
3D3V_S0
An
3D3V_IOAC B

For DS3
For IOAC
nie
CS
SY6288CCAC

ODD_PWR_5V
TLV70233DBVR

DP_VDDD
TPS22966DPUR RT9724GB
D Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A
LCDVDD EV A

3D3V_VGA_S0
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram

Size Document Number Rev
A3
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 100 of 102
5 4 3 2 1
 A B C D E

PCH SMBus Block Diagram KBC SMBus Block Diagram

3D3V_S5 3D3V_S0

1 1
3D3V_S0

co
3D3V_S0

RAM 1 & 2
SMB_CLK PCH_SMBCLK
SMBCLK SCL

nfi
SMB_DATA PCH_SMBDATA
SMBDATA SDA
TouchPad Conn.
3D3V_S5 TPDATA
2N7002SPT PSDAT1 TPDATA
TPCLK
PSCLK1 TPCLK
RAM 3 & 4

SML1CLK
SML1_CLK
SML1_DATA To KBC de PCH_SMBCLK
PCH_SMBDATA
SCL
SDA
3D3V_AUX_S5

nti
SML1DATA

3D3V_S5 TP Battery Conn.

PCH_SMBCLK
SCL BAT_SCL BATA_SCL_1
PCH_SMBDATA SMCLK0 CLK_SMB

al,
SDA BAT_SDA BATA_SDA_1
Level Thermal SMDAT0 DAT_SMB

Shift Sensor SMBus address:16

2 SML0_CLK KBC 2

SML0CLK
SML0_DATA
IT8587 ISL9519
SML0DATA

r
SCL
SDA

efe
3D3V_S0 5V_S0

CPU SMBus address:12

r
PCH_HDMI_CLK DDC_CLK_HDMI 3D3V_S5
DDPB_CTRLCLK
PCH_HDMI_DATA
Level DDC_DATA_HDMI
HDMI CONN

by
DDPB_CTRLDATA
Shift

SML1_CLK
PA_AUX_P SMLCLK1 SCL
DDPC_CTRLCLK
THUNDERBOLT
SML1_DATA PCH

An
PA_AUX_N SMLDAT1 SDA
DDPC_CTRLDATA

AUX_CHP

3
Display Port Switch AUX_CHN THUNDERBOLT Conn. 3

nie
CS
4
D 4

Wistron Confidential document, Anyone can not

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application without get Wistron permission
EV

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21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
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Title

SMBUS BLOCK DIAGRAM

Size Document Number Rev
A2
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 101 of 102
A B C D E
 A B C D E

Thermal Block Diagram Audio Block Diagram

1 1

SCL1
SML1_CLK
LEVEL
co D+
P2800_DXP
SPK-OUT-L-
SPK-OUT-L+
SPEAKER

nfi
SML1_DATA SHIFT
SDA1
SPK-OUT-R-
NCT_DATA
NCT_CLK

System D-
P2800_DXN SPK-OUT-R+
SPEAKER
KBC Place near CPU

IT8587 Thermal
NCT7718W de 3D3V_S0
PWM CORE Codec
ALC282

nti
PWM4 GPD6
SDA HPOUT-L/PORT-T-L
PH
FAN_TACH1
FAN1_PWM

SCL ALERT# HPOUT-R/PORT-T-R

5V
MIC2-L/PORT-F-L
HP

al,
PURE_HW_SHUTDOWN# 3V/5V
T_CRIT#
THERM_SYS_SHDN# 2N7002 D
IMVP_PWRGD
EN MIC2-R/PORT-F-R OUT
S G PGOOD SENSE_A
2 2
VIN Put under CPU(T8 HW shutdown) VR
FAN Conn.

r efe
MIC1-L/PORT-B-L
MIC1-R/PORT-B-R
SENSE_A
MIC
IN

r by
DMIC-CLK
DMIC-DATA
DMIC

3 An 3

nie
CS
D Wistron Confidential document, Anyone can not
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application without get Wistron permission
4 4
EV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
THERMAL/AUDIO BLOCK DIAGRAM
Size Document Number Rev
Custom
EA40_HW ULT 1
Date: Monday, May 13, 2013 Sheet 102 of 102
A B C D E