Hitachi 32LD8700 LCD

No.
0210
32LD8700C 32LD8700U 32LD8700TU 32LD8600 32LD8A10 37LD8600 37LD8700C 37LD8700U
Data contained within this Service manual is subject to alteration for improvement. Les donnes fournies dans le prsent manuel dentretien peuvent faire lobjet de modifications en vue de perfectionner le produit. Die in diesem Wartungshandbuch enthaltenen Spezifikationen knnen sich zwecks Verbesserungen ndern.
SERVICE MANUAL MANUEL D'ENTRETIEN WARTUNGSHANDBUCH
CAUTION:
Before servicing this chassis, it is important that the service technician read the Safety Precautions and Product Safety Notices in this service manual.
ATTENTION:
Avant deffectuer lentretien du chssis, le technicien doit lire les Prcautions de scurit et les Notices de scurit du produit prsents dans le prsent manuel.
VORSICHT:
Vor ffnen des Gehuses hat der Service-Ingenieur die Sicherheitshinweise und Hinweise zur Produktsicherheit in diesem Wartungshandbuch zu lesen.
SPECIFICATIONS AND PARTS ARE SUBJECT TO CHANGE FOR IMPROVEMENT
COLOUR TELEVISION October 2006
TABLE OF CONTENTS
INTRODUCTION TUNER IF PART (TDA9886) MULTI STANDARD SOUND PROCESSOR VIDEO SWITCH TEA6415 AUDIO AMPLIFIER STAGE WITH TPA3004D2 MICROCONTROLLER EEPROM 24C32 CLASS AB STEREO HEADPHONE DRIVER TDA1308 SAW FILTERS IC DESCRIPTIONS 11.1. TEA6415C 11.1.1. General Description 11.1.2. Features 11.1.3. Pinning 11.2. 24LC02 11.2.1. Description 11.2.2. Features 11.2.3. Pinning 11.3. TCET1102G Optocoupler 11.3.1. General Description 11.3.2. General Features 11.3.3. Applications 11.4. SVP-EX 52 11.4.1. General Description 11.5. TL431 11.5.1. General Description 11.5.2. Features 11.6. 24C32 11.6.1. General Description 11.6.2. Features 11.6.3. Pinning 11.7. 74LVC14A 11.7.1. Description 11.7.2. Features 11.7.3. Pinning 11.8. TEA6420 11.8.1. Features 11.8.2. Description 11.8.3. Pin Connections 11.9. CS4334 11.9.1. Features 11.9.2. General Description 11.9.3. Pin Descriptions 11.10. GAL16LV8 11.10.1. Description 11.10.2. Features 11.10.3. Pin Connections 11.11. K6R4008V1D 11.11.1. Description 11.11.2. Features 11.11.3. Pin Description 11.12. L6562 11.12.1. Features 11.12.2. Description 11.12.3. Pin Description and Descriptions i TFT TV Service Manual 1 2 3 4 5 6 7 8 9 10 11 1 1 1 2 2 2 3 3 3 3 4 5 5 5 5 6 6 6 6 7 7 7 8 8 8 8 8 8 8 8 8 9 10 10 10 10 11 11 11 11 11 11 11 12 12 12 12 13 13 13 13 14 14 14 14 15
11.13. LM1117 11.13.1. General Description 11.13.2. Features 11.13.3. Applications 11.13.4. Connection Diagrams 11.14. LM317 11.14.1. General Description 11.14.2. Features 11.14.3. Pin Description 11.15. LM809 11.15.1. General Description 11.15.2. Features 11.15.3. Pinning 11.16. MSP34X1G 11.16.1. Introduction 11.16.2. Features 11.16.3. Pin Connections 11.17. M29W040B 11.17.1. Description 11.17.2. Features 11.17.3. Pin Descriptions 11.18. MC33202 11.18.1. General Description 11.18.2. Features 11.18.3. Pin Connections 11.19. PCF8574 11.19.1. General Description 11.19.2. Features 11.19.3. Pinning 11.20. PI5V330 11.20.1. General Description 11.21. SDA55XX (SDA5550) 11.21.1. General Description 11.22. Sil 9993 11.22.1. General Description 11.22.2. Features 11.23. NCP1014 11.23.1. General Description 11.23.2. Features 11.23.3. Pin Description and Descriptions 11.24. SN74CB3Q3305 11.24.1. General Description 11.24.2. Features 11.24.3. Pin Connections 11.25. ST24LC21 11.25.1. Description 11.25.2. Features 11.25.3. Pin Connections 11.26. LM2576 11.26.1. General Description 11.26.2. Features 11.26.3. Pin Description 11.27. TDA1308 11.27.1. General Description 11.27.2. Features 11.27.3. Pinning
15 15 15 15 16 16 16 16 16 16 16 16 17 17 17 18 18 20 20 20 21 21 21 21 21 22 22 22 22 23 23 23 23 23 23 24 24 24 24 25 25 25 25 26 26 26 26 26 27 27 27 27 27 27 27 28
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12
13 14
15 16 17
11.28. TDA9886 11.28.1. General Description 11.28.2. Features 11.28.3. Pinning 11.29. TPA3004D2 11.29.1. General Description 11.29.2. Features 11.29.3. Pinning 11.30. PA672T 11.30.1. General Description 11.30.2. Features 11.30.3. Pin Connection 11.31. VPC3230D 11.31.1. General Description 11.31.2. Pin Connections and Short Descriptions SERVICE MENU SETTINGS 12.1. Picture Adjust 12.2. SOUND1 12.3. SOUND 2 12.4. Options 12.5. TV Norm 12.6. Features 12.7. Teletext 12.8. Source 12.9. Menu Languages 1 & 2 BLOCK DIAGRAM SCHEMATIC DIAGRAMS 14.1. Main Board 14.2. Power Board 14.3. Front AV Board 14.4. Amplifier Board CIRCUIT BOARD DIAGRAMS 15.1. Main Board SPARES PARTLIST WALL MOUNT TEMPLATE DIAGRAM (32-INCH MODELS ONLY)
28 28 28 28 29 29 29 30 31 31 31 31 31 31 32 33 33 34 34 34 35 35 35 35 35 36 37 37 45 50 51 52 52 53 54
iii TFT TV Service Manual
1. INTRODUCTION
TFT TV is a progressive TV control system with built-in de-interlacer and scaler. It uses a 1366*768 panel with 16:9 aspect ratio. The TV is capable of operation in PAL, SECAM, NTSC (playback) colour standards and multiple transmission standards as B/G, D/K, I/I, and L/L including German and NICAM stereo. Sound system output is supplying 2x8W (10%THD) for stereo 8 speakers. The chassis is equipped with many inputs and outputs allowing it to be used as a center of a media system. It supports the following peripherals: 2 SCART sockets 1 AV input (CVBS + Stereo Audio) 1 SVHS input 1 Stereo Headphone input 1 Component input (YPbPr + Stereo Audio) 1 D-Sub 15 PC input 1 HDMI input 1 Stereo audio input for PC Audio line out is taken from the scart with given scart-to-line out connector
2. TUNER
The tuners used in the design are combined VHF, UHF tuners suitable for CCIR systems B/G, H, L, L, I/I, and D/K. The tuning is available through the digitally controlled I2C bus (PLL). Below you will find info on one of the Tuners in use. General description of UV1316: The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L, I and I. The low IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient suppression of triple transient. Features of UV1316: 1. Member of the UV1300 family small sized UHF/VHF tuners 2. Systems CCIR: B/G, H, L, L, I and I; OIRT: D/K 3. Digitally controlled (PLL) tuning via I2C-bus 4. Off-air channels, S-cable channels and Hyper band 5. World standardised mechanical dimensions and world standard pinning 6. Compact size 7. Complies to CENELEC EN55020 and EN55013 Pinning: 1. Gain control voltage (AGC) 2. Tuning voltage 3. IC-bus address select 4. IC-bus serial clock 5. IC-bus serial data 6. Not connected 7. PLL supply voltage 8. ADC input 9. Tuner supply voltage 10. Symmetrical IF output 1 11. Symmetrical IF output 2
: : : : : :
4.0V, Max: 4.5V Max: 5.5V Min:-0.3V, Max: 5.5V Min:-0.3V, Max: 5.5V 5.0V, Min: 4.75V, Max: 5.5V 33V, Min: 30V, Max: 35V
3. IF PART (TDA9886)
The TDA9886 is an alignment-free multistandard (PAL, SECAM and NTSC) vision and sound IF signal PLL. The following figure shows the simplified block diagram of the integrated circuit. The integrated circuit comprises the following functional blocks: VIF amplifier, Tuner and VIF-AGC, VIF-AGC detector, Frequency Phase-Locked Loop (FPLL) detector, VCO and divider, Digital acquisition help and AFC, Video demodulator and amplifier, Sound carrier trap, SIF amplifier, SIF-AGC detector, Single reference QSS mixer, AM demodulator, FM demodulator and
1 TFT TV Service Manual
acquisition help, Audio amplifier and mute time constant, IC-bus transceivers and MAD (module address), Internal voltage stabilizer.
CAGC(pos) VIF-PLL filter external reference signal or 4MHz crystal
(1)
TOP TAGC 9(8) 14(15) CAGC(neg) TUNER AGC VIF-AGC VAGC 16 CBL RC VCO DIGITAL VCO CONTROL AFC DETECTOR VPLL 19(21) REF 15(16) AFC 21(23)
VIF2 2(31) VIF1 1(30) VIF-PLL SOUND TRAPS 4.5 to 6.5 MHz
(18)17 CVBS video output: 2Vp-p (1.1Vp-p without trap) (7)8 AUD (3)5 DEEM de-emphasis network audio output
TDA9885 TDA9886
SIF2 24(27) SIF1 23(25) SINGLE REFERENCE QSS MIXER INTERCARRIER MIXER AND AM DEMODULATOR MAD OUTPUT PORTS IIC-BUS TRANSCEIVER NARROW-BAND FM-PLL DEMODULATOR AUDIO PROCESSING AND SWITCHES
(4)6 AFD CAF
SUPPLY
SIF AGC CAGC
(6, 12, 13, 14, 17, 19, 25, 28, 20(22) 18(20) 29, 32) 13 VP AGND n.c.
3(1) 22(24) 11(10) 10(9) 7(5) 12(11) OP1 OP2 SCL SDA DGND SIGMAD
4(2) FMPLL FM-PLL filter
sound intercarrier output and MAD select (1) Not connected for TDA9885
4. MULTI STANDARD SOUND PROCESSOR

The MSP34x1G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on a single chip. These TV sound processing ICs include versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is performed alignment free. Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo Radio standard. Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP34x1G has optimum stereo performance without any adjustments.
5. VIDEO SWITCH TEA6415

In case of three or more external sources are used, the video switch IC TEA6415 is used. The main function of this device is to switch 8 video-input sources on the 6 outputs. Each output can be switched on only one of each input. On each input an alignment of the lowest level of the signal is made (bottom of sync. top for CVBS or black level for RGB signals). Each nominal gain between any input and output is 6.5dB.For D2MAC or Chroma signal the alignment is switched off by forcing, with an external resistor bridge, 5VDC on the input. Each input can be used as a normal input or as a MAC or Chroma input (with external Resistor Bridge). All the switching possibilities are changed through the BUS. Driving 75ohm load needs an external resistor. It is possible to have the same input connected to several outputs.
6. AUDIO AMPLIFIER STAGE WITH TPA3004D2

The TPA3004D2 is a 9-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied stereo speakers. The TPA3004D2 can drive stereo speakers as low as 8 . The high efficiency of the TPA3004D2 eliminates the need for external heatsinks when playing music. Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a range of gain from 40 dB to 36 dB. Line outputs, for driving external headphone amplifier inputs, are also dc voltage controlled with a range of gain from 56 dB to 20 dB. An integrated 5-V regulated supply is provided for powering an external headphone amplifier. 2 TFT TV Service Manual
7. MICROCONTROLLER
The Micronas SDA 55xx TV microcontroller is dedicated to 8 bit applications for TV control and provides dedicated graphic features designed for modern low class to mid range TV sets. The SDA 55xx provides also an integrated general purposefully 8051-compatible microcontroller with specific hardware features especially suitable in TV sets. The microcontroller core has been enhanced to provide powerful features such as memory banking, data pointers and additional interrupts, etc. The internal XRAM consists of up to 16 kBytes. The microcontroller provides an internal ROM of up to 128 kBytes. ROMless versions can access up to 1 MByte of external RAM and ROM. The 8-bit microcontroller runs at 33.33 MHz internal clock. SDA 55xx is realized in 0.25 micron technology with 2.5 V supply voltage for the core and 3.3 V for the I/O port pins to make them TTL compatible. Based on the SDA 55xx microcontroller the MINTS software package was developed and provides dedicated device drivers for many Micronas video & audio products and includes a full blown TV control SW for the PEPER application chassis. The SDA 55xx is also supported with powerful design tools like emulators from Hitex, Kleinhenz, iSystems, the Keil C51 Compiler and TEDIpro OSD development SW by Tara Systems.
8. EEPROM 24C32
The Microchip Technology Inc. 24C32 is a 4Kx8 (32 Kbit) Electrically Erasable PROM. This device has been developed for advanced, low power applications such as personal communications or data acquisition. The 24C32 features an input cache for fast write loads with a capacity of eight 8-byte pages, or 64 bytes. It also features a fixed 4K-bit block of ultra-high endurance memory for data that changes frequently. The 24C32 is capable of both random and sequential reads up to the 32K boundary. Functional address lines allow up to 8 - 24C32 devices on the same bus, for up to 256K bits address space. Advanced CMOS technology makes this device ideal for low-power non-volatile code and data applications.
9. CLASS AB STEREO HEADPHONE DRIVER TDA1308

The TDA1308 is an integrated class AB stereo headphone driver contained in a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications.
10. SAW FILTERS

K9656M: Standard: B/G D/K I L/L Features TV IF audio filter with two channels Channel 1 (L) with one pass band for sound carriers at 40.40 MHz (L) and 39.75 MHz (L- NICAM) Channel 2 (B/G, D/K, L, I) with one pass band for sound carriers between 32.35 MHz and 33.40 MHz Terminals Tinned CuFe alloy Pin configuration 1 Input 2 Switching input 3 Chip carrier - ground 4 Output 5 Output K3958M: Standard: B/G D/K I L/L
Features TV IF video filter with Nyquist slopes at 33.90 MHz and 38.90 MHz Constant group delay Terminals Tinned CuFe alloy Pin configuration 1 Input 2 Input - ground 3 Chip carrier - ground 4 Output 5 Output
11. IC DESCRIPTIONS
TEA6415C 24LC02 TCET1102G OPTOCOUPLER SVP-EX 52 TL431 24C32 74LVC14A TEA6420D CS4334 GAL16LV8 K6R4008V1 L6562D LM1117 LM317T LM809 MSP3410G M29W040B MC33202 PCF8574 PI5V330 SDA5550 SII9993 NCP1014 SN74CB3Q3305 ST24LC21 LM2576 MC34063 TDA1308 TDA9886T TPA3002D2 PA672T VPC3230D
11.1.
TEA6415C
11.1.1. General Description The main function of the IC is to switch 8 video input sources on 6 outputs. Each output can be switched on only one of each input. On each input an alignment of the lowest level of the signal is made (bottom of synch. top for CVBS or black level for RGB signals). Each nominal gain between any input and output is 6.5dB. For D2MAC or Chroma signal the alignment is switched off by forcing, with an external resistor bridge, 5 VDC on the input. Each input can be used as a normal input or as a MAC or Chroma input (with external resistor bridge). All the switching possibilities are changed through the BUS. Driving 75 load needs an external transistor. It is possible to have the same input connected to several outputs. The starting configuration upon power on (power supply: 0 to 10V) is undetermined. In this case, 6 words of 16 bits are necessary to determine one configuration. In other case, 1 word of 16 bits is necessary to determine one configuration. 11.1.2. Features 20MHz Bandwidth Cascadable with another TEA6415C (Internal address can be changed by pin 7 voltage) 8 Inputs (CVBS, RGB, MAC, CHROMA,...) 6 Outputs Possibility of MAC or chroma signal for each input by switching-off the clamp with an external resistor bridge Bus controlled 6.5dB gain between any input and output 55dB crosstalk at 5mHz Fully ESD protected 11.1.3. 1. Input 2. Data 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. Input Clock Input Input Prog Input Vcc Input Input Ground Output Output Output Output Output Output Ground Input Pinning : : : : : : : : : : : : : : : : :
Max Low level High level Max Low level High level Max Max Max 12V Max Max 5.5Vpp, 5.5Vpp, 5.5Vpp, 5.5Vpp, 5.5Vpp, 5.5Vpp,
: 2Vpp, Input Current: 1mA, Max : 3mA : -0.3V Max: 1.5V, : 3.0V Max : Vcc+0.5V : 2Vpp, Input Current: 1mA, Max : 3mA : -0.3V Max: 1.5V, : 3.0V Max : Vcc+0.5V : 2Vpp, Input Current: 1mA, Max : 3mA : 2Vpp, Input Current: 1mA, Max : 3mA
: 2Vpp, Input Current: 1mA, Max: 3mA : 2Vpp, Input Current: 1mA, Max : 3mA : 2Vpp, Input Current: 1mA, Max : 3mA Min : 4.5Vpp Min : 4.5Vpp Min : 4.5Vpp Min : 4.5Vpp Min : 4.5Vpp Min : 4.5Vpp Max : 2Vpp, Input Current : 1mA, Max : 3mA
11.2.
24LC02
11.2.1. Description The Microchip Technology Inc. 24AA02/24LC02B (24XX02*) is a 2 Kbit Electrically Erasable PROM. The device is organized as one block of 256 x 8-bit memory with a 2-wire serial interface. Low-voltage design permits operation down to 1.8V, with standby and active currents of only 1A and 1mA, respectively. The 24XX02 also has a page write capability for up to 8 bytes of data. 11.2.2. Features Single supply with operation down to 1.8V Low-power CMOS technology -1mA active current typical -1A standby current typical (I-temp) Organized as 1 block of 256 bytes (1 x 256 x 8) 2-wire serial interface bus, I2C compatible Schmitt Trigger inputs for noise suppression Output slope control to eliminate ground bounce 100 kHz (24AA02) and 400 kHz (24LC02B) compatibility Self-timed write cycle (including auto-erase) Page write buffer for up to 8 bytes 2ms typical write cycle time for page write Hardware write-protect for entire memory Can be operated as a serial ROM Factory programming (QTP) available ESD protection > 4,000V 1,000,000 erase/write cycles Data retention > 200 years 8-lead PDIP, SOIC, TSSOP and MSOP packages 5-lead SOT-23 package Pb-free finish available Available for extended temperature ranges: -Industrial (I): -40C to +85C -Automotive (E): -40C to +125C 11.2.3. Pinning
11.3.
TCET1102G Optocoupler
11.3.1. General Description The TCET110. / TCET2100/ TCET4100 consist of a phototransistor optically coupled to a gallium arsenide infrared-emitting diode in a 4-lead up to 16-lead plastic dual inline package. The elements are mounted on one lead frame using a coplanar technique, providing a fixed distance between input and output for highest safety requirements. 11.3.2. General Features CTR offered in 9 groups Isolation materials according to UL94-VO Pollution degree (DIN/VDE 0110 / resp. IEC 664) Climatic classification 55/100/21 (IEC 68 part 1) Special construction: Therefore, extra low coupling capacity of typical 0.2 pF, high Common Mode Rejection Low temperature coefficient of CTR G=Leadform10.16mm; provides creepage distance > 8 for TCET2100/ TCET4100 optional; suffix letter 'G' is not marked on the optocoupler Coupling System U
mm,
11.3.3. Applications Circuits for safe protective separation against electrical shock according to safety class II (reinforced isolation): For appl. class I IV at mains voltage 300 V For appl. class I III at mains voltage 600 V According to VDE 0884, table 2, suitable for: Switch-mode power supplies, line receiver, computer peripheral interface, microprocessor system interface. 11.4. SVP-EX 52
11.4.1. General Description SVP EX52 supports two CVBS and one Svideo,two HD YPbPr component or PC RGB input and one 24-bit digital input ports.Supports HD YPbPr de-interlacing mode and 3D-comb video mode. LVDS "single" port is built-in, supporting output resolution up to SXGA, 1280x1024x60P. 11.5. TL431
11.5.1. General Description The TL431/TL431Aare three-terminal adjustable regulator series with a guaranteed thermal stability over applicable temperature ranges. The output voltage may be set to any value between Vref (approximately 2.5 volts) and 36 volts with two external resistors These devices have a typical dynamic output impedance of 0.2W Active output circuitry provides a very sharp turn-on characteristic, making these devices excel lent replacement for zener diodes in many applications. 11.5.2. Features Programmable Output Voltage to 36 Volts Low Dynamic Output Impedance 0.20 Typical Sink Current Capability of 1.0 to 100mA Equivalent Full-Range Temperature Coefficient of 50ppm/C Typical Temperature Compensated For Operation Over Full Rated Operating Temperature Range Low Output Noise Voltage Fast Turn-on Response
11.6.
24C32
11.6.1. General Description The Microchip Technology Inc. 24C32 is a 4K x 8 (32K bit) Serial Electrically Erasable PROM. This device has been developed for advanced, low power applications such as personal communications or data acquisition. The 24C32 features an input cache for fast write loads with a capacity of eight 8-byte pages, or 64 bytes. It also features a fixed 4K-bit block of ultra-high endurance memory for data that changes frequently. The 24C32 is capable of both random and sequential reads up to the 32K boundary. Functional address lines allow up to 8 - 24C32 devices on the same bus, for up to 256K bits address space. Advanced CMOS technology makes this device ideal for low-power non-volatile code and data applications. 11.6.2. Features Voltage operating range: 4.5V to 5.5V - Peak write current 3 mA at 5.5V - Maximum read current 150A at 5.5V - Standby current 1A typical Industry standard two-wire bus protocol, I2C compatible -Including 100 kHz and 400 kHz modes Self-timed write cycle (including auto-erase) Power on/off data protection circuitry Endurance: 8 TFT TV Service Manual
- 10,000,000 Erase/Write cycles guaranteed for High Endurance Block - 10,000,000 E/W cycles guaranteed for Standard Endurance Block 8 byte page, or byte modes available 1 page x 8 line input cache (64 bytes) for fast write loads Schmitt trigger, filtered inputs for noise suppression Output slope control to eliminate ground bounce 2 ms typical write cycle time, byte or page Up to 8 chips may be connected to the same bus for up to 256K bits total memory Electrostatic discharge protection > 4000V Data retention > 200 years Temperature ranges: -Commercial (C): 0C to +70C -Industrial (I): -40C to +85C 11.6.3. Pinning
PIN Function Table
PIN DESCRIPTIONS A0, A1, A2 Chip Address Inputs The A0...A2 inputs are used by the 24C32 for multiple device operation and conform to the two-wire bus standard. The levels applied to these pins define the address block occupied by the device in the address map. A particular device is selected by transmitting the corresponding bits (A2, A1, and A0) in the control byte. SDA Serial Address/Data Input/Output This is a bidirectional pin used to transfer addresses and data into and data out of the device. It is an open drain terminal; therefore the SDA bus requires a pull-up resistor to VCC (typical 10KQ for 100 kHz, 1KQ for 400 kHz).
For normal data transfer SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating the START and STOP conditions. SCL Serial Clock This input is used to synchronize the data transfer from and to the device. 11.7. 74LVC14A
11.7.1. Description The 74LVC14A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3 and 5V environment. The 74LVC14A provides six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. 11.7.2. Features Wide supply voltage range from 1.2 to 3.6 V CMOS low power consumption Direct interface with TTL levels Inputs accept voltages up to 5.5 V Complies with JEDEC standard no.8-1A ESD protection: HBM EIA/JESD22-A114-A exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V. Specified from -40 to +85C and -40 to +125C. 11.7.3. Pinning
11.8.
TEA6420
11.8.1. Features 5 Stereo Inputs 4 Stereo Outputs Gain Control 0/2/4/6dB/Mute for each Output Cascadable (2 different addresses) Serial Bus Controlled Very low Noise Very low Distortion 11.8.2. Description The TEA6420 switches 5 stereo audio inputs on4stereo outputs. All the switching possibilities are changed through the I2C bus. 11.8.3. Pin Connections
11.9.
CS4334
11.9.1. Features Complete Stereo DAC System: Interpolation, D/A, Output Analog Filtering 24-Bit Conversion 96 dB Dynamic Range -88 dB THD+N Low Clock Jitter Sensitivity Single +5V Power Supply Filtered Line Level Outputs On-Chip Digital De-emphasis Popgaurd Technology Functionally Compatible with CS4330/31/33 11.9.2. General Description The CS4334 family members are complete, stereo digital-to-analog output systems including interpolation, 1-bitD/A conversion and output analog filtering in an 8-pinpackage. The CS4334/5/6/7/8/9 support all major audio data interface formats, and the individual devices differ only in the supported interface format. The CS4334 family is based on delta-sigma modulation, where the modulator output controls the reference voltage input to an ultra-linear analog low-pass filter. This architecture allows for infinite adjustment of sample rate between 2 kHz and 100 kHz simply by changing the master clock frequency. The CS4334 family contains on-chip digital de-emphasis, operates from a single +5V power supply, and requires minimal support circuitry. These features are ideal for set-top boxes, DVD players, SVCD players, and A/V receivers. 11 TFT TV Service Manual
11.9.3.
Pin Descriptions
11.10. GAL16LV8 11.10.1. Description The GAL16LV8D, at 3.5 ns maximum propagation delay time, provides the highest speed performance available in the PLD market. The GAL16LV8C can interface with both 3.3V and 5Vsignal levels. The GAL16LV8 is manufactured using Lattice Semiconductor's advanced 3.3V E2CMOS process, which combines CMOS with Electrically Erasable (E2) floating gate technology. High speed erase times (<100ms) allow the devices to be reprogrammed quickly and efficiently. The 3.3V GAL16LV8 uses the same industry standard 16V8 architecture as its 5V counterpart and supports all architectural features such as combinatorial or registered macrocell operations. Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified. 11.10.2. Features HIGH PERFORMANCE E2CMOS TECHNOLOGY - 3.5 ns Maximum Propagation Delay - Fmax = 250 MHz - 2.5 ns Maximum from Clock Input to Data Output - UltraMOS Advanced CMOS Technology 3.3V LOW VOLTAGE 16V8 ARCHITECTURE - JEDEC-Compatible 3.3V Interface Standard - 5V Compatible Inputs - I/O Interfaces with Standard 5V TTL Devices (GAL16LV8C) ACTIVE PULL-UPS ON ALL PINS (GAL16LV8D Only) E2 CELL TECHNOLOGY - Reconfigurable Logic - Reprogrammable Cells - 100% Tested/100% Yields - High Speed Electrical Erasure (<100ms) - 20 Year Data Retention EIGHT OUTPUT LOGIC MACROCELLS - Maximum Flexibility for Complex Logic Designs - Programmable Output Polarity 12 TFT TV Service Manual
PRELOAD AND POWER-ON RESET OF ALL REGISTERS - 100% Functional Testability APPLICATIONS INCLUDE: - Glue Logic for 3.3V Systems - DMA Control - State Machine Control - High Speed Graphics Processing - Standard Logic Speed Upgrade ELECTRONIC SIGNATURE FOR IDENTIFICATION LEAD-FREE PACKAGE OPTIONS 11.10.3. Pin connections
11.11. K6R4008V1D 11.11.1. Description The K6R4008V1D is a 4,194,304-bit high-speed Static Random Access Memory organized as 524,288 words by 8 bits. TheK6R4008V1D uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG s advanced CMOS process and designed for high-speed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The K6R4008V1D is packaged in a 400 mil 36-pin plastic SOJ and 44-pin plastic TSOP type II. 11.11.2. Features Fast Access Time 8, 10ns(Max.) Low Power Dissipation - Standby (TTL) : 20mA(Max.) (CMOS) : 5mA(Max.) - Operating K6R4008V1D-08 : 80mA(Max.) K6R4008V1D-10 : 65mA(Max.) Single 3.3 0.3V Power Supply TTL Compatible Inputs and Outputs Fully Static Operation - No Clock or Refresh required Three State Outputs Center Power/Ground Pin Configuration Standard Pin Configuration K6R4008V1D-J : 36-SOJ-400 K6R4008V1D-K : 36-SOJ-400(Lead-Free) K6R4008V1D-T : 44-TSOP2-400BF K6R4008V1D-U : 44-TSOP2-400BF(Lead-Free) Operating in Commercial and Industrial Temperature range.
11.11.3.
Pin Description
11.12. L6562 11.12.1. Features TRANSITION-MODE CONTROL OF PFC PRE-REGULATORS PROPRIETARY MULTIPLIER DESIGN FOR MINIMUM THD OF AC INPUT CURRENT VERY PRECISE ADJUSTABLE OUTPUT OVERVOLTAGE PROTECTION ULTRA-LOW ( 70A) START-UP CURRENT LOW ( 4 mA) QUIESCENT CURRENT EXTENDED IC SUPPLY VOLTAGE RANGE ON-CHIP FILTER ON CURRENT SENSE DISABLE FUNCTION 1% (@ Tj = 25 C) INTERNAL REFERENCE VOLTAGE 11.12.2. Description The L6562 is a current-mode PFC controller operating in Transition Mode (TM). Pin-to-pin compatible with the predecessor L6561, it offers improved performance. The highly linear multiplier includes a special circuit, able to reduce AC input current distortion, that allows wide-range-mains operation with an extremely low THD, even over a large load range.
11.12.3.
Pin Connections and Descriptions
11.13. LM1117 11.13.1. General Description The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductors industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap reference to as-sure output voltage accuracy to within 1%. The LM1117 series is available in SOT223, TO-220, and TO-252 D-PAK packages. A minimum of 10F tantalum capacitor is required at the output to improve the transient response and stability. 11.13.2. Features Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions Space Saving SOT-223 Package Current Limiting and Thermal Protection Output Current 800mA Line Regulation 0.2% (Max) Load Regulation 0.4% (Max) Temperature Range LM1117 0C to 125C LM1117I -40C to 125C 11.13.3. Applications 2.85V Model for SCSI-2 Active Termination Post Regulator for Switching DC/DC Converter High Efficiency Linear Regulators Battery Charger Battery Powered Instrumentation
11.13.4.
Connection Diagrams
TO-252
SOT-223
TO-220
Top View
Top View Top View
11.14. LM317 11.14.1. General Description This monolithic integrated circuit is an adjustable 3-terminal positive voltage regulator designed to supply more than 1.5A of load current with an output voltage adjustable over a 1.2 to 37V. It employs internal current limiting, thermal shut-down and safe area compensation. 11.14.2. Features Output Current In Excess of 1.5A Output Adjustable Between 1.2V and 37V Internal Thermal Overload Protection Internal Short Circuit Current Limiting Output Transistor Safe Operating Area Compensation TO-220 Package 11.14.3. Pin Description
11.15. LM809 11.15.1. General Description The LM809/810 microprocessor supervisory circuits can be used to monitor the power supplies in microprocessor and digital systems. They provide a reset to the microprocessor during power-up, power-down and brown-out conditions. The function of the LM809/810 is to monitor the VCC supply voltage, and assert a reset signal whenever this voltage declines below the factory-programmed reset threshold. The reset signal remains asserted for 240 ms after VCC rises above the threshold. The LM809 has an active-low RESET output, while the LM810 has an active-high RESET output. Seven standard reset voltage options are available, suitable for monitoring 5V, 3.3V, and 3V supply voltages. With a low supply current of only 15A, the LM809/810 are ideal for use in portable equipment. 11.15.2. Features Precise monitoring of 3V, 3.3V, and 5V supply voltages Superior upgrade to MAX809/810 Fully specified overtemperature 140 ms min. Power-On Reset pulse width, 240 ms typical Active-low RESET Output(LM809) Active-high RESET Output(LM810) 16 TFT TV Service Manual
Guaranteed RESET Output valid for VCC 1V Low Supply Current, 15Atyp Power supply transient immunity 11.15.3. Pinning
11.16. MSP34X1G Multistandard Sound Processor Family 11.16.1. Introduction The MSP 34x1G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on a single chip. Figure shows a simplified functional block diagram of the MSP 34x1G. The MSP 34x1G has all functions of the MSP 34x0G with the addition of a virtual surround sound feature. Surround sound can be reproduced to a certain extent with two loudspeakers. The MSP 34x1G includes the Micronas virtualizer algorithm 3D-PANORAMA which has been approved by the Dolby 1) Laboratories for with the "Virtual Dolby Surround" technology. In addition, the MSP 34x1G includes the PAN-ORAMA algorithm. These TV sound processing ICs include versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is performed alignment free. Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo Radio standard. Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP 34x1G has optimum stereo performance without any adjustments. The MSP 34x1G has built-in automatic functions: The IC is able to detect the actual sound standard automat-ically (Automatic Standard Detection). Furthermore, pilot levels and identification signals can be evaluated internally with subsequent switching between mono/stereo/bilingual; no I 2 C interaction is necessary (Automatic Sound Selection).
Source Select I2S bus interface consists of five pins: 1. I2S_DA_IN1, I2S_DA_IN2: For input, four channels (two channels per line, 2*16 bits) per sampling cycle (32 kHz) are transmitted. 2. I2S_DA_OUT: For output, two channels (2*16 bits) per sampling cycle (32 kHz) are transmitted. 3. I2S_CL: Gives the timing for the transmission of I2S serial data (1.024 MHz). 4. I2S_WS: The I2S_WS word strobe line defines the left and right sample. 11.16.2. Features Standard Selection with single I2C transmission Automatic Standard Detection of terrestrial TV standards Automatic Sound Selection (mono/stereo/bilingual), new registers MODUS, STATUS Two selectable sound IF (SIF) inputs Automatic Carrier Mute function Interrupt output programmable (indicating status change) Loudspeaker / Headphone channel with volume, balance, bass, treble, loudness AVC: Automatic Volume Correction Subwoofer output with programmable low-pass and complementary high-pass filter 5-band graphic equalizer for loudspeaker channel Spatial effect for loudspeaker channel Four Stereo SCART (line) inputs, one Mono input; two Stereo SCART outputs Complete SCART in/out switching matrix Two I2S inputs; one I2S output Dolby Pro Logic with DPL 351xA coprocessor All analog FM-Stereo A2 and satellite standards; AM-SECAM L standard Simultaneous demodulation of (very) high-deviation FM-Mono and NICAM Adaptive deemphasis for satellite (Wegener-Panda, acc. to ASTRA specification) ASTRA Digital Radio (ADR) together with DRP 3510A All NICAM standards Korean FM-Stereo A2 standard 11.16.3. Pin connections NC = not connected; leave vacant LV = if not used, leave vacant OBL = obligatory; connect as described in circuit diagram DVSS: if not used, connect to DVSS AHVSS: connect to AHVSS
Pin No. PLCC 68-pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 PSDIP 64-pin 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 64 63 62 61 60 PSDIP 52-pin 14 13 12 11 10 9 8 7 6 5 4 3 2 1 52 51 50 49 PQFP 80-pin 9 8 7 6 5 4 3 2 1 80 79 78 77 76 75 74 73 72 71 70 69 PLQFP 64-pin 8 7 6 5 4 3 2 1 64 63 62 61 60 59 58 57 56 55 54 53 52
Pin Name
Type
Connection (if not used)
Short Description
ADR_WS NC ADR_DA I2S_DA_IN1 I2S_DA_OUT I2S_WS I2S_CL I2C_DA I2C_CL NC STANDBYQ ADR_SEL D_CTR_I/O_0 D_CTR_I/O_1 NC NC NC AUD_CL_OUT TP XTAL_OUT XTAL_IN TESTEN ANA_IN2+
OUT OUT IN OUT IN/OUT IN/OUT IN/OUT IN/OUT IN IN IN/OUT IN/OUT
LV LV LV LV LV LV LV OBL OBL LV OBL OBL LV LV LV LV LV LV LV OBL OBL OBL AVSS via 56 pF/LV AVSS via 56 pF/LV LV OBL OBL LV LV OBL OBL LV LV OBL
OUT OUT IN IN IN
24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
ANA_INANA_IN1+ AVSUP AVSUP NC NC AVSS AVSS MONO_IN NC VREFTOP SC1_IN_R SC1_IN_L ASG1 SC2_IN_R SC2_IN_L ASG2 SC3_IN_R SC3_IN_L ASG4 SC4_IN_R SC4_IN_L NC AGNDC AHVSS AHVSS NC NC CAPL_M AHVSUP CAPL_A SC1_OUT_L SC1_OUT_R VREF1 SC2_OUT_L SC2_OUT_R NC NC DACM_SUB
IN IN
IN
IN IN IN IN IN IN IN IN
OUT OUT OUT OUT
OUT
LV LV AHVSS LV LV AHVSS LV LV AHVSS LV LV LV or AHVSS OBL OBL OBL LV LV OBL OBL OBL LV LV OBL LV LV LV LV LV
ADR word strobe Not connected ADR Data Output 2 I S1 data input 2 I S data output 2 I S word strobe 2 I S clock 2 I C data 2 I C clock Not connected Stand-by (low-active) 2 I C bus address select D_CTR_I/O_0 D_CTR_I/O_1 Not connected Not connected Not connected Audio clock output (18.432 MHz) Test pin Crystal oscillator Crystal oscillator Test pin IF Input 2 (can be left vacant, only if IF input 1 is also not in use) IF common (can be left vacant, only if IF input 1 is also not in use) IF input 1 Analog power supply 5V Analog power supply 5V Not connected Not connected Analog ground Analog ground Mono input Not connected Reference voltage IF A/D converter SCART 1 input, right SCART 1 input, left Analog Shield Ground 1 SCART 2 input, right SCART 2 input, left Analog Shield Ground 2 SCART 3 input, right SCART 3 input, left Analog Shield Ground 4 SCART 4 input, right SCART 4 input, left Not connected Analog reference voltage Analog ground Analog ground Not connected Not connected Volume capacitor MAIN Analog power supply 8V Volume capacitor AUX SCART output 1, left SCART output 1, right Reference ground 1 SCART output 2, left SCART output 2, right Not connected Not connected Subwoofer output
55 56 57 58 59 60 61 62 63 64 65 66 67 68
30 29 28 27 26 25 24 23 22 21 20 19 18 17
25 24 23 22 21 20 19 18 17 16 15
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
22 21 20 19 18 17 16 15 14 13 12 11 10 9
NC DACM_L DACM_R VREF2 DACA_L DACA_R NC NC RESETQ NC NC NC I2S_DA_IN2 DVSS DVSS DVSS DVSUP DVSUP DVSUP ADR_CL
OUT OUT OUT OUT
IN
IN
OUT
LV LV LV OBL LV LV LV LV OBL LV LV LV LV OBL OBL OBL OBL OBL OBL LV
Not connected Loudspeaker out, left Loudspeaker out, right Reference ground 2 Headphone out, left Headphone out, right Not connected Not connected Power-on-reset Not connected Not connected Not connected 2 I S2-data input Digital ground Digital ground Digital ground Digital power supply 5V Digital power supply 5V Digital power supply 5V ADR clock
11.17. M29W040B 11.17.1. Description The M29W040B is a 4 Mbit (512Kb x8) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM. The M29W040B is fully backward compatible with the M29W040.The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are writ-ten to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic.
11.17.2. Features SINGLE 2.7 to 3.6V SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS ACCESS TIME: 55ns PROGRAMMING TIME - 10s per Byte typical8 UNIFORM 64 Kbytes MEMORY BLOCKS PROGRAM/ERASE CONTROLLER - Embedded Byte Program algorithm - Embedded Multi-Block/Chip Erase algorithm - Status Register Polling and Toggle Bits ERASE SUSPEND and RESUME MODES - Read and Program another Block during Erase Suspend UNLOCK BYPASS PROGRAM COMMAND - Faster Production/Batch Programming LOW POWER CONSUMPTION - Standby and Automatic Standby 100,000 PROGRAM/ERASE CYCLES per BLOCK 20 YEARS DATA RETENTION - Defectivity below 1 ppm/year ELECTRONIC SIGNATURE - Manufacturer Code: 20h - Device Code: E3h
11.17.3.
Pin Descriptions
11.18. MC33202 11.18.1. General Description The MC33201/2/4 family of operational amplifiers provide rail to rail operation on both the input and output. The inputs can be driven as high as 200mV beyond the supply rails without phase reversal on the outputs, and the output can swing within 50 mV of each rail. This rail to rail operation enables the user to make full use of the supply voltage range available. It is designed to work at very low supply voltages (0.9 V) yet can operate with a supply of up to +12V and ground. Output current boosting techniques provide a high output current capability while keeping the drain current of the amplifier to a minimum. Also, the combination of low noise and distortion with a high slew rate and drive capability make this an ideal amplifier for audio applications. 11.18.2. Features Low Voltage, Single Supply Operation (+1.8 V and Ground to +12 V and Ground) Input Voltage Range Includes both Supply Rails Output Voltage Swings within 50 mV of both Rails No Phase Reversal on the Output for Over driven Input Signals High Output Current (ISC = 80 mA, Typ) Low Supply Current (ID = 0.9 mA, Typ) 600 Output Drive Capability Extended Operating Temperature Ranges ( 40 to +105C and 55 to +125C) Typical Gain Bandwidth Product = 2.2 MHz Pb Free Packages are Available 11.18.3. Pin Connections
11.19. PCF8574 11.19.1. General Description The PCF8574 is a silicon CMOS circuit. It provides general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I2C).The device consists of an 8-bit quasibidirectional port and an I2C-bus interface. The PCF8574 has a low current consumption and includes latched outputs with high current drive capability for directly driving LEDs. It also possesses an interrupt line (INT) which can be connected to the interrupt logic of the microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C-bus. This means that the PCF8574 can remain a simple slave device. 11.19.2. Features Operating supply voltage 2.5 to 6V Low standby current consumption of 10 A maximum I2C to parallel port expander Open-drain interrupt output 8-bit remote I/O port for the I2C-bus Compatible with most microcontrollers Latched outputs with high current drive capability for directly driving LEDs Address by 3 hardware address pins for use of up to 8 devices (up to 16 with PCF8574A) DIP16, or space-saving SO16 or SSOP20 packages. 11.19.3. Pinning
11.20. PI5V330 11.20.1. General Description The PI5V330 is well suited for video applications when switching composite or RGB analogue. A picture-in-picture application will be described in this brief. The pixel-rate creates video overlays so two or more pictures can be viewed at the same time. An inexpensive NTSC titler can be implemented by superimposing the output of a character generator on a standard composite video background.
11.21. SDA55XX (SDA5550) 11.21.1. General description The SDA55XX is a single chip teletext decoder for decoding World System Teletext data as well as Video Programming System (VPS), Program Delivery Control (PDC), and Wide Screen Signalling (WSS) data used for PAL plus transmissions (Line 23). The device also supports Closed caption acquisition and decoding. The device provides an integrated general-purpose, fully 8051-compatible Microcontroller with television specific hardware features. Microcontroller has been enhanced to provide powerful features such as memory banking, data pointers, and additional interrupts etc. The on-chip display unit for displaying Level 1.5 teletext data can also be used for customer defined on screen displays. Internal XRAM consists of up to16 Kbytes. Device has an internal ROM of up to 128 KBytes. ROMless versions can access up to 1 MByte of external RAM and ROM. The SDA 55XX supports a wide range of standards including PAL, NTSC and contains a digital slicer for VPS, WSS, PDC, TTX and Closed Caption, an accelerating acquisition hardware module, a display generator for Level 1.5 TTX data and powerful On screen Display capabilities based on parallel attributes, and Pixel oriented characters (DRCS). The 8-bit Microcontroller runs at 360 ns. cycle time (min.). Controller with dedicated hardware does most of the internal TTX acquisition processing, transfers data to/from external memory interface and receives/ transmits data via I2C-firmware user-interface. The slicer combined with dedicated hardware stores TTX data in a VBI buffer of 1 Kilobyte. The Microcontroller firmware performs all the acquisition tasks (hamming and parity-checks, page search and evaluation of header control bits) once per field. Additionally, the firmware can provide high-end Teletext features like Packet-26-handling, FLOF, TOP and list-pages. The interface to user software is optimized for minimal overhead. SDA 55XX is realized in 0.25 micron technology with 2.5 V supply voltage and 3.3 V I/O (TTL compatible). The software and hardware development environment (TEAM) is available to simplify and speed up the development of the software and On Screen Display. TEAM stands for TVT Expert Application Maker. It improves the TV controller software quality in following aspects: Shorter time to market Re-usability Target independent development Verification and validation before targeting General test concept Graphical interface design requiring minimum programming and controller know how. Modular and open tool chain, configurable by customer.
11.22. Sil 9993 11.22.1. General Description The SiI 9993 is the first generation of PanelLink receivers that are designed for the HDMI 1.0 (High Definition Multimedia Interface) specification. DTVs, plasma displays, LCD TVs and projectors can now provide the purest level of protected digital audio/video over a simple, low cost cable. Backwards compatibility with DVI 1.0 allows HDMI systems to connect to any DVI 1.0 host (DVD players, HD set top boxes, D-VHS players and receivers, PC). The SiI 9993 incorporates a flexible audio and video interface. The receiver can connect to RGB input and output YCbCr using an integrated color space converter. This allows full backward compatibility to DVI, and interfaces to all major video processors. A S/PDIF port can output PCM encoded data as well as Dolby Digital, DTS and all other formats capable of being sent over S/PDIF. A 2-channel I2S port outputs data converted from S/PDIF. The SiI 9993 comes pre-programmed with HDCP keys, greatly simplifying the manufacturing process, lowering costs, all the while providing the highest level of HDCP key security. Silicon Images PanelLink 23 TFT TV Service Manual
receivers use the latest generation of PanelLink TMDS core technology. These PanelLink cores pass all HDMI compliancy tests. 11.22.2. Features HDMI 1.0 and DVI 1.0 compliant receiver Integrated PanelLink core supports DTV resolutions (480i/576i/480p/576p/720p/1080i) Digital video interface supports video processors: o 24-bit RGB 4:4:4 o 24-bit YCbCr 4:4:4 o 16/20/24-bit YCbCr 4:2:2 o 8/10/12-bit YCbCr 4:2:2 embedded syncs Analog RGB and YPbPr output: o 10-bit DAC o Separate or Composite Syncs (Sync on G) S/PDIF output supports PCM, Dolby Digital, DTS digital audio transmission (32-48kHz Fs) using IEC 60958 and IEC 61937. Programmable I2S interface for connection to low-cost audio DACs. Integrated HDCP decryption engine for receiving protected audio and video content Pre-programmed HDCP keys provide highest level of key security, simplifies manufacturing Programmable registers via slave I2C interface 3.3V operation in 100-pin TQFP package Flexible power management
11.23. NCP1014 11.23.1. General Description The NCP101X series integrates a fixed frequency current modecontroller and a 700 V MOSFET. Housed in a PDIP 7 or SOT 223package, the NCP101X offers everything needed to build a rugged and low cost power supply, including soft start, frequency jittering, short circuit protection, skip cycle, a maximum peak current setpoint and a Dynamic Self Supply (no need for an auxiliary winding). Unlike other monolithic solutions, the NCP101X is quiet by nature: during nominal load operation, the part switches at one of the available frequencies (65 100 130 kHz). When the current setpoint falls below a given value, e.g. the output power demand diminishes, the IC automatically enters the so called skip cycle mode and provides excellent efficiency at light loads. Because this occurs at typically 1/4 of the maximum peak value, no acoustic noise takes place. As a result, standby power is reduced to the minimum without acoustic noise generation. Short circuit detection takes place when the feedback signal fades away, e.g. in true short circuit conditions or in broken Optocoupler cases. External disabling is easily done either simply by pulling the feedback pin down or latching it to ground through an inexpensive SCR for complete latched off. Finally soft start and frequency jittering further ease the designer task to quickly develop low cost and robust offline power supplies. For improved standby performance, the connection of an auxiliary winding stops the DSS operation and helps to consume less than100 mW at high line. In this mode, a built in latched overvoltage protection prevents from lethal voltage runaways in case the Optocoupler would brake. 11.23.2. Features Built in 700 V MOSFET with Typical RDSon of 11 and 22 Large Creepage Distance Between High Voltage Pins Current Mode Fixed Frequency Operation: 65 kHz100 kHz 130 kHz Skip Cycle Operation at Low Peak Currents Only: No Acoustic Noise! Dynamic Self Supply, No Need for an Auxiliary Winding Internal 1.0 ms Soft Start Latched Overvoltage Protection with Auxiliary Winding Operation Frequency Jittering for Better EMI Signature Auto Recovery Internal Output Short Circuit Protection Below 100 mW Standby Power if Auxiliary Winding is Used Internal Temperature Shutdown Direct Optocoupler Connection SPICE Models Available for TRANsient Analysis 24 TFT TV Service Manual
11.23.3.
Pin Connections and Descriptions
11.24. SN74CB3Q3305 11.24.1. General Description The SN74CB3Q3305 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ONstate resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3305 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems. 11.24.2. Features High-Bandwidth Data Path (Up To 500 MHz) 5-V Tolerant I/Os with Device Powered-Up or Powered-Down Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 3 Typical) Rail-to-Rail Switching on Data I/O Ports 0- to 5-V Switching With 3.3-V VCC 0- to 3.3-V Switching With 2.5-V VCC Bidirectional Data Flow, With Near-Zero Propagation Delay Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 3.5 pF Typical) Fast Switching Frequency (fOE = 20 MHz Max) Data and Control Inputs Provide Undershoot Clamp Diodes Low Power Consumption (ICC = 0.25 mA Typical) VCC Operating Range From 2.3 V to 3.6 V Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V) Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II ESD Performance Tested Per JESD 22 2000-V Human-Body Model (A114-B, Class II) 25 TFT TV Service Manual
1000-V Charged-Device Model (C101) Supports Both Digital and Analog Applications: USB Interface, Differential Signal Interface, Bus Isolation, Low-Distortion Signal Gating 11.24.3. Pin Connections
11.25. ST24LC21 11.25.1. Description The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8 bits. This device can operate in two modes: Transmit Only mode and I2C bidirectional mode. When powered, the device is in Transmit Only mode with EEPROM data clocked out from the rising edge of the signal applied on VCLK. The device will switch to the I2C bidirectional mode upon the falling edge of the signal applied on SCL pin. The ST24LC21 can not switch from the I2C bidirectional mode to the Transmit Only mode (except when the power supply is removed). The device operates with a power supply value as low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages are available. 11.25.2. Features 1 million Erase/Write cycles 40 years data retention 2.5V to 5.5V single supply voltage 400k Hz compatibility over the full range of supply voltage Two wire serial interface I2C bus compatible Page Write (Up To 8 Bytes) Byte, random and sequential read modes Self timed programming cycle Automatic address incrementing Enhanced ESD/Latch up Performances 11.25.3. Pin connections
DIP Pin connections NC: Not connected Signal names

SDA SCL Vcc Vss VCLK Serial data Address Input/Output Serial Clock (I2C mode) Supply voltage Ground Clock transmit only mode
CO Pin connections
11.26. LM2576 11.26.1. General Description The LM2576 series of regulators are monolithic integrated circuits ideally suited for easy and convenient design of a stepdown switching regulator (buck converter). All circuits of this series are capable of driving a 3.0 A load with excellent line and load regulation. These devices are available in fixed output voltages of 3.3 V, 5.0 V, 12 V, 15 V, and an adjustable output version. These regulators were designed to minimize the number of external components to simplify the power supply design. Standard series of inductors optimized for use with the LM2576 are offered by several different inductor manufacturers. Since the LM2576 converter is a switchmode power supply, its efficiency is significantly higher in comparison with popular threeterminal linear regulators, especially with higher input voltages. In many cases, the power dissipated is so low that no heatsink is required or its size could be reduced dramatically. A standard series of inductors optimized for use with the LM2576 are available from several different manufacturers. This feature greatly simplifies the design of switchmode power supplies. The LM2576 features include a guaranteed 4% tolerance on output voltage within specified input voltages and output load conditions, and 10% on the oscillator frequency (2% over 0C to 125C). External shutdown is included, featuring 80 mA (typical) standby current. The output switch includes cyclebycycle current limiting, as well as thermal shutdown for full protection under fault conditions. 11.26.2. Features 3.3 V, 5.0 V, 12 V, 15 V, and Adjustable Output Versions Adjustable Version Output Voltage Range, 1.23 to 37 V 4% Maximum Over Line and Load Conditions Guaranteed 3.0 A Output Current Wide Input Voltage Range Requires Only 4 External Components 52 kHz Fixed Frequency Internal Oscillator TTL Shutdown Capability, Low Power Standby Mode High Efficiency Uses Readily Available Standard Inductors Thermal Shutdown and Current Limit Protection Moisture Sensitivity Level (MSL) Equals 1 11.26.3. Pin description
11.27. TDA1308 11.27.1. General Description The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications. 11.27.2. Features Wide temperature range No switch ON/OFF clicks Excellent power supply ripple rejection Low power consumption 27 TFT TV Service Manual
Short-circuit resistant High performance high signal-to-noise ratio High slew rate Low distortion Large output voltage swing. 11.27.3.
SYMBOL OUTA INA(neg) INA(pos) VSS INB(pos) INB(neg) OUTB VDD
Pinning
PIN 1 2 3 4 5 6 7 8 DESCRIPTION Output A (Voltage swing) Inverting input A Non-inverting input A Negative supply Non-inverting input B Inverting input B Output B (Voltage swing) Positive supply PIN VALUE Min : 0.75V, Max : 4.25V Vo(clip) : Min : 1400mVrms 2.5V 0V 2.5V Vo(clip) : Min : 1400mVrms Min : 0.75V, Max : 4.25V 5V, Min : 3.0V, Max : 7.0V
11.28. TDA9886 11.28.1. General Description The TDA9886 is an alignment-free single standard (without positive modulation) vision and sound IF signal PLL. 11.28.2. Features 5 V supply voltage Gain controlled wide-band Vision Intermediate Frequency (VIF) amplifier (AC-coupled) Multistandard true synchronous demodulation with active carrier regeneration (very linear demodulation, good intermodulation figures, reduced harmonics, excellent pulse response) Gated phase detector for L/L accent standard Fully integrated VIF Voltage Controlled Oscillator (VCO), alignment-free; frequencies switchable for all negative and positive modulated standards via I2C-bus Digital acquisition help, VIF frequencies of 33.4, 33.9, 38.0, 38.9, 45.75 and 58.75 MHz 4 MHz reference frequency input [signal from Phase-Locked Loop (PLL) tuning system] or operating as crystal oscillator VIF Automatic Gain Control (AGC) detector for gain control, operating as peak sync detector for negative modulated signals and as a peak white detector for positive modulated signals Precise fully digital Automatic Frequency Control (AFC) detector with 4-bit digital-to-analogue converter; AFC bits via I2C -bus readable TakeOver Point (TOP) adjustable via I2C-bus or alternatively with potentiometer Fully integrated sound carrier trap for 4.5, 5.5, 6.0 and 6.5 MHz, controlled by FM-PLL oscillator Sound IF (SIF) input for single reference Quasi Split Sound (QSS) mode (PLL controlled) SIF AGC for gain controlled SIF amplifier; single reference QSS mixer able to operate in high performance single reference QSS mode and in intercarrier mode, switchable via I2C-bus AM demodulator without extra reference circuit Alignment-free selective FM-PLL demodulator with high linearity and low noise I2C-bus control for all functions I2C-bus transceiver with pin programmable Module Address (MAD). 11.28.3. SYMBOL VIF1
VIF2 OP1 FMPLL
Pinning PIN 1 2 3 4 DESCRIPTION

VIF differential input 1 VIF differential input 2 output 1 (open-collector) FM-PLL for loop filter
DEEM AFD DGND AUD TOP SDA SCL SIOMA n.c. TAGC REF VAGC CVBS AGND VPLL
VP
AFC OP2 SIF1 SIF2
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
de-emphasis output for capacitor AF decoupling input for capacitor digital ground audio output tuner AGC TakeOver Point (TOP) I2C-bus data input/output I2C-bus clock input sound intercarrier output and MAD select not connected tuner AGC output 4 MHz crystal or reference input VIF-AGC for capacitor; note 1 video output analog ground VIF-PLL for loop filter supply voltage (+5 V) AFC output output 2 (open-collector) SIF differential input 1 SIF differential input 2
11.29. TPA3002D2 11.29.1. General Description
The TPA3002D2 is a 9-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied stereo speakers. The TPA3002D2 can drive stereo speakers as low as 8 O. The high efficiency of the TPA3002D2 eliminates the need for external heatsinks when playing music. Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a range of gain from -40 dB to 36 dB. Line outputs, for driving external headphone amplifier inputs, are also dc voltage controlled with a range of gain from -56 dB to 20 dB. An integrated 5-V regulated supply is provided for powering an external headphone amplifier. 11.29.2. Features
9-W/Ch into an 8-Q Load from 12-V Supply Efficient, Class-D Operation Eliminates Heatsinks and Reduces Power Supply Requirements 32-Step DC Volume Control From -40 dB to 36 dB Line Outputs for External Headphone Amplifier with Volume Control Regulated 5-V Supply Output for Powering TPA6110A2 Space-Saving, Thermally-Enhanced PowerPAD Packaging Thermal and Short-Circuit Protection Applications LCD Monitors and TVs Powered Speakers
11.29.3.
Pinning
Terminal Functions
TERMINAL NO. AGND AVCC AVDD AVDDREF BSLN BSLP BSRN BSRP COSC LINN LINP LOUTN LOUTP MODE NAME 26, 30 33 29 7 13 24 48 37 28 6 5 16, 17 20, 21 34 I/O O O I/O I/O I/O I/O I/O I I O O I Analog ground for digital/analog cells in core High-voltage analog power supply (8.5 V to 14 V) 5-V Regulated output capable of 100-mA output 5-V Reference outputprovided for connection to adjacent VREF terminal. Bootstrap I/O for left channel, negative high-side FET Bootstrap I/O for left channel, positive high-side FET Bootstrap I/O for right channel, negative high-side FET Bootstrap I/O for right channel, positive high-side FET I/O for charge/discharging currents onto capacitor for ramp generator triangle wave biased at V2P5 Negative differential audio input for left channel Positive differential audio input for left channel Class-D 1/2-H-bridge negative output for left channel Class-D 1/2-H-bridge positive output for left channel Input for MODE control. A logic high on this pin places the amplifier in the variable output mode and the Class-D outputs are disabled. A logic low on this pin places the amplifier in the Class-D mode and Class-D stereo outputs are enabled. Variable outputs (VAROUTL and VAROUTR) are still enabled in Class-D mode to be used as line-level outputs for external amplifiers. Output for control of the variable output amplifiers. When the MODE pin (34) is a logic high, the MODE_OUT pin is driven low. When the MODE pin (34) is a logic low, the MODE_OUT pin is driven high. This pin is intended for MUTE control of an external headphone amplifier. Leave unconnected when not used for headphone amplifier control. Power ground for left channel H-bridge Power ground for right channel H-bridge Power supply for left channel H-bridge (tied to pins 22 and 23 internally), not connected to PVCCR or AVCC. Power supply for left channel H-bridge (tied to pins 14 and 15 internally), not connected to PVCCR or AVCC. Power supply for right channel H-bridge (tied to pins 46 and 47 internally), not connected to PVCCL or AVCC. Power supply for right channel H-bridge (tied to pins 38 and 39 internally), not connected to PVCCL or AVCC. Ground for gain control circuitry. Connect to AGND. If using a DAC to control the volume, connect the DAC ground to this terminal. DESCRIPTION
MODE_OUT
35
PGNDL PGNDR PVCCL PVCCL PVCCR PVCCR REFGND
18, 19 42, 43 14, 15 22, 23 38,39 46, 47 12
RINP RINN ROSC ROUTN ROUTP SD VARDIFF VARMAX VAROUTL VAROUTR VCLAMPL VCLAMPR VOLUME VREF V2P5 Pad
3 2 27 44, 45 40, 41 1 9 10 31 32 25 36 11 8 4 Thermal
I I I/O O O I I I O O I I O -
Positive differential audio input for right channel Negative differential audio input for right channel Current setting resistor for ramp generator. Nominally equal to 1/8*VCC Class-D 1/2-H-bridge negative output for right channel Class-D 1/2-H-bridge positive output for right channel Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with compliance to VCC. DC voltage to set the difference in gain between the Class-D and VAROUT outputs. Connect to GND or AVDDREF if VAROUT outputs are unconnected. DC voltage that sets the maximum gain for the VAROUT outputs. Connect to GND or AVDDREF if VAROUT outputs are unconnected. Variable output for left channel audio. Line level output for driving external HP amplifier. Variable output for right channel audio. Line level output for driving external HP amplifier. Internally generated voltage supply for left channel bootstrap capacitors. Internally generated voltage supply for right channel bootstrap capacitors. DC voltage that sets the gain of the Class-D and VAROUT outputs. Analog reference for gain control section. 2.5-V Reference for analog cells, as well as reference for unused audio input when using single-ended inputs. Connect to AGND and PGNDshould be center point for both grounds.
11.30. PA672T 11.30.1. General Description The PA672T is a super-mini-mold device provided with two MOS FET elements. It achieves highdensity mounting and saves mounting costs. 11.30.2. Features Two MOS FET circuits in package the same size as SC-70 Automatic mounting supported 11.30.3. Pin Connection
11.31. VPC3230D 11.31.1. General Description The VPC 323xD is a high-quality, single-chip video front-end, which is targeted for 4:3 and 16:9, 50/60Hz and 100/120 Hz TV sets. It can be combined with other members of the DIGIT3000 IC family (such as DDP 331x) and/or it can be used with 3rd-party products. The main features of the VPC 323xD are high-performance adaptive 4H comb filter Y/C separator with adjustable vertical peaking multi-standard colour decoder PAL/NTSC/SECAM including all substandards four CVBS, one S-VHS input, one CVBS output two RGB/YCr Cb component inputs, one Fast Blank (FB) input integrated high-quality A/D converters and associated clamp and AGC circuits 31 TFT TV Service Manual
multi-standard sync processing linear horizontal scaling (0.25 ... 4), as well as non-linear horizontal scaling Panorama-vision PAL+ preprocessing line-locked clock, data and sync, or 656-output interface peaking, contrast, brightness, color saturation and tint for RGB/ YC r C b and CVBS/ S-VHS high-quality soft mixer controlled by Fast Blank PIP processing for four picture sizes (1/4, 1/9, 1/16 or 1/36 of normal size) with 8-bit resolution 15 predefined PIP display configurations and expert mode (fully programmable) control interface for external field memory I2C-bus interface one 20.25-MHz crystal, few external components 80-pin PQFP package 11.31.2. Pin Connections and Short Descriptions NC = not connected LV = if not used, leave vacant X = obligatory; connect as described in circuit diagram SUPPLYA = 4.75...5.25 V, SUPPLYD = 3.15...3.45 V
Pin No. PQFP 80-pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 Pin Name Type Connection (if not used) VREF VREF VREF VREF VREF VREF X LV or GNDD X X X X X X X GNDD GNDD GNDD LV LV LV LV LV LV X X LV LV X X GNDY GNDY GNDY GNDY X X GNDY GNDY GNDY GNDY GNDC Short Description
B1/CB1IN G1/Y1IN R1/CR1IN B2/CB2IN G2/Y2IN R2/CR2IN ASGF FFRSTWIN VSUPCAP VSUPD GNDD GNDCAP SCL SDA RESQ TEST VGAV YCOEQ FFIE FFWE FFRSTW FFRE FFOE CLK20 GNDPA VSUPPA LLC2 LLC1 VSUPLLC GNDLLC Y7 Y6 Y5 Y4 GNDY VSUPY Y3 Y2 Y1 Y0 C7
IN IN IN IN IN IN IN OUT SUPPLYD SUPPLYD OUT IN/OUT IN/OUT IN IN IN IN OUT OUT OUT OUT OUT IN/OUT OUT OUT OUT IN/OUT SUPPLYD SUPPLYD OUT OUT OUT OUT SUPPLYD SUPPLYD OUT OUT OUT OUT OUT
Blue1/Cb1 Analog Component Input Green1/Y1 Analog Component Input Read1/Cr1 Analog Component Input Blue2/Cb2 Analog Component Input Green2/Y2 Analog Component Input Read2/Cr2 Analog Component Input Analog Shield GNDF FIFO Reset Write Input Digital Decoupling Circuitry Supply Voltage Supply Voltage, Digital Circuitry Ground, Digital Circuitry Digital Decoupling Circuitry GND I2C Bus Clock I2C Bus Data Reset Input, Active Low Test Pin, connect to GNDD VGAV Input Y/C Output Enable Input, Active Low FIFO Input Enable FIFO Write Enable FIFO Reset Write/Read FIFO Read Enable FIFO Output Enable Main Clock output 20.25 MHz Pad Decoupling Circuitry GND Pad Decoupling Circuitry Supply Voltage Double Clock Output Clock Output Supply Voltage, LLC Circuitry Ground, LLC Circuitry Picture Bus Luma (MSB) Picture Bus Luma Picture Bus Luma Picture Bus Luma Ground, Luma Output Circuitry Supply Voltage, Luma Output Circuitry Picture Bus Luma Picture Bus Luma Picture Bus Luma Picture Bus Luma (LSB) Picture Bus Chroma (MSB)
42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
C6 C5 C4 VSUPC GNDC C3 C2 C1 C0 GNDSY VSUPSY INTLC AVO FSY/HC/HSYA MSY/HS VS FPDAT/VSYA VSTBYY CLK5 NC XTAL1 XTAL2 ASGF GNDF VRT I2CSEL ISGND VSUPF VOUT CIN VIN1 VIN2 VIN3 VIN4 VSUPAI GNDAI VREF FB1IN AISGND
OUT OUT OUT SUPPLYD SUPPLYD OUT OUT OUT OUT SUPPLYD SUPPLYD OUT OUT OUT IN/OUT OUT IN/OUT SUPPLYA OUT IN OUT SUPPLYA OUTPUT IN SUPPLYA SUPPLYA OUT IN IN IN IN IN SUPPLYA SUPPLYA OUTPUT IN SUPPLYA
GNDC GNDC GNDC X X GNDC GNDC GNDC GNDC X X LV LV LV LV LV LV X LV LV or GNDD X X X X X X X X LV LV VRT VRT VRT VRT X X X VREF X
Picture Bus Chroma Picture Bus Chroma Picture Bus Chroma Supply Voltage, Chroma Output Circuitry Ground, Chroma Output Circuitry Picture Bus Chroma Picture Bus Chroma Picture Bus Chroma Picture Bus Chroma (LSB) Ground Sync Pad Circuitry Supply Voltage, Sync Pad Circuitry Interlace Output Active Video Output Front Sync/ Horizontal Clamp Pulse/Front-End Horizontal Sync Output Main Sync/Horizontal Sync Pulse Vertical Sync Pulse Front End/Back-End Data/Front-End Vertical Sync Output Standby Supply Voltage CCU 5 MHz Clock Output Not Connected Analog Crystal Input Analog Crystal Output Analog Shield GNDF Ground, Analog Front-End Reference Voltage Top, Analog I2C Bus Address Select Signal Ground for Analog Input, connect to GNDF Supply Voltage, Analog Front-End Analog Video Output Chroma/Analog Video 5 Input Video 1 Analog Input Video 2 Analog Input Video 3 Analog Input Video 4 Analog Input Supply Voltage, Analog Component Inputs Front-End Ground, Analog Component Inputs Front-End Reference Voltage Top, Analog Component Inputs Front-End Fast Blank Input Signal Ground for Analog Component Inputs, connect to GNDAI
12. SERVICE MENU SETTINGS

To enter the service menu, first enter the MENU by pressing MENU button and then press the digits 4, 7, 2 and 5 respectively.
12.1.
Picture Adjust Source => All possible sources given with the chasis as a list. Mode => Three items as a list; NATURAL, DYNAMIC, CINEMA Colour Temp => Three items as a list; COOL, NORMAL, WARM Contrast => Slider Bar. Changing value between 0 to 63. Brightness => Slider Bar. Changing value between 0 to 63.
Sharpness => Slider Bar. Changing value between 0 to 31. Colour => Slider Bar. Changing value between 0 to 99. R => Slider Bar. Changing value between 0 to 31. G => Slider Bar. Changing value between 0 to 31. B => Slider Bar. Changing value between 0 to 31. Backlight => Slider Bar. Changing value between 0 to 255. In this menu preset values for each Mode (Contrast, Brightness, Sharpness, Colour values for each Mode-NATURAL, DYNAMIC, CINEMA) and for each Colour Temp. (R, G, B values for each Colour Temp- COOL, NORMAL, WARM) are determined for each source.
12.2.
SOUND1
Menu Subwoofe => If ON, Subwoofer option is available in TV set, and the item is visible in sound menu, else Subwoofer is not available. Subwoofer Level (dB) => This value is gain value of Subwoofer output in dB. -30...12 Subwoofer Corner Freq. (x10Hz) => Last low frequency value that is amplified. 5...40 Menu Equalizer => If ON, visible in sound menu, else invisible. Menu Headphone => If ON, visible in sound menu, else invisible. Menu Effect => If ON, visible in sound menu, else invisible. Menu Wide Sound => If ON, visible in sound menu, else invisible. Menu Dynamic Bass => If ON, visible in sound menu, else invisible. Menu Virtual Dolby => If ON, visible in sound menu, else invisible. Carrier Mute => If ON, in the absence of an FM carrier the output is muted, else not. Virtual Dolby Text => Active if VIRTUAL DOLBY is ON. According to the selection; seen in sound menu as 3D PANORAMA or VIRTUAL DOLBY.
12.3.
SOUND 2
AVL => AVL is controlled from this menu by service user. ON/OFF Menu AVL => If ON, AVL item is visible in sound menu, and AVL can be controlled from sound menu by normal user, else AVL is invisible to normal user. FM PRESCALE AVL ON => If AVL ON, set value in this item is used as prescale value for the related standard. 0...127 NICAM PRESCALE AVL ON => If AVL ON, set value in this item is used as prescale value for the related standard. 0...127 SCART PRESCALE AVL ON => If AVL ON, set value in this item is used as prescale value for scart outputs. 0...127 SCART VOLUME AVL ON => If AVL ON, set value in this item is used as volume value for scart1 and scart2. 0...127 FM PRESCALE AVL OFF => If AVL OFF, set value in this item is used as prescale value for the related standard. 0...127 NICAM PRESCALE AVL OFF => If AVL OFF, set value in this item is used as prescale value for the related standard. 0...127 SCART PRESCALE AVL OFF => If AVL OFF, set value in this item is used as prescale value for scart outputs. 0...127 SCART VOLUME AVL OFF => If AVL OFF, set value in this item is used as volume value for scart1 and scart2. 0...127
12.4.
Options
Burn-In Mode => If ON, When TV is powered ON Green, Blue, Red is displayed in sequence until Menu button is pressed. FIRST APS => If ON, First APS menu is displayed when the TV is switched on with the factory default settings. APS Volume => After First APS function finishes, the volume of the TV is that value. AGC (dB) => Tuner AGC value. Power-Up Mode => Mode defines the TV set power on state. Stand-by : When TV is ON set is in stand-by mode Normal : When TV is ON set is in normal mode Last State: When TV is ON set is in Last State mode
Factory Reset loaded.
=> OK to activate. When OK is pressed on this item, factory defaults
Enter Flash Mode => Before uploading SW this mode must be selected. Reset Eeprom => Initialize default settings
12.5.
TV Norm
BG DK I L LP M => If ON, supported, else not supported => If ON, supported, else not supported. => If ON, supported, else not supported. => If ON, supported, else not supported. => If ON, supported, else not supported. => If ON, supported, else not supported.
12.6.
Features
PIP/PAP Blue Background Menu Transparency Menu Timeout Backlight Single Tuner Dynamic WB => If ON, PIP/PAP available else not. => If ON, Blue Background is visible in Feature Menu else not. => If ON, Menu Transparency is visible in Feature Menu else not. => If ON, Menu Timeout is visible in Feature Menu else not. => If ON, Backlight is visible in Feature Menu else not. => If TV set has one tuner Single Tuner must be ON. If TV set has double tuner Single Tuner must be OFF. => Dynamic White Balance
12.7.
Teletext
TOP TXT Fast TXT Teletext Language => If ON, Top Text feature is available else not. => If ON, Fast Text feature is available else not. => Teletext Language may be controlled from this menu by service
user. Menu Teletext Language => If ON, Teletext Language item is visible in Feature Menu, and Teletext Language can be controlled from Feature Menu by normal user, else Teletext Language is invisible to normal user.
12.8.
Source
TV SC1 SC2 SC2 SVHS SC3 SC3 SVHS YPBPR FAV SVHS HDMI PC This menu is related with the options of the chassis. These items may be ON or OFF. If ON, the source is available in TV set, and the item is visible in source menu, else the source may be available but invisible to user.
12.9.
Menu Languages 1 & 2
The language options for the Language item in Feature menu can be set ON or OFF from this menu.
13. BLOCK DIAGRAM
MAIN BOARD
AUDIO DECODING MSP3411G MICRONAS AUDIO / VIDEO / GRAPHICS IN / OUT MAIN_L, MAIN_R
AUDIO AMP BOARD
AUDIO AMPLIFIER D-CLASS
IDTV, SVHS,MMC(RGB), PC IN
SVP-EX59 LVDS OUT 8-BIT YUV VPC3230D VIDEO PROCESSOR PIP PICTURE MICRONAS
SDA5550 MCU MICRONAS
HDMI DECODER SIL9993
24-BIT RGB
PSU
No. 0210
TFT TV Service Manual
BLOCK DIAGRAM
36
14. SCHEMATIC DIAGRAMS

S1004 VCC5V_FILTERED
L1003 26R_100MHZ_1.5A 50V C1014
R1053 R1059
8V_FILTERED
22u L2000 C2004 470p 50V
47u
1N4148
CTF5543_HOR
R1004 100R SCL SDA R1008 100R R1029 C1020 33p 25V 11 SCL TAGC 14 100R
12k
12
SIOMAD
NC
13
IC204
TU1000
R1036
R1013 100R
2k 4
15k
Q2002 BC848B
QSS_TUN2
TUN2_CVBS
C1056
50V 22u SC1_AUDIO_L_OUT Q2001 BC848B C2005 50V 22u SC3_AUDIO_L_OUT R2006 1k R2009 C2006 1k QSS_TUN1 FB_CONTROL VCCA_3V3
AGC
C1053
R1032 R1037 75R C1034 X1000 R1043 10k 47k
22n
C1021
33p 25V
VCC_5V
4k 7
R1060
22p 25V C1036 9 TOP VAGC 16 470n 63V 8 AUD CVBS 17
4MHz
R1054
TU
10
SDA
REF
15
10p 25V
BC848B Q1006
75R
AS
3 VCC_5V
R1042 220R
R1061 560R C1057
C1128 56p C1120 C1122 50V C1123 56p
R2004 AUDIO_L_OUT 100R Q2003 BC848B
QSS_TUN2
50V
C1007
SCL
C1125
33p 25V
R1025 47R
Q1003 BC848B 50V 47u
22n 50V
50V 22u R2005 SC1_AUDIO_R_OUT Q2004 BC848B 50V 22u C2007 SC3_AUDIO_R_OUT R2007 1k R2008 1k L1018 VCC_5V 22u 1n5 C1144 C1152 C1137 560p C2008 C1130 56p 56p AUDIO_R_OUT 100R
18.432MHz
33p 25V C1013
C1042
1p8
C1028 C1002 50V 10u C1011 NC 6 25V 100n 6 470n 63V C1029 VCC_5V 10n 50V C1024 4 5k6 10n 50V C1025 3 390p 50V C1005 3 GND 2 IN2 OUT2 5 1n 50V C1057 1 IN1 OUT1 4 2 5
TDA9885T
AFD VPLL 19
C1037
R1038 50V 10n 330R
R2200 47R
50V 1n5
C2200
D_CTR_I/O_1
ANA_IN2+
C_CTR_I/O_0
ANA_IN1+
TESTEN
ANA_IN-
NC5
XTAL_IN
NC6
NC4
TP
STANDBYQ
ADR_SEL
AUD_CL_OUT
XTAL_OUT
50V 39p C1084
AVSUP
100n 25V DEEM VP 20
C1045
R1070 SCL 100R
10u
16V 100n C1195
64
63
62
61
60
59
58
57
56
55
54
1p8
53
52
51
50
49
R1022 22k
C1048
VS
VCC5V_FILTERED 10u 16V R1071
R1011 C1006 50V 10u NC/ADC 8
C1085 39p
C1035
VCC_33V VCC5V_FILTERED
FMPLL
AFC
21 C1201 100n 25V
R1128 4R7
SDA 33V_FILTERED
100R
1 2 3 4
12C_CL 12C_DA 12S_CL 12S_WS 12S_DA_OUT 12S_DA_IN1 ADR_DA ADR_WS ADR_CL DVSUP DVSS 12S_DA_IN2 NC1 NC2 NC3 RESETQ
C1203 50V 100n
C1202
C1204
100n 50V 50V 100n
R1031 6k8
VST
R1000 2k2 S1008
33V_FILTERED
50V 10u
OP1
OP2
22
22k R1028
I2S_CL I2S_WS R1068 1k I2S_DA_OUT Q1007 BC858B BZT55C3V6 R1069 470R IC206 I2S_DA_IN1
SAW_SW2 VIF2 SIF1 23
5 6 7 8
IF2
10 L1002 1u
VCC_5V 1 VIF1 SIF2 24
R1127 4R7
IF1
11 1n 50V IF1
VCC5V_FILTERED
C1197
C1198
C1199 50V 100n
C1206
C1200 50V 100n
C1205 50V 100n
Z1000 SF_63962
S1009
IC208 MSP3452G
IC200
3 GND 2 IN2 OUT2 5
100n 50V 50V 100n
50V 10u
IC207 1N4148 C1080 100u 270p 50V C1081 470p 50V C1086
470R R1067
9 10 11 12 13
R1124 CC5V_FILTERED V 100R C1194 C1192 100n 16V 16V 1u 10k R1125 R1126 1k
L1008 S1003 VCC_5V 22u C1078 10u 50V C1079 1n5 50V
1 IN1 OUT1 4
50V 10n IF1
Z1003 K9356M
D1003 BA782 D1007 BA591 R1048 15k L1032
VCC5V_FILTERED
14 15 ESD C1087 470p 1kV 16
C1193
R1050 2k4
SC2_OUT_R
SC1_OUT_R
SC2_OUT_L
C1055 DACM_C DACM_R DACM_L DACA_R DACA_L VREF2 S1010 R1123 47k Q1016 BC848B QSS_TUN1 C1052 Q1005 BC848B 10p 25V R1049 4k7 R1051 75R HP_R C1116 22n 50V
DACM_SUB
S2013
SC1_OUT_L
RESETQ_MSP
DACM_S
AHVSUP
CAPL_M
CAPL_A
VREF1
C1191
100n 16V
Q1015 BC848B
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R1121 SAW_SW2 10k
R1122 10k
1n
HP_L
C1118
1n
32
R1052 560R
L1001
VCC_8V
5 C1054 22n 50V 4 3 2
MUTE_AMP
4R7 R1130
8V_FILTERED HEADPHONE
100R R1089
C1010
C2202
100R R1093
C1134
50V 100u
47u 50V
10u 50V
1N4148
R2202 220R
CTF5543_HOR
SCL R1005 100R
R1010 100R R1114 2k2
C300
C295
10u
12k
12
SIOMAD
NC
13
R1039
10u
C1154 50V
100n 16V
IC205
D1000
PL1001
C1112 1n 50V
50V 1n C1114
MAIN_R C1097
R1030 C1022 33p 25V 11 SCL TAGC 14 100R R1034 R1040 10k 47k C1038 X1001 33p 25V 10 SDA REF 15 VCC_5V 4MHz 22p 25V C1039 9 TOP VAGC 16 470n 63V TUN1_CVBS
C1133 1n 50V
MAIN_L
C1126
SUBW
SDA
C1023
R1044
100R R1095
R1098
75R
2 3 IDTV/MMC/DVD_R_IN 50V 1n C1117
100R
TU
R1009 100R
IDTV/MMC/DVD_L_IN
C1150 16V 100u
50V 1u
R1103 4k7
HP_R
C1165 C1167 100u C1178 22u L1028 1n L1027 22u C1180 100u
S1000 AS 3
AUDIO_R_OUT
AUDIO_L_OUT
100R R1090
100R R1094
R1035 2k2
50V 470p
C1151 R1129 4R7 VCC5V_FILTERED
C1136
C1008
33p 25V
R1026
IC2000
C1043 7 DGND AGND 18 50V 1n5 50V 47u 1 C1047 R2201 47R R1041 50V 10n 150R C2201 C2009 2 22u 50V C2010 8V_FILTERED 3 50V 1n 100n 16V SC2_AUDIO_L_IN S2002 S2001 SC3_AUDIO_L_IN R2011 1k R2010 1k VS ADDR 26 50V 1n CAPACITANCE SCL 27 C2026 47p S2000 GND SDA 28 47p C2025 R2018 100R SCL
IC209
R1112 47k VDD OUTA 1
SDA
5 C1015 33p 25V
C1003
C1012
100n
10u
470n 63V C1031 VCC_5V 10n 50V C1026 4 5k6 10n 50V C1027 3 390p 50V 3 GND 2 IN2 OUT2 5 2 VIF2 SIF1 23 OP1 OP2 22 FMPLL AFC 21 5 DEEM VP 20
220n 16V
220p 50V
22u BC848B Q1011 L1017 4k7 R1100
C1173
R1092 1k BC848B Q1009
R1096 1k
TDA1308
INBINA+ 3
R1023 22k
C1049
VS
VCC5V_FILTERED 10u 16V
6 C1168
C1009
50V 10u
NC/ADC
VCC_5V 100n 25V R1024 6k8 22k R1027
C2011
C2012 4 330n L1 R1 25
C2028
C2027 R2019 1k S2009 C2029 R2020 1k S2003
50V 1u
R1012
C1041
C1159
2n2
INB+
VSS
SC2_AUDIO_R_IN IDTV/MMC/DVD_R_IN C1124 C1132 50V 22u 10k R1113 HP_L
33V_FILTERED VST 9 R1001 2k2 C1004 S1007 L1000 IF2 10 1u
330n C2030 5 L2 R2 24 330n C2031 6 L3 R3 23 330n 50V 1n C2032 R2021 1k 50V 1n
IDTV/MMC/DVD_L_IN
50V 1n
330n 50V 1n SAW_SW1 PC_AUDIO_L_IN R2012 1k C2015 C2016
SC3_AUDIO_R_IN
1n 50V S1006 C1056
PC_AUDIO_R_IN
GND 2 IN2 OUT2 5 8 1n 1 IN1 OUT1 4 YPBPR_AUDIO_L_IN SAW_SW1 R2014 1k R2013 1k NC2
TEA6420
NC3 21 C2033 R2022 1k YPBPR_AUDIO_R_IN
C1001
C1000
Z1002 K9356M
SW01=H SW01=L L BG,DK,I,L C1189 16V 100n BC848B S1005 Q1014 10k R1120 10k R1119
C2018 9 330n C2020 L4 R4 20
C2034
330n C2037 10 L5 R5 19 330n 1n C2036 R100 4k7 R101 4k7 R2023 1k
1n
C2017
1n 50V
1n 50V
C2019
330n C2022 11 22u L0UT1 ROUT4 18
AUDIO_R_LINE_OUT
DAC_AOL
DAC_AOR
AUDIO_L_LINE_OUT
1n
47k R1118
BC848B Q1013 S2012 AUDIO_L
S107 MUTE_AMP BZT55C5V1 D1005 Q100 BC848B S108 MUTE_AMP R103 4k7 PC_AUDIO_R_IN S2010 & R2208 are for mute option Mute is active high R102 4k7
R2015 100R C2021 R2016 100R 1n C2023 1n
L2001 BLM21B201S
C255 50V 4n7
STBY_3V3
1n 50V
Z1001 K3953M
NC1
NC4
22
IC201
IF
R1091 100R
IF1
11
VIF1
SIF2
24
R1097 100R
1 IN1
OUT1 4
SC2_AUDIO_R_OUT
SC2_AUDIO_L_OUT
330n 16V
50V 22u
C2013
C2014
C1181 10u
NC
AFD
VPLL
19
47k
8V_FILTERED
R1101 10k
R1102
C1030
TDA9885T
100n SDA 7 OUTB INA2
C1179 220p
C1040
D1006
D1002
BA591
BA782
L1031
HEADPHONE
L2002 BLM21B201S
C2024 12 22u 50V 22u 13 LOUT2 ROUT3 16 ROUT1 LOUT4 17
AUDIO_R C1187 IF 10n 50V C1186 10k 1u 16V AUDIO_L2
L216
123
R2203 100R C247 1n 50V
L2018
JK200 JACK-AK16
1k R1117
R1116
L219 BZT55C5V1 D1004 50V C257
PC_AUDIO_L_IN
C1188
16V 100n
AUDIO_R2 100R R1115 VCC5V_FILTERED
R2204 100R C249 1n 50V
L2019 BLM21B201S
C254 50V 22u 14 C251 ROUT2 LOUT3 15
L218
No. 0210
MAIN BOARD - TUNER/IF/AUDIO CIRCUIT

37
4n7
C1184 2n2
R2017 100R
C1162
C1183 1n
SCL
AUD
CVBS
17
47R
BC848B Q1002
C1196 100n
100u C1172
L1029
50V 1n C1106
L1030
PL1003
50V 1n C1121
AGC
50V 1n C1119
N.C
SDA
DGND
AGND
18
R1078 100R
X1002
C1113 100n 25V
R104 4k7
100n
C1166 AVSS MONO_IN VREFTOP SC1_IN_R SC1_IN_L ASG1 SC2_IN_R SC2_IN_L ASG2 SC3_IN_R SC3_IN_L ASG3 SC4_IN_R SC4_IN_L AGNDC AHVSS 48 47 46 45 C1138 44 330n 43 42 C1148 41 1n 40 39 C1140 38 37 36 330n 35 34 33 C1145 3u3 C1149 100n 330n C1163 C1147 330n C1164 1n C1175 1n 1n C1153 330n C1171 330n C1158 1n C1170 C1157 1n 330n C1176 C1177 330n C1174 1n N.C C1156 1n
10u
C1169 R1104 1k
L1019 SC1_AUDIO_R_IN
R1105 1k
L1022 SC1_AUDIO_L_IN
R1106 1k R1107 1k R1108 1k R1110 1k R1111 1k R1109 1k
L1020 AV_AUDIO_R_IN L1023 AV_AUDIO_L_IN L1021 AUDIO_R S2011 L1024 AUDIO_L L1025 S2008 SC3_AUDIO_R_IN S2007 IDTV/MMC/DVD_R_IN L1026 S2005 IDTV/MMC/DVD_L_IN S2006 SC3_AUDIO_L_IN AUDIO_R2
S2010 AUDIO_L2
PL1002
D1001
50V 1n
50V 1n5
C1182 2n2 50V
C1185 2n2 50V
VCCA_3V3
VCCA_3V3
SC3_AUDIO_R_OUT
SC3_AUDIO_L_OUT
SVHSfromSC2_C
LG_1/IRQPDP
39p C304
VCC_8V
4R7 R229
V8 PANEL_VCC 5V
SC3_V_IN
SC3_V_OUT
SCL_PANEL
V8
75R R264
SDA_PANEL
PIN8_SC3
SC3_AUDIO_R_IN
SC3_AUDIO_L_IN
VIDEO SWITCH TEA6415C

VCCA_3V3 VCC_12V
C298
C294
100n 16V
10u
VCCA_3V3
R251 4k7
R250 4k7
C301 50V 150p
S113
SC1_V_IN N.C R203 75R C285 39p 50V 220n 16V R206 100R
INPUT1
INPUT8
20 220n 16V V8
Q200 BC848B R235 75R 1k R239 CVBS_SVP MAIN PICTURE TO SVP
S112
C274
C282
S111
IDTV/MMC/DVD_CVBS
50V 1n
BZT55C10 D221
330R
S648
PDP_GO/BL_ON_OFF
S109
PL203
S638 S639 PANEL_VCC S641 BZT55C10 2 L209 D2104 R2025 330R 3 50V 1n L2006 4n7 C2045 C264 4 5 L211 BZT55C10 D2003 1 L207 D2004 N.C D2000 S640 BZT55C10 BZT55C10 D2002 L2005 BZT55C10 R2024 330R BZT55C10 D2105
L203 C284
R249 SC2_AUDIO_R_OUT
C303
47p 25V
SDA
DATA
GND2
19 10k R220
VCC_12V
CPU_GO
S643
S642
4n7 50V SC2_AUDIO_R_IN R253 330R 150p C277 BZT55C10 BZT55C10 SC2_AUDIO_L_OUT
C260 SC2_V_IN R204 75R C292 39p 50V N.C 220n 16V R207 100R 47p 25V C287 4 CLOCK OUTPUT5 17 10k R222 TUN1_CVBS R200 75R C259 39p 50V N.C C265 5 220n 16V C279 6 R205 75R C280 39p 50V N.C 220n 16V S201 N.C VCC_8V SVHS_Y_IN R201 75R VCC_8V 16V 100u C283 S200 CONNECT C288 C297 8 39p 50V N.C 220n 16V 9 C299 C273 220n 16V VCC GND1 12 INPUT5 OUTPUT1 13 10k R225 10k R224 7 PROG OUTPUT2 14 INPUT3 OUTPUT4 16 3 INPUT2 OUTPUT6 18 10k R221
R226 100R
Q203 BC848B R240 75R VxtoVPC GOES TO VPC3230 FOR PIP PICTURE
11
21
13
15
23
19
25
17
27
29
SCL
R227 100R
1k R241
4n7 C2044
C2040 L2003 C2042 L2004 1n L2008 L2007
D2001
10
20
12
22
16
18
14
24
26
28
30
PL103
C2039 C2038 150p 50V S647 150p
L212
1n 50V 6 L214 D203
D2103 C266 D223 SC2_AUDIO_L_IN
S636
S646
TEA6415C
INPUT4 OUTPUT3 15 10k R223 V8 R230 100R
V8
4n7 PIN8_SC2
TXOUT3+
TXOUT2+
TXOUT1+
TXCLKOUT+
TXOUT0+
TXOUT3-
TXOUT2-
TXCLKOUT-
TXOUT1-
TXOUT0-
AV1_V_IN
D205 75R R288 D207 R289 75R 75R R290 D208 SC2_G D2100 BZT55C5V1 SC2_B
Q202 BC848B R237 75R 1k R242 R1046 75R R1045 1k
SELECTABLE VIDEO OUT FOR SCART 2 SC2_V_OUT
23 22 PARITY 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42 D222 BZT55C10 C258
10
C270
IC210
DISP_EN/PDWN
D2101 BZT55C10
TV_LINK
R1033 100R
BC848B
13
SC1_V_OUT
LVDS OUTPUT
1 50V 150p C252
2 3
4 5
6 7
8 9
10 11
12 13
14 15
16 17
18 19
20 L204 21
12
Q1004
PL205
L213
50V 4n7
11
S204 14 S205
C2049 100n C293 150p 16V
SC2_R SVHSfromSC2_C
V8
L200 50V 22u
R2001 100R C275 10 INPUT6 INPUT7 11 39p N.C R231 75R 220n 16V C276 TUN2_CVBS
L206
Q2000 BC848B R2002 75R R2003 1k
15
BZT55C10
D212
C267
16
C250 150p
150p
L208 D204 50V 1n L210 R252 330R
75R C248 R275 D218 75R R276
SC2_FB
75R
S221
D209
75R
C291 C268 39p 50V SC3_V_IN R202 75R
D202
R287
R260
L205
1n
17
SC3_V_OUT
R286 75R
SC2_V_OUT D2102 18 19
D206
D210
220n 16V
R285 75R
R254 330R
D214 BZT55C10
S220
C296 BZT55C10 C286 BZT55C10
D211 SC2_V_IN 20 BZT55C10
50V 4n7 D220
S212 MMC_CVBS IDTV/MMC/DVD_CVBS
21
D213
D219
C269 BZT55C10 D224 D2500 150p
150p 50V
75R C278
SC1_V_IN
PIN8_SC1
SC1_AUDIO_L_IN
BZT55C5V1 D215
V8
AV1_V_IN
CHROMA SWITCH
S635 1 2 3 4 5 6 L202 7 C271 1n 8 AV_AUDIO_R_IN D216 R232 75R C262 D217 220n CIN CIN 220n 16V R268 47k C245 R270 100R N.C SVHS_Y_IN R267 10k C263 39p
R266 18k
BC848C Q204
Q205 C246 BC848C
MMC/DVD VIDEO INPUTS

1 2 S213 S633 C_SELECTED 4 MMC_B MMC_R MMC_G SEL S652 VCCA_3V3 3 DVD_12V_SENSE S651 MMC_CVBS
SC1_AUDIO_R_OUT
SC1_AUDIO_L_OUT
SC1_AUDIO_R_IN
SC1_G
SC1_FB
SC1_V_OUT
C261
150p 50V
SCSDA
SC1_R
SCSCL
SC1_B
I2C BUFFER FOR PANEL DIMMING SELECTION

IC215
4k7 R271 VCC_5V SDA2 S645 1 2 3 4 NC1 NC2 VCC VCLK 8 7 6 5 S644 VCC_5V SCL2
SVHSfromSC2_C AV_AUDIO_L_IN
PL201
L201 C272 1n 50V
C2050
CHROMA_SW
R269 47k 100n 16V
R274 1k
R273 10k
220n 16V
50V C253 150p
R261
N.C
Q206 BC848C
5 6 S634
SDA_PANEL
ST24LC21
NC3 VSS SCL SDA
SCL_PANEL
EXTERNAL INPUT
PL1
VCC_5V
IC214
1 C2051 C2052 100n Q1 VCC 16 STBY_5V C2053 100n
VCCA_3V3
STBY_3V3
R211
R212
PL200
C290 gnd 15 14 VCCA_3V3 STBY_3V3 STBY_3V3 13 12 11 10 S223 S649 DDC_DATA_PC DDC_CLK_PC
2k
2k
IC211
R215 22R 1 1A VCC 14 C289 100n 16V VCCA_3V3 1N4148 VCC_5V D200 1N4148 C302 100n 16V DDC_5V D201 VGA_VSIN R280 150k
100n
Q2
Q0
15 C281 100n R279 10k
S650
S637
IC213
1 A0 VDD 16
100n 16V
Q3
DSERIAL
14
2 BZT55C12 BZT55C12 D2502
1Y
6A
13
SDA2 2 A1 SDA 15 330R R255 SCL2 3 A2 SCL 14 330R R256
D2501
Q4
OE
13
R216 10k
R213 22R
R217 10k
2A
6Y
12
74HC595D IC212
5 Q5 STOP 12 VGA_HSIN
R246 4k7
R277 4k7
R265 4k7
R248 4k7
9 8
DDC_5V 4 PGAGND 2Y
74LVC14A
5A 11 8 VCC VCLK
NC1 NC2
1 2 3 4 R281 10k
Q6
R257 4k7
CHROMA_SW
P0
INT
13
R258 4k7
4k7 R259
VGA_VSIN 6 LG_1/IRQPDP 5 4 VGA_HSIN R214 22R 6 75R R208 75R R209 75R R210 PGAGND 7 GND 4Y 8 3Y 4A 9 5 3A 5Y 10 DDC_CLK_PC 22R R238 VGA_VSIN DDC_DATA_PC 100R R218 100R R219
7 6 5
PCF8574
DISP_EN/PDWN 5 P1 P7 12
ST24LC21
SCL SDA
NC3 VSS
Q7
MR
10 R283 10k
8 RGB_SW2 6 P2 P6 11 RGB_SW3 3 2 RGB_SW1 P5 SW_ENABLE 1
GND
Q7OUT
9 R282 10k PC_STBY
VCCA_3V3
SHCP
11
Q207 BC848C
P3
10
Q208 BC848C gnd 8 VSS 4 9 PANEL_VCC_ON/OFF VGA_GIN VGA_RIN VGA_BIN R284 47k
PORT EXPANDER
D-SUB 15 PC INPUT & DDC CIRDUIT
PC STAND-BY
No. 0210
MAIN BOARD - I/O CIRCUIT

38
I2S_DA_OUT
I2S_DA_IN1
VCC_5V
DVS_2EX
DHS_2EX
VCCD2_3V3
S303 VCCD2_3V3 VCCD_3V3
BLM21B201S
I2S_WS
I2S_CL
L2009
RESETQ_MSP
VCCD2_3V3
IC316
RGB_SW3 R2030 1k SC1_R SC2_R RGB_R_VPC BLM21B201S 100n C362 1 2 3 4 SC1_G SC2_G RGB_G_VPC 5 6 7 8 A B C D E F G H R O N M 16 15 14 13 12 11 10 9 SC1_B SC2_B RGB_B_VPC SC2_FB FB_VPC SC1_FB VCC_5V
C331
C333
25V 2n2
10u 50V
YPBPR_AUDIO_L_IN
YPBPR_AUDIO_R_IN
VCC_5V
SDA
SCL
AUDIO_R_LINE_OUT
AUDIO_L_LINE_OUT
R2028 10R 8 R1
C2046
STBY_5V L308 VCC_5V BLM21B201S
R2026 100R
R2027 100R
10u 50V C2047 C2048
C330
C332
16V 220n 50V 3p3
R2031 33R 50V 3p3 BLM21B201S 22R R316 22R R317
L313
BLM21B201S
R2
R3
R4
R2032 33R
BLM21B201S
L2010
S302
C318 50V 1n5
L311
10n 50V 44 43 42 41 40 39 38 37 36
100n 25V 35 34
20.25MHz
L314
25V 47n
PI5V330_SOIC
L K J I
C340 50V 1n5
X300 C319 S331 S330 S323 S324
I2S_DEL_OUT1
I2S_DEL_IN1
DVSUP1
I2S_DEL_WS
DVSS1
ADR_SEL
I2S_DEL_CL
RESETQ
SDA
TEST
SCL
10k R315
50V 390p
50V 68n
C341 C343
C320 NC25 NC24 NC23 NC22 NC21 33 BLM21A601S BLM21A601S BZT55C10 D225 32 31 30 29 28 27 26 BACK LEFT 25 24 C321 I2S_DEL_IN3 23 75R R304 75R R305 75R R306 75R R307 75R L300 VCC_5V 220n 16V C349 16V 100u 1n8 50V 390p C350 C348 C305 VCC_5V R300 76 77 C306 47n 25V C316 10u 50V 78 79 VSUPAI GNDAI VREF FB1IN AISGND R1/CR1IN B1/CB1IN R2/CR2IN B2/CB2IN G1/Y1IN VSUPCAP G2/Y2IN GNDCAP FFRSTW VSUPLLC LLC1 LLC2 VSUPPA GNDPA 29 28 27 26 C345 25 C347 50V 1n5 25V 47n R321 22R R2029 10k 2 3 1 2 3 1 BZT55C10 61 51 63 53 60 59 55 49 45 43 62 52 50 57 58 48 47 56 46 64 54 44 42 41 C317 D226
1 2 3 4 5 6 7 8 9 10 11
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 I2S_DEL_OUT3 I2S_DEL_OUT2
RGB SWITCHING FOR VPC
XTAL1
C1
C3
CLK5
C0
ASGF2
NC2
C2
C5
MSY/HS
AVO
VS
XTAL2
FSY/HC
10u 50V 25V 47n SVHSfromSC2_C
VSUPSY
GNDSY
VSUPC
VSTBY
FPDAT
INTLC
GNDC
L316
L317
C4
C6
C7
C359 470p 50V
C360 470p 50V
VxtoVPC
MAD4868A
NC20 NC19 NC18 NC17 NC16
66 67 CIN 68 69 70 71 C361 1n 72 1n C322 73 680n 74 75
VRT I2CSEL ISGND VSUPF VOUT CIN VINI VIN2 VIN3 VIN4
Y1 Y2 Y3 VSUPY GNDY Y4
39 38 37 36 35 34 33 32 31 16V 100n 30 C346 C344
2 3
R2 R3 R4
7 6 5
DIN[1] DIN[2] DIN[3]
4 L2011
A JK303
A JK304
BACK RIGHT
L AUDIO FAV
R AUDIO FAV 100n 16V
BLM21B201S R323 33R R1 8 R2 R3 R4 7 6 5
VCCD2_3V3 SVP ENTEGRESINE
I2S_DEL_OUT4
I2S_DEL_IN2
I2S_DEL_IN4
NC11
NC15
1 2 3
DIN[4] DIN[5] DIN[6] DIN[7]
DVSUP2
DVSS2
IC216 VPC323XD
Y5 Y6 Y7 GNDLLC
NC13
NC12
NC14
20
18
15
16
13
12
14
17
19
21
22
L315 BLM21B201S VCCD2_3V3
N.C
DIN[0-23]
CLK_2EX
IC2001
C323
65
GNDF
Y0
40
R322 33R 18 R1
DIN[0]
PL301
1 S325 2 3 S326 4 SUBW 50V 220p C356 75R R331 JK300 123 WHITE_FAV Y 30032233 JK301 50V 220p C357 75R R332 WHITE_FAV Pb 30032234 Pr 1P_RED_FAV JK302 123 50V 220p C358 A 123 A 220n C364 AUDIO_L_LINE_OUT C363 220n RCA_Y RCA_PB RCA_PR C365 220n AUDIO_R_LINE_OUT R312 4k
80 FB_VPC S316
YCOEQ
VSUPD
ASGF1
VGAV
FFWE
11
FFIE
13
21
10
15
19
12
20
17
16
18
22
23
50V 330p C311 RGB_B_VPC
N.C
16V 220n
14
S301
SCART RGB
R313 1k
100R R318
100R R319
C327 50V 330p C312 RGB_G_VPC C328 25V 560p 50V 330p C313 N.C 50V 1n5 50V 270p 50V 390p
N.C
VCC_5V
16V 220n
C334
C337
100R R320
C342
220n 16V N.C
24
CLK20
GNDD
RESQ
FFOE
TEST
FFRE
SDA
NC1
SCL
C352
75R R333
16V 220n
C335 C338 SCL3 16V 220n RX1_RST# 16V 100n 330p 50V SDA3 RGB_SW1 SC1_R SC2_R
R325 1k
100n 16V
IC317
1 2 3 4 S310 SC1_G SC2_G 5 6 7 S311 8 RGB_GIN H I 9 E F G A B C D R O N M 16 15 14 13 12 11 10
VCC_5V
D102 BAV99
D104 BAV99
D106 BAV99
RGB_R_VPC C329 C308
BLM21B201S
L312
MMC_B
R309 75R
C324
SC2_FB
MMC RGB INPUTS
PI5V330_SOIC
L K J
220n 16V C309 330p 50V N.C C325
IC318
RGB_SW2 RCA_PR S309 VGA_RIN RIN2 S314 3 4 5 VGA_GIN GIN2 S307 6 7 8 C D N M 14 13 12 11 10 S336 9 S337 RCA_PB VGA_BIN R326 1k 100n C353 1 2 A B R O 16 15 VCC_5V
S340
N.C
C336 C339
SC1_FB
SC1_B SC2_B
220n 16V C310 330p 50V
VCCD2_3V3
MMC_G
R310 75R
S312
N.C C326 RGB_RIN 220n 16V
PI5V330_SOIC
RCA_Y S308 F G H K J I E L
MMC_R
R311 75R
RGB_BIN
FB BIN2
VGA & YPbPr SWITCHING
RGB SWITCHING FOR SVP
No. 0210
MAIN BOARD - VPC3230 CIRCUIT

39
CLK_2EX
ODD_PINK
DHS_2EX
100n C434
VDDMQ_2V5
PAVDD1 100n 16V C2203 100n 16V C2204 C2206 100n 16V C2205 100n 16V C440 100n 16V
R435 22R C444 16V 10u
VL1_8 R2210 10k R431
VDDMQ_2V5
VD1_8
VD1_8
100n C435
CAS#
RAS#
DIN[7]
DIN[6]
DIN[5]
DIN[4]
DIN[3]
DIN[2]
DIN[1]
DIN[0]
CS0#
WE#
IC107 74LX1G86STR
R2214
C438 MLF1 2n7 50V PAVDD2 C2207 100n 16V C2208 100n 16V C2209 100n 16V C2210 100n 16V C2211 100n 16V 16V 10u R436 22R C443 R432 10k R433 10k
STBY_3V3
22R R430 22R
CLKE
R429 22R
BA1
BA0
1 2 3
R1 R2 R3
8 GND 7 6 5 ODD_PINK R434 1k C470 C471 DVS_2EX VCC VCCA_3V3 5 1B 1A 1Y 100n 16V 4
S110
DIN[7]
DIN[6]
DIN[5]
DIN[4]
DIN[3]
DIN[2]
DIN[1]
DIN[0]
VD1_8
VD1_8
C425 16V 100n C424 100n 16V
C428 R2216 33R R2213
R4
PLF2 2n7 50V C439
R1
100n
R2
R3
10
11
DQM[3]
DQM[2]
MD[31]
MD[30]
MD[29]
MD[28]
MD[27]
MD[26]
MD[25]
MD[24]
MD[23]
MD[22]
MD[21]
MD[20]
MD[19]
MD[18]
MD[17]
MD[16]
DQS[3]
DQS[2]
26R_100MHZ_1.5A L407 PDVDD C2216 100n 16V C2217 100n 16V C2218 100n 16V C2219 VL1_8 100n 16V C455 100n 16V C459
DIGITAL IDTV INPUTS [ITU 601]

MPUGPIO4
MVREF
MCLK0
100n 16V
VDDMQ_2V5
PL104
12
C418 S437
R4
100n 16V
MCLK0#
MD[0] MD[1] MD[2] MD[3] MD[4] MD[5] MD[6] MD[7] MD[8] MD[9] MD[10] MD[11] MD[12] MD[14] MD[13] VDDMQ_2V5 MD[15] MD[16] MD[17] MD[18] MD[19] MD[20] MD[21] MD[22]
R2215
33R
C437
16V 10u
MCA[14] MCA[15]
S413 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 192 161 191 190 189 188 187 186 185 184 183 182 181 180 179 178 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129
100n 16V
MPUGPIO1
MD31
MD21
VDDM11
MPUGPIO3
VDDM13
VDDM15
VSSM15
VSSM13
MPUGPIO2
VDDC10
VSSM11
DQM3
MD25
VDDC9
MD23
DQS3
MD20
MD19
MD30
MD29
BA0
VDDM12
VDDM10
CS1
BA1
VDDM9
MD22
DQM2
VSSC9
MD27
DQS2
VSSC10
MD17
MCK0
VSSM12
VDDC7
VDDM16
MPUGPIO4
VSSM16
VDDM14
VSSM14
VSSM10
VDDC8
VDDH4
R1 R2 R3 R4 R234 100R
MCAD[1] MCAD[2] MCAD[3]
2 3
7 6 193 5 VD1_8 C413 100n 16V 8 7 6 5 STBY_3V3 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 MPUGPIO0 A_D0 A_D1 A_D2 A_D3 VDDC12 VSSC12 A_D4 A_D5 A_D6 A_D7 VDDH5 VSSH5 ADDR0 ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 ADDR6 ADDR7 VDDC11 VSSC11 RD WR ALE MPUCSON INT AVDD_ADC3 AVSS_ADC3 VREFN_3 VREFP_3 PR_R1 PR_R2 AVDD_ADC2 AVSS_ADC2 VREFN_2 VREFP_2 C PB_B1 PB_B2 AVDD3_AVSP2
MCK0_
VSSM9
VSSC8
VSSC7
MD28
MD18
MD26
VSSH4
MD24
MD16
CLKE
MVREF
CAS
RAS
WE
NC
VDDR
VSSR
CS0_
MCAD[0]
R236 100R 1 8
S411
C403 GIN2 R406 75R 100n 16V
MCAD[0-7]
MCA[0-19]
Y_G2
VDDL VSSL MA0 MA1 VDDM8 MA2 MA3 VSSM8 MA4 VDDM7 MA5 MA6 VSSM7 MA7 MA8 VDDC6 MA9 MA10 VSSC6 MA11 MD15 VDDC5 MD14 VSSM6 MD13 VDDM6 MD12 VSSM5 DQS1 VDDM5 VSSM4
128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 VDDH MD[0] DQM[0] MD[3] DQS[0] MD[4] MD[5] MD[6] MD[8] MD[7] MD[10] MD[9] DQM[1] MD[11] DQS[1] MD[12] MD[13] MD[14] MD[15] C446 C447
VDDL MA[0] MA[1] MA[2] MA[3] MA[4] 100n 16V MA[5] MA[6] MA[7] 100n 16V VD1_8 MA[8] MA[9] MA[10] MA[11]
MCAD[4] MCAD[5] MCAD[6]
1 2 3
R1 R2 R3 R4
MCA[0] MCA[1]
R233 100R 1 2 3 R1 R2 R3 R4 8 7
C404 BIN2 R407 75R 100n 16V PB_B2
MA[0-11]
MD[23] MD[24] MD[25] MD[26] MD[27] MD[28] MD[29] MD[30] MD[31]
MCAD[7] 6 5
MCA[2] MCA[3]
MCA[4] C405 RIN2 R408 75R 100n 16V PR_R2 MCA[5]
R228 100R 1 2 R1 R2 R3 R4 8 7 6 5 1 2 3
DQM[0] DQM[1] DQM[2] DQM[3]
MCA[6] 3 MCA[7]
R243 100R RD_EMU WR_EMU ALE_EMU R1 R2 R3 R4 8 7
VD1_8 100n
214 215 216 217 C411 218 219 220 221 222 223 224 225 226 AVDD_ADC2 227 228 229 230 231 232 233 AVDD3_AVSP2 R427 75R S441 234 235 236 237 238 239 VREFN_1 VREFP_1 S439 240 241 242 243 S438 244 245 246 247 248 249 R244
VD1_8 C448
PC & YPbPr INPUT
100n 16V
DQS[0] 16V 100n DQS[1] DQS[2] DQS[3] C456 VDDMQ_2V5 DIN[0] DIN[1] DIN[2] DIN[3] DIN[4] DIN[5] DIN[6] DIN[8] DIN[9] VD1_8 DIN[10] DIN[11] DIN[12] DIN[13] DIN[14] DIN[15] DIN[16] DIN[17] DIN[18] DIN[19] DIN[20] DIN[21] VDDMQ_2V5 DIN[22] DIN[23] DIN[7]
6 INT# 5
100R AVDD_ADC3 VREFN_3 VREFP_3
C401 S430 C_SELECTED R401 75R C 100n
MPUCSON
IC224 SVP_EX_51
DQM1 MD11 VDDM4 MD10 MD9 VSSC5 MD8 MD7 VDDC4 MD6 VSSM3 MD5 VDDM3 MD4 VSSM2 DQS0 VDDM2 VSSM1 DQM0 MD3 VDDM1 MD2 MD1 VSSC4 MD0 DIN20 DIN21 DIN22 DIN23 VSSC3 VDDC3 VSSH3 VDDH3
PR_R1
MAIN PICTURE
C400 CVBS_SVP R400 75R 100n 16V CVBS2
PR_R2
C449
VREFN_2 VREFP_2 C PB_B1 PB_B2
100n 16V
S431 CVBS_SVP R402 75R
C402 CVBS3 100n 16V
AVSS3_BG_ASS CVBS_OUTP CVBS_OUTN AVDD_ADC1 AVSS_ADC1 VREFN_1 VREFP_1 CVBS1 CVBS2 CVBS3 AIN_N1 Y_G1 AIN_N2 Y_G2 AIN_N3 VSSC13 VDDC13 PDVDD PDVSS PAVDD PAVSS XTALI TESTMODE LVDSGND LVDSVCC PLL_GND PLL_VCC LVDSVDDP
AVDD_ADC1
CVBS2 CVBS3 S425 RGB_GIN 100n 16V C406 Y_G1 Y_G1 Y_G2 100n C409 VD1_8 PDVDD PAVDD PR_R1 R404 75R 100n 16V C407
MD[1]
R403 75R
DIN[20] DIN[21] DIN[22] DIN[23] C452 100n
250 251 252 253 254 255 256
C451
100n 16V
MD[2]
RGB_RIN
S426
VD1_8
VREFP_1
VREFP_2
VREFN_1
VREFN_2
VREFP_3
PAVDD1
PAVDD2
PAVSS1
PAVSS2
AIN_HS
AIN_VS
FLD_IO
VDDH1
VDDC1
VDDH2
VDDC2
VSSH1
VSSC1
XTALO
TCLK+
RESET
VSSH2
VSSC2
DIN19
DIN18
DIN17
DIN16
DIN15
DIN14
DIN13
DIN12
DIN11
TCLK-
TD1+
TB1+
TC1+
MLF1
V5SF
DIN10
50V 20p 14.31818MHz
TA1+
DIN9
DIN8
DIN7
DIN6
DIN5
DIN4
DIN3
DIN2
DIN1
C414 X400 S427 RGB_BIN R405 75R 100n 16V C408 PB_B1 50V 20p
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
R418
R419
34
10k
64
DIN0
TD1-
PWM
PLF2
TC1-
TB1-
TA1-
SDA
SCL
GPO
CLK
DE
VREFN_3
100n 16V
100n 16V
100n 16V
100n 16V
C463
100n 16V
C457
22R
22R
VDDH
C415
DIN[19]
DIN[18]
DIN[17]
DIN[16]
DIN[15]
DIN[14]
DIN[13]
DIN[12]
DIN[11]
DIN[10]
DIN[9]
DIN[8]
DIN[7]
DIN[6]
DIN[5]
DIN[4]
DIN[3]
DIN[2]
DIN[1]
PAVDD1
MLF1
TXOUT3+
TXOUT2+
TXOUT1+
TXCLKOUT+
TXOUT0+
RST_H
SCL_EX
SDA_EX
TXCLKOUT-
TXOUT3-
TXOUT2-
TXOUT1-
VGA_HSIN
VGA_VSIN
TXOUT0-
VCCA_3V3
R2217 33R
MAIN RGB INPUT
PAVDD2
PLF2
DIN[0]
R422
C450
C460
C462
R420
PARITY
4k7
VCCA_3V3
VCCA_3V3
R2218 33R AVDD_ADC3 C436 C2231 100n 16V C2232 100n 16V C2233 C2234 C442 100n 16V 100n 16V C445 100n 16V 16V 10u
2u2 L404 VA1_8
DHS_2EX
DVS_2EX
26R_100MHZ_1.5A L401 VDDL C2402 100n 16V C2213 C2212 100n 16V C2214 100n 16V C2215 C2400 C2401 C2403 C2404 100n 16V 100n 16V C431 100n 16V C433 100n 16V 100n 16V 100n 16V 16V 10u VD1_8
LVDS OUT
C426
100n 16V PWM2
100n VCCA_3V3 C427
DIGITAL SINC
R423 10k
R425 10k
100n 16V VDDH
TXCLKOUT+
100n
CLK_2EX
16V 100n
C420
C422
S415
S440
16V 10u
C429
100n 16V
1N4148
26R_100MHZ_1.5A L406 AVDD_ADC1 C2239 100n 16V C2242 VA1_8 100n 16V C2240 100n 16V C2241
D101
FB_CONTROL
DE_2EX
SC2_FB_SVP
STBY_3V3
VD1_8
TXCLKOUT-
MPUCSON R424 1k R426 10k
MPUGPIO4
VD1_8
100n 16V
C454
100n 16V 10u
26R_100MHZ_1.5A AVDD_ADC2 L409 VA1_8 100n 16V C2228 100n 16V C2229 100n 16V C2230 100n 16V C465 100n 16V C468
R2211 10k
R2212 10k
TXCLKOUT+
STBY_5V
1k
SDA_EX
R439
SDA3
C472
100n
R413 68R R414 68R C410 C412
Q402 BC848B SC2_FB_SVP C473 AVDD3_AVSP2
SCL_EX 68p 68p
SCL3 VDDH C2220 100n 16V C2221 100n 16V C2254 100n 16V C2222 100n 16V C421 100n 16V
150R 600mA lik ferit L400 VCCA_3V3 S442 C423 16V 10u FB
VCCA_3V3
TXCLKOUT-
C2227
R428 1k
16V 10u
R440 1R
26R_100MHZ_1.5A L408 PAVDD C2235 C2236 C2238 VCCA_3V3 100n C2237 C466 100n 100n 100n VL1_8 L402
150R 600mA lik ferit
100n 16V C2226
100n
100n 16V C2224
100n 16V C2225
100n 16V C430
C2223
100n 16V
S445
No. 0210
MAIN BOARD - VIDEO DECODER CIRCUIT

40
C432
16V 10u
C469
Q401 BC848B
10p
10u
C458
C467
100n 16V
DIN[0-23]
DQS[0-3]
DQM[0-3]
MD[0-31]
VDDMQ_2V5_FLT
MD[27] MD[26] MD[25] MD[24]
R500 10R 1 2 3 4 R1 R2 R3 R4 R501 10R 1 2 3 4 R1 8 R2 R3 R4 R502 10R 1 2 3 4 R1 8 R2 R3 R4 7 9 6 5 8 20 7 22 82 120 DDQS0 MCLK01# DDQS1 DDQS2 MCLK01 DDQS3 119 123 134 122 75 15 116 129 131 R503 1 2 3 4 R1 8 R2 R3 R4 7 6 BA0 5 MA[11] MA[10] R518 33R R517 33R 130 143 110 109 121 133 135 124 126 113 127 142 141 140 128 139 138 125 137 136 DQ28_A9 DQ29_A8 DQ30_B8 DQ31_A7 NC_B10 NC_G10 NC_K12 NC_K11 NC_L3 NC_M2 NC_L2 NC_G3 NC_B3 NC_K8 NC_L9 CK-_L11 CK_L10 CKE_M11 WE-_K2 CAS-_K1 RAS-_L1 CS-_M1 BA0_M3 BA1_L4 A11_L6 A10_K5 A9_L7 A8/AP_M10 A7_M9 A6_M8 A5_L8 A4_M7 A3_M6 A2_L5 A1_M5 A0_M4 7 6 24 35 36 48 59 60 71 72 95 8
100n
VDDMQ_2V5_FLT
VDDMQ_2V5_FLT
MD[28]
MD[29]
MD[30]
MD[31]
MVREF
VCCA_2V5_FLT
7 6 5
10R R508 C501 1u
100n C517 R510 1k
C518 R512 1k C502
100u 16V 50V 4n7
MD[0-31]
DQM[2]
DQM[3]
DDQS2
DDQS3
MD[23] MD[22] MD[21] MD[20]
1u 50V
C525 50V 4n7 C516 C524 50V 4n7
107
108
144
106
VCCA_2V5_FLT 100u 16V 16V 100n C532 16V 100n C531 16V 100n C530 16V 100n C529 16V 100n C528 16V 100n C527 16V 100n C515 16V 100n C504 16V 100n C503 16V 100n C2253 16V 100n C2252 16V 100n C2251 16V 100n C2250 16V 100n BLM21B201S C526 L500 VCCA_2V5
C505
R3
R4
R2
R1
96
11
83
12
84
14
16
18
19
21
23
38
47
51
63
87
99
58
70
94
31
DQ15_E11
DQ26_C11
DQ13_F11
VDDQ_B11
DQ9_J11
VDDQ_D11
DQ11_H11
DM1_G11
DM3_A11
VDDQ_H3
VDDQ_F3
VDDQ_E3
VDDQ_J3
VDDQ_F10
VDDQ_H10
VDDQ_E10
VDDQ_J10
DQ14_E12
DQ12_F12
30 VDD_C6
DQ25_C12
DQ27_B12
DQ24_D12
DQ10_H12
VREF_M12
DQS3_A12
DQS1_G12
VDDQ_B2
VDDQ_B9
VDDQ_D2
VDDQ_B4
VDDQ_B6
VDDQ_B7
VDD_D10
DQ8_J12
VDD_C7
46
MD[19] MD[18] MD[17] MD[16]
C523 50V 4n7
VDD_D3 VDD_K10 VDD_K7 VDD_K6 VDD_K3 VSS_H8 VSS_H7 VSS_H6 VSS_H5 VSS_G8 VSS_G7 VSS_G6 VSS_G5 VSS_F8 VSS_F7 VSS_F6 VSS_F5 VSS_E8 VSS_E7 VSS_E6 VSS_E5 VSS_D9 VSS_D7 VSS_D6 VSS_D4 VSS_J8 VSS_J7 VSS_J6 VSS_J5 VSS_K9 VSS_K4 VSQ_J9 VSSQ_H9 VSSQ_J4 VSSQ_H4 VSSQ_G9 VSSQ_A10 DQS2_G1 VSSQ_C10 DQ20_H2 DQ21_H1 DQS0_A1 VSSQ_C3 VSSQ_C4 VSSQ_C5 DQ16_E2 DQ17_E1 VSSQ_C8 VSSQ_A3 DQ18_F2 DQ19_F1 DQ22_J1 DQ23_J2 DM2_G2 VSSQ_G4 VSSQ_D5 VSSQ_D8 VSSQ_C9 VSSQ_E4 VSSQ_E9 VSSQ_F4 VSSQ_F9
39 118 115 114 111 92 91 90 89 80 79 78 77 68 67 66 65 56 55 54 53 45 43 42 40 104 103 102 101 117 112 105 93 100 88 81
C522 50V 4n7
C521 50V 4n7
DQS[0-3]
DQS[0] DQS[1] DQS[2] DQS[3]
R513 15R R514 15R R515 15R R516 15R
C506 50V 4n7
C507 25V 10n
WE# CAS# RAS# CS0#
CLKE
EM6A9320 IC1
C508 25V 10n
C509 25V 10n
MA[0-11]
BA1 R520 33R
R519 33R R521 33R
MA[9] MA[8] MA[7] MA[6] MA[5] MA[4] MA[3] MA[2] MA[1] MA[0]
C510 25V 10n
C511 25V 10n
C512 25V 10n
DQM[0-3]
DQ7_D1
DQ1_B5
DQ0_A6
DQ2_A5
DQ3_A4
DM0_A2
DQ5_C2
DQ6_C1
DQ4_B1
DQM[0] DQM[1] DQM[2] DQM[3]
NC_L12
C513 25V 10n
C514 25V 10n
61
13
73
25
85
33
41
10
50
49
132
29
32
62
52
37
17
97
27
98
28
57
69
26
86
34
44
74
64
76
DQM[1]
DQM[0]
DDQS1
DDQS0
R2 7
R3 6
R506 10R R1 8
R4 5
MCLK0
R2209 10R R504 47R
MCLK01
C519 25V 10n
C520 BLM21B201S VDDMQ_2V5
R2 7
R3 6
R507 10R 1 R1 8
R4 5
R2 7
R3 6
R4 5
R2 7
R3 6
R509 10R R1 8
R511 10R MD[3]1 R1 8
R4 5
MD[15]
MD[14]
MD[13]
MD[12]
MD[11]
MD[10]
MD[7]1
MD[6]2
MD[5]3
MD[4]4
MD[2]2
MD[1]3
MD[0]4
MD[9]
MD[8]
MCLK0#
R2208 10R
R505 47R
10n 25V
MCLK01#
No. 0210
MAIN BOARD - DDR RAM CIRCUIT

41
L501
C500
PWM 1 NC1 NC10 44
RD_EMU
WR_EMU
50V 10u I6 I5 I4 I3 I2 MCA[1] 4 A1 A18 41 MCA[19]
C416 R416 4k7 VCC_5V I1 3 MCA[16] MCA[15] MCA[14] MCA[4] 7 A4 A15 38 MCA[16] MCA[3] 6 A3 A16 39 MCA[17] 2 1 20 19 S623 MCA[15] 8 CS OE 37 SRAM_OE I0 CLK VCC Q7 MCA[2] 5A A2 A17 40 MCA[18]
PWM2 GAL_IAP MCA[19] MCA[18] MCA[17] 2 NC2 NC9 S621 S620 S622 43 PSEN_UP S412 S414 R415 1k2 VCCA_2V5 MCA[0] 3 A0 NC8 42 8 7 6 5 4 R412 22R 16V 100u 10 GND OE Q0 Q1 11 C417 C419 13 12 100n 16V Q400 BC337 9 7 I R417 22R
IC622
GAL16LV8
No. 0210
FL_A14 MCAD[0] 9 I/O1 I/O8 36 Q2 Q3 Q4 Q5 Q6 MCAD[7] FL_A15 14 15 16 17 18

BRIGHTNESS CONTROL
MCAD[1] 10 I/O2 I/O7 35 MCAD[6]
K6R4008V1C-I/C-P
LED1 22k 5 MCAD[2] 13 I/O3 I/O6 32 4 3 S6300 2 S6310 SRAM_WE 15 WE A14 R6015 220R 1 S624 30 MCAD[3] 14 I/O4 I/O5 31
BRT_CNTL STBY_3V3 IR STBY_3V3 11 VCC C601 16V 100n VSS1 C600 34 FL_WE FL_OE
IC217
FL_A16 100n 16V 12 VSS VCC1 33 STBY_3V3
FL_A17
SRAM_OE
SRAM_WE
R604 4k7 STBY_5V
R6018 BC848B Q6006
MCAD[5]
LED2
R6019 22k BC848B Q6007
MCAD[4]
MCA[14]
PL600
MCA[5] 16 A5 A13
29
MCA[13]
R6016 220R MCA[6] 17 A6 S6312 STBY_5V STBY_3V3 S6311 1 MCA[19] MCA[7] 18 MCA[18] MCA[17] MCA[8] MCA[16] MCAD[0] MCA[9] MCAD[1] MCAD[2] MCAD[3] MCAD[4] MCAD[5] MCAD[6] MCAD[7] MCA[8] MCA[9] MCA[10] MCA[11] MCA[12] MCA[13] MCA[14] MCA[15] FL_OE S6320 43 45 VCCA_3V3 47 49 51 53 SDA 100R R611 SDA3 55 57 59 56 58 60 MCAD[4] MCAD[5] MCAD[6] BSN20 Q603 44 46 S6319 STBY_5V 48 50 S6318 52 54 S6317 RST# ALE_EMU MCAD[3] 17 18 19 20 DQ3 DQ4 DQ5 DQ6 WR_EMU MCAD[1] STBY_3V3 MCAD[2] 15 16 DQ2 VSS 14 DQ1 RD_EMU SRAM_WE PSEN_UP SRAM_OE R607 10k 22 NC4 21 NC3 20 A9 19 A8 3 5 S605 7 SCSCL 100R R6006 SCL3 MCA[1] 4k7 R600 Q604 MCA[2] MCA[3] STBY_5V SW_ENABLE MCA[5] MCA[6] MCA[7] SCSDA S606 STBY_3V3 29 30 32 34 36 38 40 42 31 33 35 BSN20 Q602 37 39 SCL3 41 27 28 S6316 25 26 100R R6011 SDA3 MCA[0] MCA[1] MCA[2] MCA[3] MCA[4] MCA[5] 23 24 21 22 19 20 MCA[4] 17 18 R6005 47k Q605 15 16 13 14 Q600 R6007 10k Q601 R601 4k7 R6010 10k 11 12 MCA[0] 9 10 8 S6315 6 4
A12
28
MCA[12]
PL607
2
A7
A11
27
MCA[11]
A10
26
MCA[10]
NC7
25
NC6
24
CIRCUIT OF SW UPDATE FROM SCART2

SCL 100R R606 R610 10k
NC5
23
MCA[6]
MCA[7]
MCAD[0] 13 DQ0
8 9
FL_A16
FL_A15
12 A0
10 11 A1 A2
A5
A6
A7
A3
A4
A12 A15 A16 A18 VCC W A17
4 MCA[12] 3 2 1 MCA[18] 32 100n 25V C605 31 30 STBY_3V3
LEVEL SHIFTER E2
SDA2 SDA 4 5 VSS SCL2 SCL 6 A2 3 SDA2 SCL2
IC219
M29W040B
CORRESPONDS TO Winbound W27E040 EPROM & ST M29F040 Flash E 22 21
S604
A14
A8
DQ7
A9
A10 23
A13
A11 G 24 25
26
28 27
29 FL_WE FL_A17
24LC32A
NVM_WP WP 7 A1 FL_OE 2 S608 S607
MAIN BOARD - MCU INTERFACE CIRCUIT

42
S603 STBY_3V3 S602 VCCA_3V3 C603 100u 16V C604 16V 100n 8 VCC PDP_GO1/BL_ON_OFF LOC_KEY BZT55C5V1 D600 R6037 1k S600 TV_LINK Q6009 UP_IRQ S627 4 R2305 10k BC848B Q2299 3 2 1 2 BC848B CPU_GO1/STBY Q6008 BC848B UP_TXD S628 1 2 1 R2306 100R IR R6035 4k7 STBY_3V3 A0 1 MCA[10] MCA[0] MCA[1] MCA[2]
FL_A14
MCAD[7]
VCCD3.3V_FLT
IC218
MCA[9]
MCA[8]
MCA[10]
MCA[11]
MCA[13]
SCL3
SDA3 R624 10R 10R R628 MCAD[1] MCAD[4] 3 2 1 MCAD[2] MCAD[3] STBY_2V5 L601 L600 5 6 R4 R3 R2 7 R1 8 4 1 3 2 D1 D4
MCAD[5] 4 R4 5 100 D5
MCAD[0] 3 R3 6 99 D0
MCAD[6] 2 R2 7 98 D6
MCAD[7] 10R R625 1 R1 8 97 A0 96 D7
MCA[11]
MCA[3] PSEN_UP
MCA[5]
MCA[4]
MCA[9]
MCA[6]
MCA[8]
MCA[7]
ALE_EMU
25V 100n C606
8 R1 1
7 R2 2 95 FL_CE
6 R3 3 94 A1
5 R4 4 93 A2 92 VDD3_3_3
5 R4
7 R2
7 R2
6 R3 3
6 R3
8 R1
5 R4 4 R626 10R 88
R627 10R 8 R1 1
1 84
4 83
3 82
2 81
R629 10R 1 91 VSS3 90 A10 89 A3 87 ALE PSEN 86 A4 85 A11 R1 2 R2 A5 A9 A6 A8 3 R3 4 R4 FL_RST A7 80 79 STBY_3V3 8 7 6 5 MCA[13] MCA[12] MCA[14] MCA[15]
PL606
PL604
2 R6038 1k CPU_GO UP_RXD S629 1
3 4 5 6 STBY_3V3 SCL SDA 7 C611 22u 8 STBY_3V3 SDA2 4k7 SCL2 R6030 AC_INFO MUTE_AMP RX1_RST# 4k7 RX1_INT 4k7 CPU_GO1/STBY DVD_12V_SENSE 15k R698 3k9 S610 17 S615 18 19 20 21 STBY_2V5 22u 50V L603 22 C621 25V 100n C620 23 PIN8_SC1 24 15k R654 C622 R653 3k9 25V 100n 25 26 R697 47R 4k7 R6031 47R 4k7 4k7 9 R689 R6013 R690 R694 R695 R696 10 11 12 13 14 15 16 R688 4k7 C613 100n R6036 4k7 C608 C607 25V 100n 22u 50V
D2 D3 XROM VDD2_5 VSS VDD3_3 P0_0 P0_1 P0_2 P0_3 P0_4 P0_5 P0_6 P0_7 ENE STOP OCF EXTIF CVBS VDDA2_5 VSSA P2_0 P2_1 P2_2
A13 A12 A14 VDD3_3_2 VSS2 VDD2_5_1 FL_PGM A15 A17 A16 A18 A19 NC5 RD WR NC4 P1_7 NC3 BLANK_COR B G R VDDA2_5_1 VSSA1
78 77 76 75 C609 100n 25V 74 C612 25V 100n 73 72 71 1 70 2 69 3 68 4 67 66 65 64 63 62 61 60 59 58 57 56 55 R684 75R R685 75R R686 75R L604 STBY_2V5 C623 25V 100n Q6011 BC848B R648 4k7 STBY_3V3 R639 10R R1 R2 R3 R4 8 7 6 5 RD_EMU MCA[17] MCA[16] MCA[18] MCA[19] VCCD3.3V_FLT STBY_3V3 BLM21B201S
PDP_GO/BL_ON_OFF
C610 100n 16V
R632 4k7
STBY_2V5
WR_EMU
R640 4k7 C615 100n
IC220
SDA5550M
STBY_3V3
UART SOCKET FOR IDTV

PL308 PL605
VCC_8V STBY_5V
R6042 1k
S601
R6043 4k7
STBY_3V3
PIN8_SC2
15k R655 3k9 R660
RST_H
15k R656 C625 25V 100n 3k9 R657
27 C626 25V 100n 28 29 STBY_2V5 1k R661 30
P2_3 NC HS_SSC VS
NC2 XTAL1 XTAL2 NC1
54 53
50V 33p
C624 X600 52 51 50V 33p VDD3_3_1 C628 100n 25V RST P3_4 P1_4 P3_6 P1_6 P3_7 P3_2 P1_2 P4_2 VSS1 P3_0 P1_0 P3_5 P1_5 P4_3 P3_3 P1_3 P3_1 P1_1 C627
LOC_KEY
6MHz
MMC_IR GIRISI
STBY_3V3
47
48
49
50
STBY_3V3
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
PIN8_SC3 S6313 PC_STBY
VCCD3.3V_FLT
C633
100n
Q6010 BC848B R6039 100R
R6014 4k7
R691
R6040 4k7
25V 100n 25V 100n C630 R692 4k7 4k7
R693 4k7
RST#
C631
VCCD3.3V_FLT R679 4k7 VCCA_2V5 4k7 R680 S614 SC2_FB R2303 10k Q2300 R2301 47k 4k7 R681 BC848B 4k7 R682 S613 R2304 100R FB R6017 4k7 R6041 4k7 2k7 R2300 RST# R2302 47k S6314 HDMI_CEC R6044 4k7 Q2301 BC848B VCCD_3V3
LM809 IC221
L609
BLM21B201S
STBY_3V3
TV-LINK
SDA_TVLINK STBY_3V3
100k R687
4k7 R676
VCCD_3V3
PDP_GO1/BL_ON_OFF
IR
PWM
LED2
LED1
SCL3
INT#
SDA3 PORT
UP_IRQ
UP_TXD
UP_RXD
GAL_IAP
PROTECT
NVM_WP
STBY_3V3
SDA_TVLINK
P1_5V P1_EVCC5
R2066
R2067
IC2013
470k 1 DSDA RX1_RST# G2 5 S1 D1 6
1k
HDMI_3V3 470k
R2070
IC3000 LM1117
VCC_5V 3 C3000 100n 16V C3001 100u 16V IN OUT 2 GNDVOUT 1 4 HDMI_3V3_PLL C3003 100n 16V C3004 100u 16V
P1_HPD R2069 10k
IC2012
C2072 VCC_5V R2062 100n 25V 4k7 1 R2063 47k S1 D1 6 4k7 R2068 2 G1
UPA672T
C3002 100n 16V
IC2003
1 A0 VCC 8
UPA672T
2 R2098 100R SW_ENABLE 3 D2 S2 4 G1 G2 5 DSCL
IC3001 LM1117
3 D2 S2 4 VCC_5V C3005 100n 16V C3006 100u 16V 3 IN OUT 2 GNDVOUT 1 4 HDMI_3V3 C3008 100n 16V
Q2 BC848B 2 A1 WP 7
C3007 100n 16V
C3009 100u 16V
24LC02
3 A2 SCL 6 DIN[10] DIN[11] DIN[12] DIN[13] DIN[14] DIN[15] DIN[8] DIN[9] DIN[0] DIN[1] DIN[2] DIN[3] DIN[4] DIN[5] DIN[6] DIN[7] HDMI_3V3_PLL
DIN[0-23]
DIN[16] DIN[17] DIN[18] DIN[19] DIN[20] DIN[21] DIN[22] DIN[23]
AUDIO_AGND
AUDIO_AGND
P1_DDC_SCL
R2064 56R
C2100
R2052 1 R1 8
R2050 1 R1 8
33R
SDA3
P1_DDC_SDA
SCL3
33R
R3
R2
R2
R3
R4
R4
R2065 56R
R2088 100k
VSS
SDA
2n7 50V
C2101 R2049 1 R1 8 7 6 5 DAC_AOR 33R 560R R2087
R2051 1 R1 8
AMP_PIN7
RX1_RST#
RX1_INT
OGND_SII
OGND_SII
60R_100MHZ_3A
AUDIO_AVCC5
0VCC_SII
0VCC_SII
GND_SII
VCC_SII
AMP_PIN6
S818
S819
C2068 25V 100n
33R
R3
R2
R2
R3
R4
R4
10u 50V
R2091 20k
AUDIO_AGND
C2103 AUDIO_AGND 10u 50V C2104 AUDIO_AGND
R2053
L2014
4k7
71
73
63
61
75
65
70
69
72
60
62
59
55
53
67
68
66
58
57
74
64
56
54
52
51
25V 100n AUDIO_AGND
C2102
100n 25V
R2089 47k R2090 47k AUDIO_AVCC
VCC3
OGND3
GND3
OVCC3
RSVDL2
OVCC4
OGND4
CSDA
RESET
CSCL
C2069 10u 50V
Q1
Q11
Q3
Q10
Q12
Q13
Q0
Q5
Q2
Q7
INT
Q4
Q6
Q8
Q9
C2099 8 7
270p 50V 6 5 E H G F
TP100
76 77 78 79 80
DSDA DSCL OGND5 PGND1 PVCC1 EXT_RES AVCC RXCRXC+ AGND1 RX0RX0+ AGND2 AVCC1 AGND3 RX1RX1+ AVCC2 AGND4 AVCC3 RX2RX2+ AGND5 GND4 VCC4 DACGNDG DACGNDR DACVCCG DACVCCR DACGNDB DACGND DACVCCB RSVDO1 DACVCC RSVDO2 RSVDL1
Q14 Q15 Q16 OVCC2 ODCK OGND2 Q17 Q18 Q19 GND2 VCC2 Q20
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 4 R2042 1 R1 8 2 3 R2 R3 R4 7 6 5 R2045 33R R2044 33R R2043 33R DAC_SCK DAC_WS DAC_SD0 4 GND_SII VCC_SII R2046 1 R1 8 AUDIO_AGND 2 3 R2 R3 R4 33R DE_2EX DVS_2EX DHS_2EX AUDIO_AGND 2n7 50V C2089 7 6 5 AUDIO_AGND 4 0VCC_SII R2048 33R OGND_SII 1 2 3 R2047 R1 8 R2 R3 R4 33R 7 6 DAC_AOL C2091 5 R2080 100k 2n7 50V 50V 10u C2093 AMP_PIN3 AMP_PIN6 AMP_PIN7 D C B A R2094 33R
DSCL C2071 1n 50V P1_HPD P1_CBL5V RX1_AVCC3 P1_DDC_SDA P1_DDC_SCL S817 AVCC_SII OGND_SII
PL2001
19 18 17 16 15 14
IC2008 MC33202
81 82 83 84
R2081 560R
AUDIO_AGND
C2092
S816 13 12 S814 11 10 9 8 S813 7 S812 6 S811 5 S810 4 3 2 1 AGND_SII GND_SII VCC_SII AGND_SII AVCC_SII 94 95 96 97 98 99 100 SCK WS SDO SPDIF OGND1 MCLKIN MCLKOUT AVCC_SII 93 HSYNC 92 VSYNC 91 DE AGND_SII AVCC_SII AGND_SII 87 88 89 90 CEC S815 86 AGND_SII 85
270p 50V
R2085 1k2
IC2002 SII9993
R2078 5k6
R2079 1k2
Q21 Q22 Q23
R2086 5k6
C2098 AUDIO_AGND 4k7 R2084 2n7 50V
C2090
AUDIO_AGND AUDIO_AVCC5 R2077 4k7 AUDIO_AGND 2n7 50V
C2097 AUDIO_AGND 2n7 50V R2082 2k32 2k32 R2083 3u3 50V R2074 270k
2k32 R2075
2k32 R2076
C2095 C2096
C2088
3u3 50V
10u 50V 25V 100n
AMP_PIN3
C2070 100n 25V
CLK_2EX DSDA
33R OGND_SII AUDIO_AGND 33R R2040 33R R2041 DAC_MCLK
AUDIO_AGND
270k R2073 8 7
C2094 6 5 DAC_MCLK 4 MCLK AOUTR
PGND2
ANRPR
ANBPB
PVCC2
COMP
GND1
VCC1
PLLIN
OVCC
ANGY
RSET
NC1
NC2
NC3
AOUTL
HDMI_3V3
11
13
21
15
23
10
12
20
19
17
14
16
18
22
24
25
IC2006 CS4334
DEM/SCLK SDATA
RX1_AVCC3
0VCC_SII
R2035
100R
TOCOMP
C2054
C2055
C2056
C2057
C2058
C2059
HDMI_3V3
100n 25V
100n
100n
4k7 R2038
60R_100MHZ_3A 10u 1n 1n L2012
HDMI_3V3
VCC_SII
GND_SII
50V 1n C2062
25V 10u 3k9 R2039 25V 47n
VCC_5V
C2067 DAC_SD0
S805
L2016 VCC_5V AVCC_SII 330R_100MHZ_3A AUDIO_AVCC5 C2060
IC2014
S809 S808 1 1OE A8 8 R2095 10k
L2015 60R_100MHZ_3A C2074 C2075 100n 25V C2076 C2073 100n 25V C2077 HDMI_3V3 100n 25V 16V 10u 1n 50V
C2066 50V 10u C2064
L2017 330R_100MHZ_3A AGND_SII VCC_5V AUDIO_AGND
TOCOMP
60R_100MHZ_3A
10n 25V C2061
R2097 330k
R2096 27k
L2013
S800
1A
2OE
10u 16V
SN74CB3Q3305
3 1B 2B 6
S807 HDMI_CEC Q1 2N7002
S801 100n 25V C2080 C2078 C2079 100n 25V C2081 1n 50V C2082 HDMI_3V3 16V 10u VCC_SII P1_5V 1n 50V
C2065 1N5817 D2022 100n 25V 4 A4 2A 5
S802 GND_SII R2071 10R
S804 OGND_SII
No. 0210
MAIN BOARD - HDMI/DAC CIRCUIT

43
BZT55C5V6
D2020
C2083
C2084
100n 25V C2085
100n 25V C2086
1n 50V C2087
HDMI_3V3 16V 10u
0VCC_SII 1n 50V
BZT55C5V6
S803
P1_CBL5V
P1_EVCC5 1N5817
HDMI_3V3_PLL
D2021
S806 CEC
D2023
DAC_SCK
DAC_WS
25V 100n C2063
LRCK
AGND
VA
L918 4 3 2 1 VCC_12V PDP_GO1/BL_ON_OFF PANEL_VCC1 1 2 3 4 5
PL904
PL903
1
VCC_5V S908
L917 VCCA_3V3
PL902
6 7
2 LG_1/IRQPDP 3 4
VCCA_3V3 S909 STBY_3V3 S910 STBY_5V
VCC_12V
5V 5V
L906 16V 100u C900
AC_INFO
MMC SUPPLY
L909 N.C
STBY_5V
S903
S904
1 2
STBY_5V L905 +12V 16V 1000u 100n 50V C906 C908 L920
FAN1616AS-3.3 IC902
SOT 223 L913 3 C916 100n 16V 2 16V 220u 1 C920
STBY_3V3 D905 L923 1N4007 D906 1N4007 STBY_2V5 10u
16V 220u
3 4 L901 5 L902 6 L903 C901 7 L904 8 9 10 11 12 47u 50V L907 L900
C914
IC904
R918 1 STBY_3V3 R922 3k3 C942 3 56p C944 100p 4 GND COMP. 5 CAP. 2 SW.COLL. EMITTER DRI.COL. SENSE VCC 8 R916 100R 7 6 R917 100R
LM317 IC900
3 IN OUT 2 ADJ 1 C904 100n 16V R902 1k
MC34063A
VCC_8V
C909
47u 50V
R907 10k
C910 100n 16V
R914 10k
PROTECT Q900 BC848B
BC858B Q901 R908 10k R910 10k
VCC_5V 1N4148
D912
5k6 R903
R912 10k 1.8V_ON/OFF
D907
56k R921 C945 R920 6k8 R919 2k2
D908 VCCA_3V3 1N4148 D909 VCCD_3V3 1N4148 D910 PANEL_VCC1 L924 1N4148 22u VCC_8V C919 100u 16V C922 100n 16V PANEL_VCC S907 4 5 3 2 10k R924 330R R923 C943 22u 56p
PL900
C903 N.C R900 470R STBY_3V3 R901 470R C902 D900 47u 100n
L919 16V 1000u 100n 100n 100n C932 C933 C934 C912 C935 100n 22u VCC_5V
CS52015-3 IC901
3 VIN VOUT 2 GND
16V 100u
C931
L912
R909 120R
C915 100n 16V 16V 100n 50V 22u C917
VDDMQ_2V5 R915 470R N.C
N.C PDP_GO/BL_ON_OFF A_DIM_PWM DIG_DIM_PWM SEL PROTECT
1N4007 D901 1N4007
C918
PL901
1 2 3 4 5 6 7 8 S913 9
STBY_2V5
120R R911
1R R913
STBY_2V5
10u C946
L921 D902 1N4007 D903 1N4007 VCCA_3V3 OUTPUT
VCC_33V
IC223
SAP 30030067 ADJ TYPE
BLM21B201S 3 2 C921 47u 50V 1 C923 100n 16V L922 BLM21B201S VCCA_2V5 1N4148 D913
R925
LM2576
FEEDBACK ON/OFF
IC903 LD1117
SOT 223
CPU_GO1/STBY VCC_33V VCC_12V PORT D915
10k
D914
GND
VIN
L915 100n 16V C936 100n 16V 16V 100u 16V 100u 1.8V_ON/OFF C927 22u C925 C939 1_8VMAIN S905 S911 VL1_8
C947
10u 16V S912 Q903
FDC642P Q902
VCCD_3V3
L908 VCC_12V 22u 16V 100u C905 L911 22uH_3.9A_SMD L910 STPS745 D904 D911 SS33 22u 16V 1000u C911 C913 100n 16V R904 330R
10
160R R905
S902
1_8VMAIN L914 100n 16V 100n 16V 16V 100u 16V 100u C928 22u C924 C937 C940 1_8VMAIN
VD1_8
S900 A_DIM_PWM S901 DIG_DIM_PWM BRT_CNTL
L916 100n 16V 100u C938 100n 16V 16V 100u C926 C929 22u 22u C930 C941 1_8VMAIN VA1_8
PANEL_VCC_ON/OFF
No. 0210
MAIN BOARD - POWER SUPPLY CIRCUIT

44
VCC_12V
1N4148
No. 0210
POWER BOARD - SHEET 1

45
No. 0210

46
No. 0210

47
No. 0210

48
No. 0210

49
4P JK100
BZT55C10
C100
D100
L101 L100 SVHS_Y 600R_100MHZ_200mA
33p 50V
12
No. 0210
34 600R_100MHZ_200mA D101 BZT55C10 C101 L103 SVHS_C 600R_100MHZ_200mA 33p 50V L102 600R_100MHZ_200mA S100 PL103 C102 33p 50V 1 FRONT_VIDEO S101 D102 BZT55C10 L105 600R_100MHZ_200mA L104 600R_100MHZ_200mA A 23 1 D103 BZT55C10 C103 100p 50V 1 FRONT_VIDEO FRONT_AUDIO_R 2 3 SVHS_Y 4 R108 4 5 FRONT_VIDEO 6 6 7 FRONT_AUDIO_R 8 FRONT_AUDIO_L 9 600R_100MHZ_200mA 1 2 12 3 4 LINE_OUT_L 600R_100MHZ_200mA LINE_OUT_SUB HP_R R102 L112 L111 LINE_OUT_R HEADPHONE L110 LINE_OUT_R LINE_OUT_L LINE_OUT_SUB 11 10 8 7 FRONT_AUDIO_L 5 FRONT_AUDIO_R FRONT_AUDIO_L R101 600R_100MHZ_200mA C104 100p 50V R110 3 SVHS_Y R107 SVHS_C R100 23 1 600R_100MHZ_200mA 600R_100MHZ_200mA A L107 L106

PL100
1 SVHS_C R109 2
JK101 YELLOW_FAV
PL104
JK102 1P_RED_FAV
D104
BZT55C10 L108 L109
600R_100MHZ_200mA
JK103 WHITE_FAV
23 1
PL102
FRONT AV BOARD
HP_R 1 2 HP_L HEADPHONE 3 4 1 2 3 4
50
C105 D105 600R_100MHZ_200mA 4n7 50V
9 8 7 C106 4n7 50V 3 2 1 C107 HP_R HP_L R103 600R_100MHZ_200mA HP_L HEADPHONE L113 D106 BZT55C10
6 5 4 JK104 PHJACK
PL105
PL101
L114
600R_100MHZ_200mA
100p BZT55C10 50V
D107
BZT55C10
L116 LINE_OUT_SUB R104
JK105 WHITE_FAV
23 1
600R_100MHZ_200mA
L118 LINE_OUT_L R105 600R_100MHZ_200mA
L120 LINE_OUT_R R106
JK107 1P_RED_FAV
23 1
600R_100MHZ_200mA
100p 50V 100p 50V 100p 50V
600R_100MHZ_200mA
JK106 WHITE_FAV
231
600R_100MHZ_200mA
600R_100MHZ_200mA
C108 C109 C110
L115
D108
BZT55C10 L117 BZT55C10 L119
D109 A
No. 0210
4 3 2 1

PL700
35V 470u 22u N.C L729 C821 S730 22u D904 SS33 1 VIN STPS745 D901 2 OUTPUT 3 L109 L904 22u GND 4 L727 25V 1000u FEEDBACK 22uH_3.9A_SMD 1 C820 C807 C826 470n 63V L726 40uH C815 C816 40uH 15V_AUD 100n 25V 50V 1n C796 L722 50R_100MHZ_3A 50V 10n C818 C794 C802 100n 25V 50V 1n C795 C803 220u 25V C801 470n 63V L725 15V_AUD L721 50R_100MHZ_3A 50V 10n C793 2 C808
IC708
LM2576
PL702
25V 1000u 100n 25V
C822
ON/OFF
R754 1k8
R755 22k
15V_AUD
22n 50V 2 R766 12k 1 vcc 5v R767 3k3
PL707
24 23 22 21
100n 50V
100n 50V
20
19
18
17
16
15
14
13
S737 Q709 BC848B C817 22n 50V 2 1
BSLP
BSLN
PVCCL4
PVCCL3
PVCCL2
PVCCL1
LOUTP2
LOUTP1
LOUTN1
LOUTN2
PGNDL2
PGNDL1
1u 16V C792 25 26 R742 27 28 S732 25V 100u 100n C779 50V C778 C811 30 31 S733 32 Q710 BC848B 33 MUTE 34 35 C776 36 VCLAMPR AGND2 VAROUTL VAROUTR AVCC MODE MODE_OUT 29 ROSC COSC AVDD VCLAMPL AGND1
REFGND VOLUME VARMAX VARDIFF VREF AVDDREF LINN LINP V2P5 RINP RINN SD_NOT
12 11 10 9
33k R745
S723
S724
R756 100k
LM809 IC703
AMPLIFIER BOARD (D-CLASS)

S734 3 120k 220p 50V MUTE_3V3 RESET OUT S736 15V_AUD S735 C824 1u 16V BSRP PVCCR1 9k1 R768 100n 25V S738 Q604 BSN20 Q603 BSN20 50V 100n 38 37 C777 25V 220u R772 4k 25V 100n C825 C775 MUTE 50V 10n C781 15V_AUD
51
R770 1k
8 7 1u 6 C790 5 1u 4 C791 3 1u 2 C787 1
18k R746
TPA3004D2 IC702
ROUTP2 PVCCR4 ROUTN2
1u
MAIN_OUT_L
1 2 C789 3 1u 4 C788 5 MAIN_OUT_R
PL701
R771 1k
HIGH=ON
LOW=OFF
PGNDR2
ROUTN1
PGNDR1
ROUTP1 PVCCR2 39 15V_AUD 40 L719 50R_100MHZ_3A 40uH L724
PVCCR3
BSRN 48 47
Q715 BC848B
MUTE_3V3
S739
50V 100n
C783
C814
100n 25V
41 50V 1n
C786
C806
470n 63V
42 2
43 50V 1n 1
50V 100n
C782 C813
100n 25V 220u
C784 L718 C785 40uH C805 470n 63V
44
45 50R_100MHZ_3A L723
46 15V_AUD
50V 10n
R773 3k3 C780 C823 R765 12k
100n 25V 15V_AUD
PL703
15. CIRCUIT BOARD DIAGRAMS

R6018 R248 Q6006 R246 S6300 R277 R6015 R265 S6312 S637 R6016 S6311 S6310 S650 Q6007 R6019
17MB15E-5
PL902 C944 C942 R922 C914 IC900 L909 IC904 R280 L913 C916 L923
251005 VER
IC901 C945
R259
IC213
Q903
PL903
R918 R920 R919 R917 R911 L912 C946 R910 Q901 R908 R907 R914 R912 S649 D903 D902 D901 D900 C915
Q207 C2099 R2083 R2074 R2082 R2084
R279
C903
PL200 R208 R209 R210 R211 R213
R924 S907
PL600
A
D201
S908 C2052 S909 S910 C2051
R258 R257 R923 R925
Q902 C947 S608 S607
R256 D912 R255 R921 C943
L924
R284 D200 R212 R215 R218 R219
R281 R282 D906 D905 IC214
Q208 R283
R916 R902 R903 C904 IC902
C290 S223 C917 C931 PL904 D2502 D2501
R913
IC212 R216 R2073 C2094 R2085 R2086 C2088 C2098 C2097
L907
C910 C909 C920 R2089 R2090 C353 C2053 C281
C901 S337 S336 C906
C918 C932 C933 C935 C934 R909 R915 C919 C922 C902 C912
L904
L903
L902
L917
JK300
C302
R331
D106
C2096 C2101 C2103
Q900 D907 C505 D910 D908 D909 R501 R500 R515 C514 L906 R512 C518 R510 C517 IC1 C501 R502 R506 R509 L919 R516 C900 C502 C530 C515 C504 C510 C509 C523 C513 C512 C521 C507 C503 C506 C508 C511 C522 C519 C2250 C526 C532 C529 C531 C528 C2251 L905
S903
JK301
C356 C363 C364 R332 C357
C2095 R2076 R2075 R2077 C2090
C2102 C2089 R2087 R2088
S904
R901
L901
R900
S314 S307 S309 S308
R508
C908 PL607
S6320
R505
C2104 IC2006 IC2008 C2093 R2078 C3009
60
R504
C527
C500
R517
JK302
R333 C365 C358 C3008 C3007 C3005 C3006 C3004
R2079 IC3001
R2080 R2081 C2092
L921 L922
59
R521
S600 R6035 R6036
R520
R519
R2214 S622 R507 R513
C520
C524
R2209
JK304 D2022 C3003 L2016 C3000 C3002 D2020 IC3000
Q6009
R6038
R604 R2306 R2305 R607 R606 R610 R611
C451
C449
C456
C448
C446 C447
R433
C471 IC224
C452
C423 S110
C2085
C2087
JK303
Q603
R6043
S441 C462 C450 R228 C463 C457 R427 C460
R2098 R2052 R2051 R2050
S415
C606
S331
R2068 R2063
L609
S648
PL2001
R2071 R2065 R2067 R2064 S817 S816 S815 S814 S813 S812 S811 S810
R426 R425 S413 S411 C615S442 C610 R2303 C411
C443
C627
C624
R2094 R2029 R2210
C414
R2045 R2044 R2043
R648 L604 Q401 Q2301 R2304 R2302 X600 R2300 R2301 S602 S603
L408
R687
C2077 R6014 S6313 R661 L603 S800
L404
C620
L407
L402
C603 C416 IC218
S912
C604
L915
R2095
C924
R237 R242 Q202 R1033 Q1004 R1045 Q203 Q200 R231 C276 R230 R241 R227 R239 R226
C275
IC210
C905
R229 C246 S326 L200
C297 R202
C299 R207 C283 C1132 R204
C1080 IC207
R201
Q204 Q205 R266
R205
R1067 IC206 L1008 C1087
D2004
S905 S911
R1091
R1097
C1150
C259
R268
C2047
C2048
C285
D2002
S652
C1084 R1078
C1079 C1081 C1086
C1120
R271 C1204
C1203
C1117
C1113
C1128
C340
S302
C1122
R1128
C343
C341
C1140
C1147
C2038 D2000 D2101 S636 L203 L207 L209 L211 L212 L214 C362 PL201 C2008 IC316 R2030 C270
L1022
L1023
L1024
L315
S303 C295 R321 C1151 C1193 C1194 R1125 C1192 C1005 S1008 C1206
L1026
L201 L202 C262 R232 C263 D216 D217 D215 C261
C1123 C1134 C300 C1145 C1166 L1017 C1149
C344
R1130
S901 PL901 S900 C346 C347
C335 C334
S312
S2005
S2006
S2010
R1011 C1029 C1021
C1177 R1105 C1170 R1107 C1153 R1110 C1163 R1109
D205
S2001
C1035
R1028
D207 S205 D208 C293
R2203 L2018 C2049 S204 R2015 L2001 C2021 C2026 S2000 C2028 C2030 C2031 C2034 C2037 C247 C2022
L1030 L1027
PL1002 C1167
L1032 D1000 D1007 C1195 R2200 R1031 C R1022 C1042 C1182 L1029 C1183
R276 R275 C248 C253
L1028
R2019 S2009
S2003
C1180 C1179 R1112 C2025 R2017
C1011 C1014 C1199
D218
C1202
C1197 R1129 C1168 R1100 R1103 C1036 R1042 R1043
D211
R2020
R2021
R2022
R1101
C1184 R1113
R2023
D213
C1010
C1172 C1178
C1205 C2200
C1048
C1006
C1039
C1165 C1159 R1052 C1054 C1055 S1003 C1052 R1010
C1043 R1041 R1119 C1041 S2012 R1027
Q1014 S1006 C1056 C1187
R1050
C1181
R1034 R1040 R1039 IC 205 R1005 R1030 C1022 C1023 D1005 C255 L216
X1001
R1051 Q 1005 R1048 R1049 R1114 R1009
IC201 C1030
C1031 C1027 Z1001
C1047
C1040 R1023 C1049 R2201
L218
C2201
R1000
C1013
C1007
C1002
R1001
D1006
C1003
C1188 R1115
C1186 C1012 TU1000 R1117 R1116 D1002
L1031
No. 0210
MAIN CIRCUIT BOARD

52
D1004
C257
COMPONENT (TOP) SIDE
C1026
R1012
R290 L219
C1191 R1123 Q1016 S1010 C1034
R2011
S2002
R2012
R2013
C254
R289
C1015
C1008
S1000
C1004
R1024
S1007
L1001
L2019
R2016
C2018
R253 D2103 D223 C266 D2100
C251
C1185
R1124 S1009 Q1015 R1122 R1121
C249
C2024 C2020
R2010
S310 R325
S311
C337 C338 C339 D1001
C342
R2204 L2002
C2023
R249 C301 C284 D221 C277
C310
C309
C308
C313
C312
C311
C1200 R1126
D203
R288
C1057
R3 S3 20 01
C325 C324
S2011 C1028 S2007 S2008
L312
L1025
C336
L300
C352 S340
C1169 C1025 L1019 Z1000 C1024 IC200
C1201
C1144
R2007 C2005 C2007 C2006
C319 C320 C318 C348 C305 C349 C306 R300 C361 R305 R307 R306
L2011
C345
C264
C252
C323
C250
C1137 C1118 C1130
C317 C321
C1154
R1093 C1119
R1090
L308
R304
D212
R2006
D214
R2004
C1112
L313 L314
C1121 R1094
R285
D2001
C1125
C2202 C1097 C1106 C1116 R1089 R1098 R1095 C1133 C1126
S651
R2008
D209
L2010
R2202
C1114
R2005
R2009
D219
D210 C2039
L2000 C2004
X300 L311
C291 C273 C288 S201 C279 C265 C287 C260 R206 C274
R1068 C1124 C1136 C1156 C1138 C1157 C1148 C1158
C2046 C1078
R286
IC223
D206
C271 R261 R260
Q1009
R104
R2028
R203
S221
R1096
R1092
C913
S902
R1046 R2002 C272
C303
R235
S220
C245
R905
R1069 Q1011
L2009 R2026 R1070 IC208 R2027 R1071 C1085
C280
8 00 L2
R240
D202
R904
PL1001 PL604
S634 R270
C2044
D204
C2040
R287
R200
D220
C2050 R267 R269
R225 R224 R223 R222 R221 R220 C282 S212 R2001 Q2000 R2003
C937
R274 S635 S633
R273
S325
PL605
PL308 S200
C298 C940
C2042 C2045
L208
L908
C296
L213
D904
L2007
R1008
C BE
R2096
L206 R252 L204 C258 L210 R254 D2102 L2004 C278 D222 L2006 R2025 D2500 L2003 R2024 D2104 L2005 C269 D2003 D2105 L205 D224
Q400
C941
R428 L910 L911
C936 R416 C286 C294 C268 C2054 C267
A
L914
D911 Q206
C2082
L409
Q2299
C938
L2012
C2060 L2015
S445 Q402
C926
C2065
R6017
L2013
C925
R2097 S807 S809 S806 D2023
L406
R2040 R2041 C2067 S802 C2062 IC2014 S801
R6044
Q2300 C929
3 69 13 R S9
C445 C939 C459 S644 R250
D915
C2079
Q6010
C2073
C469 IC215 S638 S639 S645
C2080
C2227 C2228 C2229 C2230 C465
C2231 C2232 C2233 C2234 C442
C633
C623
C2075 C2076
S805
S804
R2048
R435
C611 R688 R689 R690 R694 R695 R696 R698 R660 R655
C438
C409
R420
C439
R243
C415
R686
R6031
R640 R632
C2068
R684 R685
L2014
C467
C2216 C2217 C2218 C2219 C455
C2239 C2240 C2241 C2242 C454
C2223 C2224 C2225 C2226 C430
C630
R234
R418
R436
S437
R236
C607 S606
D101
C2069
C424
S643 S642
C420
C609
C612
R2053 C2070 C2071
C1000
R233
C631 C419
C428
S440
S109
C422
S601
C418
R2212
Q605 S6316
C2222 C2254 C2221 C2220
R6013 R6030 C622 R653 R654 R656 C626 R657
S803
R100 R101
C410 R413 R414 R419
S113
R2070 R2066 IC2012
R6042
C2207 C427 C2208 C2209 C2210 S647 C429 C2211
Q6011
D2021 R2069 IC2013
Q100
R2216
C425 C608 C613 R697 S610 S615 C621 C625 C628 C359 L316 S324
C2086
C2084
S646
C2235 C2236 C2237 C2238 C466
30
29
PL103
R2215
D225
R103 S108
R2218
R431
R6037 R429 R432 S112 S111
R430
L400
C921
R2208
R434
R2213
C1001
Q6008
D226
C2253
IC219
C923 R503
C2252
C470
L500
L2017
C525
C2206 C440 C2203 C2204 C2205 C421 R2211
R214
R217 R238 D104 D102 C2083 IC2003 R2062 C2072 C289 IC211
IC318
R312 R313
R326
S6318
S6319
L501
LF
S6317
R2091 C2091
L900
L918
C2100 S623 C601
L401
C2404
PL900
L920
R518
C431 C2403 C2215 C2402 C2401 C2214 C2400 C2213 C2212
IC903
C433
R6040 R692 R6039 S613 S614 R102 S107 C605 S604
IC107
C516
R511
R514
C360
IC217 IC622
S620 S621 S624 C600 S323 L317 S330
PL104
R2217 C436
C437 C435 C434
C403 R406 S425 C406 R403 C402 R402 S431 S438 C400 R400 S439 C404 R407 C408 R405 S427 C401 R401 S430 C405 R408 C407 R404 R244 S426 R423 L600 R424 C472 C473 C413 R439 R440 R627 R626 R625 R624 L601 R628
C426 R422
C3001 S6315 S819 S818 Q2
R6005 R600 Q600 R6007 R6006
Q602 Q604 S605 Q601 R601 R6011 R6010 R2049 R2047 R2046 R2042
R6041 X S6314 IC220
S641 S640
R676 IC221 R682 R681 R417 R680 R679 S412 S414 R412 R415 R691 R629 R639
E
C412
X4 00
C444
Q1
PCB KENARI
IC2002
R2039 C2066 C2063 R2038 C2059 C2058 R2035 C2057 C2056 C2081 C2078 C2074 C2061 C2064 C2055 PL205
R251
C432
C458
C468
C930 L916
C927
C911
D600
S628
S627
S629
S808 PL606
D913
C417 PL301
C928
IC2001
C292
Q1007
C331
R264
C304
R317 R316 R315 C333 C332 C330
Q2002 Q2003
R2032 R2031
DC1164 C1175
2 00 X1
D914 L1018
C1174 R1106 C1176 R1108 C1171
01 004 20 2 Q Q
R1104 L1020 L1021 R1111
R322
1
PL203
C1152
C322
R323
S316
IC216
L1002
1 3
JK200
C316
IC317 C2027 C2029 C2032 C2033 C2036
C350
R 10 04 C1020 R1013
R2014 R2018
C2019 IC2000
C329
C328
C327
R319 R318
C2009 PL1 C2010 C2011 C2012 C2013 C2014 C2015 C2016 C2017 C1196
C326
R309
R310
R311
S2013
S213 PL1003 TU1001 R1044
R1036 IC204
R1029 X1000
L1003
R1032 R1037
C1162
R1127
IC209 S1005 C1189 Q1013 R1118 R1120
C1045 R1038 C1037 R1025
C1198
D1003
CQ1003
Z1003
C1173
R1102
R 35 02 10 10 R1026 Q
E
C1038
1 2
L1000
SOLDER (BOTTOM) SIDE
Z1002
C1009
THE UPDATED PARTS LIST FOR THIS MODEL IS AVAILABLE ON ESTA
17. WALL MOUNT TEMPLATE DIAGRAM (32-INCH MODELS ONLY)

853.90 104.00 400
649.00
600.00
245.00
200
IDTV
MMC
SIDE AV
BUTTON FUNCTION
STAND
No. 0210
WALL MOUNT DETAIL

54
Hitachi, Ltd. Tokyo, Japan International Sales Division THE HITACHI ATAGO BUILDING, No. 15 12 Nishi Shinbashi, 2 Chome, Minato Ku, Tokyo 105-8430, Japan. Tel: 03 35022111 HITACHI EUROPE LTD, Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA UNITED KINGDOM Tel: 01628 643000 Fax: 01628 643400 Email: consumer -service@hitachi-eu.com HITACHI EUROPE S.A. 364 Kifissias Ave. & 1, Delfon Str. 152 33 Chalandri Athens GREECE Tel: 1-6837200 Fax: 1-6835964 Email: service.hellas@hitachi-eu.com
HITACHI EUROPE GmbH Munich Office Dornacher Strasse 3 D-85622 Feldkirchen bei Mnchen GERMANY Tel: +49-89-991 80-0 Fax: +49- 89-991 80-224 Hotline: +49-180-551 25 51 (12ct/min) Email: HSE- DUS.service@hitachi-eu.com
HITACHI EUROPE S.A. Gran Via Carlos III, 86, planta 5 Edificios Trade - Torre Este 08028 Barcelona SPAIN Tel: +34 93 409 2550 Fax: +34 93 491 3513 Email: atencion.cliente@hitachi-eu.com
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HITACHI Europe AB Box 77 S-164 94 Kista SWEDEN Tel: +46 (0) 8 562 711 00 Fax: +46 (0) 8 562 711 13 Email: csgswe@hitachi-eu.com
HITACHI EUROPE S.A.S Lyon Office B.P. 45, 69671 BRON CEDEX FRANCE Tel: +33 04 72 14 29 70 Fax: +33 04 72 14 29 99 Email: france.consommateur@hitachi-eu.com
HITACHI EUROPE LTD (Norway) AB STRANDVEIEN 18 1366 Lysaker NORWAY Tel: 67 5190 30 Fax: 67 5190 32 Email: csgnor@hitachi-eu.com
HITACH EUROPE AB Egebkgrd Egebkvej 98 DK-2850 Nrum DENMARK Tel: +45 43 43 6050 Fax: +45 43 60 51 Email: csgnor@hitachi-eu.com
HITACHI EUROPE AB Neopoli / Niemenkatu 73 FIN-15140 Lahti FINLAND Tel : +358 3 8858 271 Fax: +358 3 8858 272 Email: csgnor@hitachi-eu.com
Hitachi Europe Ltd Bergensesteenweg 421 1600 Sint- Pieters-Leeuw BELGIUM Tel: +32 2 363 99 01 Fax: +32 2 363 99 00 Email: sofie.van.bom@hitachi-eu.com
HITACHI EUROPE LTD Na Sychrove 975/8 101 27 Pr aha 10 Bohdalec CZECH REPUBLIC Tel: +420 267 212 383 Fax: +420 267 212 385 Email: csgnor@hitachi-eu.com
www.hitachidigitalmedia.com

Hitachi 32LD8700 LCD

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No.

SERVICE MANUAL MANUEL D'ENTRETIEN WARTUNGSHANDBUCH

SPECIFICATIONS AND PARTS ARE SUBJECT TO CHANGE FOR IMPROVEMENT

COLOUR TELEVISION October 2006

ii TFT TV Service Manual

iii TFT TV Service Manual

1 TFT TV Service Manual

(4)6 AFD CAF

SIF AGC CAGC

4(2) FMPLL FM-PLL filter

4. MULTI STANDARD SOUND PROCESSOR

5. VIDEO SWITCH TEA6415

6. AUDIO AMPLIFIER STAGE WITH TPA3004D2

9. CLASS AB STEREO HEADPHONE DRIVER TDA1308

10. SAW FILTERS

3 TFT TV Service Manual

4 TFT TV Service Manual

5 TFT TV Service Manual

6 TFT TV Service Manual

7 TFT TV Service Manual

PIN Function Table

9 TFT TV Service Manual

10 TFT TV Service Manual

13 TFT TV Service Manual

14 TFT TV Service Manual

Pin Connections and Descriptions

15 TFT TV Service Manual

Top View Top View

17 TFT TV Service Manual

18 TFT TV Service Manual

Connection (if not used)

OUT OUT IN OUT IN/OUT IN/OUT IN/OUT IN/OUT IN IN IN/OUT IN/OUT

OUT OUT OUT OUT

19 TFT TV Service Manual

OUT OUT OUT OUT

LV LV LV OBL LV LV LV LV OBL LV LV LV LV OBL OBL OBL OBL OBL OBL LV

20 TFT TV Service Manual

21 TFT TV Service Manual

22 TFT TV Service Manual

Pin Connections and Descriptions

DIP Pin connections NC: Not connected Signal names

26 TFT TV Service Manual

Pinning PIN 1 2 3 4 DESCRIPTION

28 TFT TV Service Manual

11.29. TPA3002D2 11.29.1. General Description

29 TFT TV Service Manual

PGNDL PGNDR PVCCL PVCCL PVCCR PVCCR REFGND

18, 19 42, 43 14, 15 22, 23 38,39 46, 47 12

30 TFT TV Service Manual

3 2 27 44, 45 40, 41 1 9 10 31 32 25 36 11 8 4 Thermal

32 TFT TV Service Manual

12. SERVICE MENU SETTINGS

33 TFT TV Service Manual

34 TFT TV Service Manual

Factory Reset loaded.

=> OK to activate. When OK is pressed on this item, factory defaults

Menu Languages 1 & 2

35 TFT TV Service Manual

13. BLOCK DIAGRAM

AUDIO AMP BOARD

AUDIO AMPLIFIER D-CLASS

SDA5550 MCU MICRONAS

HDMI DECODER SIL9993

14. SCHEMATIC DIAGRAMS